Various circuits may require substrates that exhibit a high thermal conductivity. Such circuits may include power circuits such as power transistors.
Silicon substrates do not exhibit high thermal conductivity.
Single crystal diamond substrates are very expensive and small—such as having a one-inch diameter.
There is a growing need to provide a circuit that includes semiconductors devices and a substrate that has a high thermal conductivity.
There may be provided a method for generating a structure, the method may include receiving multiple donor structures that comprise multiple mesas; placing the multiple donor structures on a substrate that lacks a semiconductor layer that covers the entire substrate; and performing a manufacturing process that comprises coupling the multiple mesas to the substrate.
The performing of the manufacturing process may include exposing the multiple mesas.
The performing of the manufacturing process may include removing masking elements from the multiple donor structures.
The performing of the manufacturing process may include electrically coupling the multiple mesas to structural elements.
The performing of the manufacturing process may include electrically coupling at least some of the multiple mesas to each other.
The performing of the manufacturing process may include performing front size process.
The performing of the manufacturing process may include performing a backside process.
The aggregate size of the multiple mesas may be less than ten percent of an area of the substrate.
The aggregate size of the multiple mesas may be less than one percent of an area of the substrate.
The substrate may exhibit a high thermal conductivity.
The substrate may exhibit a thermal conductivity that exceeds 250 Watt/(Kelvin*meter).
The substrate may exhibit a thermal conductivity that exceeds 1000 Watt/(Kelvin*Meter).
The substrate may be a monocrystalline substrate.
The substrate may be made of one or more materials that differ from silicon.
The method wherein each donor structure may include a sacrificial layer.
The method wherein each mesa may include at least a portion of an active semiconductor device.
The method may include generating the multiple donor structures.
There may be provided a structure that may include mesas that may be electrically coupled to a substrate, wherein the structure may be manufactured by (a) receiving multiple donor structures that comprise multiple mesas; (b) placing the multiple donor structures on a substrate that lacks a semiconductor layer that covers the entire substrate; and (c) performing a manufacturing process that may include coupling the multiple mesas to the substrate.
In order to better understand the subject matter that is disclosed herein and to exemplify how it may be carried out in practice, embodiments will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:
Any reference to a system should be applied, mutatis mutandis to a method that is executed by the system.
Any reference to method should be applied, mutatis mutandis to system that is configured to execute the method and/or to a unit manufactured by the method.
A wafer is a non-limiting example of a substrate or an object that includes a substrate.
There is provided a structure that includes semiconductor devices (such as but not limited to active semiconductor devices such as transistors) and a substrate that may exhibit a high thermal conductivity. There is also provided a method for manufacturing the apparatus. High thermal conductivity may include values of above 250 Watt/(Kelvin*meter)—especially above 1000 and even above 1500 Watt/(Kelvin*Meter).
The manufacturing process and the apparatus are cheap and may have any desired size.
Method 700 may include:
It should be noted that step 710 may be replaced by receiving the multiple donor structures.
Step 730 may include at least one out:
The overall area of the donor elements may be a fraction (for example smaller than 1/X, wherein X may exceed two, three, four, ten, one hundred, and the like) of the area of the substrate. See—for example
Usually most of the wafer is allocated for supporting passive elements.
The first manufacturing process may be executed independently from the second manufacturing process—by a different manufacturing tool, under different conditions, and the like.
By manufacturing the donor elements and them attaching them to the substrate—there is no need to manufacture one or more semiconductors layer that “cover” the entire substrate—and then remove, destroy, and/or cancel the semiconductor quality of most of the one or more semiconductor layers—thus providing a more efficient manufacturing process.
Step 710 of generating, by applying a first manufacturing process, the donor elements may include generating donor structures that are removable from a substrate. This may be achieved by receiving or manufacturing a sacrificial layer and a substrate (such as but not limited to a silicon substrate), and then manufacturing donor structures on the sacrificial layer.
The sacrificial layer may be removed during (or before) the removal of the donor structures.
The donor structures may include supporting elements (such as legs) that may provide a certain space between the donor structures and the substrate—after the sacrificial layer is removed.
The donor elements may be extracted from the donor structures at a later stage. Alternatively—the donor elements may be the donor structures.
The donor structures may be manufactured by any process—for example (referring to
In
The MCD substrate is cheap and can be easily manufactured to any desired size (for example 4″, 6″, 8″ diameter—and even more). It also exhibits a high thermal conductivity.
In
The manufacturing the SCD donor elements may include:
The left part of
The right part of
Any of the mentioned above materials may be replaced by an equivalent material.
The mentioned above process may be applied for manufacturing semiconductor devices and integrated circuits (IC) on diamond, SiC, AlN, Si and other high thermal conductive substrates by transfer printing.
Transfer printing involves the use of a soft elastomer with engineered features of relief on its surface for high speed, precision, nondestructive retrieval of spatially selected collections of micro- and nanostructured materials formed on a ‘donor’ substrate for the purpose of delivery and distribution into two-dimensionally organized arrays on a ‘receiver’ of virtually any type of substrate in a massively parallel, deterministic manner.
The ‘donor’ elements can be fabricated from single crystalline diamond, GaN/Si, SiC and epitaxially grown III-V compound semiconductors in schemes that involve selective wet chemical etching of underlying ‘sacrificial’ materials to release them from donor substrates. For the preparation of donor materials in printable forms, micro-fabricated structures serve to retain lithographically defined layouts after undercut release.
The manufacturing process may prevent overheating of high power active and passive components such as diodes, transistors and may be applicable to apparatuses such as integrated circuit, MEMS, solar cells, light-emitting diodes, lasers, photodetectors and integrated collections of these in functional systems
The manufacturing process is based on using at least some out of:
While certain features of the invention have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will now occur to those of ordinary skill in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.
Any reference to any of the terms “comprise”, “comprises”, “comprising” “including”, “may include” and “includes” may be applied to any of the terms “consists”, “consisting”, “consisting essentially of”.
Any reference to the phrase “may be” should also be interpreted as “may not be”.
In the foregoing specification, the invention has been described with reference to specific examples of embodiments of the invention. It will, however, be evident that various modifications and changes may be made therein without departing from the broader spirit and scope of the invention as set forth in the appended claims.
Moreover, the terms “front,” “back,” “rear” “top,” “bottom,” “over,” “under” and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions. It is understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein.
Those skilled in the art will recognize that the boundaries between various components are merely illustrative and that alternative embodiments may merge various components or impose an alternate decomposition of functionality upon various components. Thus, it is to be understood that the architectures depicted herein are merely exemplary, and that in fact many other architectures can be implemented which achieve the same functionality.
Any arrangement of components to achieve the same functionality is effectively “associated” such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality can be seen as “associated with” Each other such that the desired functionality is achieved, irrespective of architectures or intermedial components. Likewise, any two components so associated can also be viewed as being “operably connected,” or “operably coupled,” to Each other to achieve the desired functionality.
Furthermore, those skilled in the art will recognize that boundaries between the above described operations merely illustrative. The multiple operations may be combined into a single operation, a single operation may be distributed in additional operations and operations may be executed at least partially overlapping in time. Moreover, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in various other embodiments.
However, other modifications, variations and alternatives are also possible. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.
In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word ‘comprising’ does not exclude the presence of other elements or steps than those listed in a claim. Furthermore, the terms “a” or “an,” as used herein, are defined as one or more than one. Also, the use of introductory phrases such as “at least one” and “one or more” in the claims should not be construed to imply that the introduction of another claim element by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim element to inventions containing only one such element, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an.” The same holds true for the use of definite articles. Unless stated otherwise, terms such as “first” and “second” are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other prioritization of such elements. The mere fact that certain measures are recited in mutually different claims does not indicate that a combination of these measures cannot be used to advantage.
This application claims priority of U.S. provisional patent Ser. No. 62/576,103, filing date Oct. 24, 2018.
Number | Name | Date | Kind |
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20100317132 | Rogers | Dec 2010 | A1 |
Number | Date | Country | |
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20190157109 A1 | May 2019 | US |
Number | Date | Country | |
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62576103 | Oct 2017 | US |