Embodiments herein relate to methods and apparatus for electroplating material onto substrates. The substrates are typically semiconductor substrates and the material is typically metal.
The disclosed embodiments relate to methods and apparatus for controlling electrolyte hydrodynamics during electroplating. More particularly, methods and apparatus described herein are particularly useful for plating metals onto semiconductor wafer substrates, such as through resist plating of small microbumping features (e.g., copper, nickel, tin and tin alloy solders) having widths less than, e.g., about 50 μm, and copper through silicon via (TSV) features.
Electrochemical deposition is now poised to fill a commercial need for sophisticated packaging and multichip interconnection technologies known generally and colloquially as wafer level packaging (WLP) and through silicon via (TSV) electrical connection technology. These technologies present their own very significant challenges due in part to the generally larger feature sizes (compared to Front End of Line (FEOL) interconnects) and high aspect ratios.
Depending on the type and application of the packaging features (e.g., through chip connecting TSV, interconnection redistribution wiring, or chip to board or chip bonding, such as flip-chip pillars), plated features are usually, in current technology, greater than about 2 micrometers and are typically about 5-100 micrometers in their principal dimension (for example, copper pillars may be about 50 micrometers). For some on-chip structures such as power busses, the feature to be plated may be larger than 100 micrometers. The aspect ratios of the WLP features are typically about 1:1 (height to width) or lower, though they can range as high as perhaps about 2:1 or so, while TSV structures can have very high aspect ratios (e.g., in the neighborhood of about 20:1).
Certain embodiments herein relate to methods and apparatus for electroplating a substrate. The substrate is substantially planar, and may be a semiconductor substrate.
In one aspect of the embodiments herein, an electroplating apparatus is provided, the apparatus including: (a) a plating chamber configured to contain an electrolyte and an anode while electroplating metal onto a substrate, the substrate being substantially planar; (b) a substrate holder configured to support the substrate such that a plating face of the substrate is immersed in the electrolyte and separated from the anode during plating; (c) an ionically resistive element adapted to provide ionic transport through the ionically resistive element during electroplating, where the ionically resistive element is a plate including a plurality of through-holes; (d) a cross flow manifold positioned above the ionically resistive element and below the plating face of the substrate, when the substrate is present in the substrate holder; and (e) a membrane in physical contact with the ionically resistive element, where the membrane is adapted to provide ionic transport through the membrane during electroplating, and where the membrane is adapted to reduce a flow of electrolyte through the ionically resistive element during electroplating.
In various embodiments, the membrane is planar and is positioned within a plane parallel to the ionically resistive element. In some cases, the membrane covers all of the plurality of through-holes in the ionically resistive element. In some other cases, the membrane includes one or more cutout regions such that the membrane only covers some of the plurality of through-holes in the ionically resistive element. In one example, the membrane includes a first cutout region positioned near a center of the ionically resistive element. In these or other embodiments, the membrane may include a second cutout region positioned near a side inlet to the cross flow manifold. In certain implementations, the cutout region is azimuthally non-uniform. In one example, the cutout region extends between the side inlet and a center of the ionically resistive element.
In some embodiments, the membrane is positioned below the ionically resistive element. In other embodiments, the membrane is positioned above the ionically resistive element. In a particular embodiment, the membrane is positioned below the ionically resistive element and a second membrane is positioned above the ionically resistive element, in contact with the ionically resistive element.
In certain implementations, the apparatus further includes a membrane frame configured to position the membrane in physical contact with the ionically resistive element. In a particular example, the membrane is positioned above the ionically resistive element, the membrane frame is positioned above the membrane, and the membrane frame includes a first set of ribs that are linear and parallel to one another, and extend in a direction perpendicular to a direction of cross flowing electrolyte within the cross flow manifold. In some such cases, the membrane frame further includes a second set of ribs that extend in a direction perpendicular to the first set of ribs. The membrane frame is a plate having a plurality of openings therein. The openings may be circular. The openings may also be another shape (e.g., ovular, polygonal, etc.). In some examples, the membrane frame is ring-shaped. The ring-shaped membrane frame may support the membrane at its periphery (or a portion thereof).
In another aspect of the disclosed embodiments, an electroplating apparatus is provided, the apparatus including: (a) a plating chamber configured to contain an electrolyte and an anode while electroplating metal onto a substrate, the substrate being substantially planar; (b) a substrate holder configured to support the substrate such that a plating face of the substrate is immersed in the electrolyte and separated from the anode during plating; (c) an ionically resistive element adapted to provide ionic transport through the ionically resistive element during electroplating, where the ionically resistive element is a plate including a plurality of through-holes; (d) a cross flow manifold positioned above the ionically resistive element and below the plating face of the substrate, when the substrate is present in the substrate holder; (e) a side inlet for introducing electrolyte to the cross flow manifold; (f) a side outlet for receiving electrolyte flowing in the cross flow manifold, where the side inlet and side outlet are positioned proximate azimuthally opposing perimeter locations on the plating face of the substrate during electroplating, and where the side inlet and side outlet are adapted to generate cross-flowing electrolyte in the cross flow manifold during electroplating; (g) an anode chamber membrane frame positioned below the ionically resistive element; and (h) an ionically resistive element manifold positioned below the ionically resistive element and above the anode chamber membrane frame, where the ionically resistive element manifold includes a plurality of baffle regions that are partially separated from one another by vertically oriented baffles positioned below the ionically resistive element, where each baffle extends from a first region proximate the ionically resistive element to a second region proximate the anode chamber membrane frame, where the baffles do not physically contact the anode chamber membrane frame, and where during electroplating electrolyte travels (i) from the plurality of electrolyte source regions, through the ionically resistive element, into the cross flow manifold, and out the side outlet, (ii) from the side inlet, through the cross flow manifold, and out the side outlet, and (iii) under the baffles from one baffle region to another.
In another aspect of the disclosed embodiments, an electroplating apparatus is provided, the apparatus including: (a) a plating chamber configured to contain an electrolyte and an anode while electroplating metal onto a substrate, the substrate being substantially planar; (b) a substrate holder configured to support the substrate such that a plating face of the substrate is immersed in the electrolyte and separated from the anode during plating; (c) an ionically resistive element adapted to provide ionic transport through the ionically resistive element during electroplating, where the ionically resistive element is a plate including a plurality of through-holes; (d) a cross flow manifold positioned above the ionically resistive element and below the plating face of the substrate, when the substrate is present in the substrate holder; (e) an anode chamber membrane frame positioned below the ionically resistive element, the anode chamber membrane frame configured to mate with an anode chamber membrane; and (f) an ionically resistive element manifold positioned below the ionically resistive element and above the anode chamber membrane, when present, where the ionically resistive element manifold includes a plurality of baffle regions that are at least partially separated from one another by vertically oriented baffles, where each baffle extends from a first region proximate the ionically resistive element to a second region proximate the anode chamber membrane.
In some embodiments, the baffles extend linearly across the ionically resistive element manifold in a direction perpendicular to a direction between a side inlet and a side outlet, where the side inlet and side outlet are adapted to generate cross-flowing electrolyte in the cross flow manifold during electroplating. In some cases, the apparatus further includes the anode chamber membrane in contact with the anode chamber membrane frame, where the anode chamber membrane separates the anode from the substrate during electroplating. In various embodiments, an upper region of each baffle may be in physical contact with the ionically resistive element or a frame positioned proximate the ionically resistive element. In these or other embodiments, during electroplating, the baffles may operate to reduce an amount of electrolyte that travels from the cross flow manifold, through the ionically resistive element, and into the ionically resistive element manifold. The anode chamber membrane frame may include the baffles in some cases. In certain implementations, the apparatus further includes a back side insert positioned between the ionically resistive element and the anode chamber membrane frame, where the back side insert includes a plurality of protrusions oriented parallel to the baffles and configured to mate with the baffles. In some cases, the baffles do not extend all the way to the anode chamber membrane frame. In some instances, the ionically resistive element includes the baffles. In these or other cases, the apparatus may further include a back side insert positioned between the ionically resistive element and the anode chamber membrane frame, and the back side insert may include the baffles. In certain other cases, the baffles are removable pieces that are not integral with the ionically resistive element, the anode chamber membrane frame, nor the back side insert. In some such cases, the baffles fit into recesses in at least one of the ionically resistive element, the anode chamber membrane frame, and the back side insert.
In a further aspect of the disclosed embodiments, a method of electroplating is provided, the method including electroplating a substrate in any of the electroplating apparatus described herein.
These and other features will be described below with reference to the associated drawings.
Described herein are apparatus and methods for electroplating one or more metals onto a substrate. Embodiments are described generally where the substrate is a semiconductor wafer; however the embodiments are not so limited.
In certain embodiments, the ionically resistive element 107 approximates a nearly constant and uniform current source in the proximity of the substrate (cathode) and, as such, may be referred to as a high resistance virtual anode (HRVA) or channeled ionically resistive element (CIRP) in some contexts. Normally, the ionically resistive element 107 is placed in close proximity with respect to the wafer. In contrast, an anode in the same close-proximity to the substrate would be significantly less apt to supply a nearly constant current to the wafer, but would merely support a constant potential plane at the anode metal surface, thereby allowing the current to be greatest where the net resistance from the anode plane to the terminus (e.g., to peripheral contact points on the wafer) is smaller. So while the ionically resistive element 107 has been referred to as a high-resistance virtual anode (HRVA), this does not imply that electrochemically the two are interchangeable. Under certain operational conditions, the ionically resistive element 107 would more closely approximate and perhaps be better described as a virtual uniform current source, with nearly constant current being sourced from across the upper plane of the ionically resistive element 107.
The ionically resistive element 107 contains micro size (typically less than 0.04″) through-holes that are spatially and ionically isolated from each other. In some cases, the through-holes do not form interconnecting channels within the body of ionically resistive element. Such through-holes are often referred to as non-communicating or one dimensional through-holes. They typically extend in one dimension, often, but not necessarily, normal to the plated surface of the wafer (in some embodiments the non-communicating holes are at an angle with respect to the wafer which is generally parallel to the ionically resistive element front surface). Often the non-communicating through-holes are parallel to one another. Often the non-communicating through-holes are arranged in a square array. Other times the layout is in an offset spiral pattern. These non-communicating through-holes are distinct from 3-D porous networks, where the channels extend in three dimensions and form interconnecting pore structures, because the non-communicating through-holes restructure both ionic current flow and (in certain cases) fluid flow parallel to the surface therein, and straighten the path of both current and fluid flow towards the wafer surface. However, in certain embodiments, such a porous plate, having an interconnected network of pores, may be used as the ionically resistive element. As used herein, the term “through-holes” is intended to cover both non-communicating through-holes and interconnected networks of pores, unless otherwise specified. When the distance from the plate's top surface to the wafer is small (e.g., a gap of about 1/10 the size of the wafer radius, for example less than about 5 mm), divergence of both current flow and fluid flow is locally restricted, imparted and aligned with the ionically resistive element channels.
One example ionically resistive element 107 is a disc made of a solid, non-porous dielectric material that is ionically and electrically resistive. The material is also chemically stable in the plating solution of use. In certain cases the ionically resistive element 107 is made of a ceramic material (e.g., aluminum oxide, stannic oxide, titanium oxide, or mixtures of metal oxides) or a plastic material (e.g., polyethylene, polypropylene, polyvinylidene difluoride (PVDF), polytetrafluoroethylene, polysulphone, polyvinyl chloride (PVC), polycarbonate, and the like), having between about 6,000-12,000 non-communicating through-holes. The ionically resistive element 107, in many embodiments, is substantially coextensive with the wafer (e.g., the ionically resistive element 107 has a diameter of about 300 mm when used with a 300 mm wafer) and resides in close proximity to the wafer, e.g., just below the wafer in a wafer-facing-down electroplating apparatus. Preferably, the plated surface of the wafer resides within about 10 mm, more preferably within about 5 mm of the closest ionically resistive element surface. To this end, the top surface of the ionically resistive element 107 may be flat or substantially flat. Often, both the top and bottom surfaces of the ionically resistive element 107 are flat or substantially flat. In a number of embodiments, however, the top surface of the ionically resistive element 107 includes a series of linear ribs, as described further below.
As above, the overall ionic and flow resistance of the plate 107 is dependent on the thickness of the plate and both the overall porosity (fraction of area available for flow through the plate) and the size/diameter of the holes. Plates of lower porosities will have higher impinging flow velocities and ionic resistances. Comparing plates of the same porosity, one having smaller diameter 1-D holes (and therefore a larger number of 1-D holes) will have a more micro-uniform distribution of current on the wafer because there are more individual current sources, which act more as point sources that can spread over the same gap, and will also have a higher total pressure drop (high viscous flow resistance). The flow of electrolyte through the ionically resistive element 107 can also be affected by the presence of a membrane provided parallel to and in physical contact with the ionically resistive element 107, as discussed further below.
In some cases, about 1-10% of the ionically resistive element 107 is open area through which ionic current can pass (and through which electrolyte can pass if there is no other element blocking the openings). In particular embodiments, about 2-5% the ionically resistive element 107 is open area. In a specific example, the open area of the ionically resistive element 107 is about 3.2% and the effective total open cross sectional area is about 23 cm2. In some embodiments, non-communicating holes formed in the ionically resistive element 107 have a diameter of about 0.01 to 0.08 inches. In some cases, the holes have a diameter of about 0.02 to 0.03 inches, or between about 0.03-0.06 inches. In various embodiments the holes have a diameter that is at most about 0.2 times the gap distance between the ionically resistive element 107 and the wafer. The holes are generally circular in cross section, but need not be. Further, to ease construction, all holes in the ionically resistive element 107 may have the same diameter. However this need not be the case, and both the individual size and local density of holes may vary over the ionically resistive element surface as specific requirements may dictate.
The ionically resistive element 107 shown in
In
The apparatus may include various additional elements as needed for a particular application. In some cases, an edge flow element may be provided proximate the periphery of the substrate, within the cross flow manifold. The edge flow element may be shaped and positioned to promote a high degree of electrolyte flow (e.g., cross flow) near the edges of the substrate. The edge flow element may be ring-shaped or arc-shaped in certain embodiments, and may be azimuthally uniform or non-uniform. Edge flow elements are further discussed in U.S. patent application Ser. No. 14/924,124, filed Oct. 27, 2015, and titled “EDGE FLOW ELEMENT FOR ELECTROPLATING APPARATUS,” which is herein incorporated by reference in its entirety.
In some cases, the apparatus may include a sealing member for temporarily sealing the cross flow manifold. The sealing member may be ring-shaped or arc-shaped, and may be positioned proximate the edges of the cross flow manifold. A ring-shaped sealing member may seal the entire cross flow manifold, while an arc-shaped sealing member may seal a portion of the cross flow manifold (in some cases leaving the side outlet open). During electroplating, the sealing member may be repeatedly engaged and disengaged to seal and unseal the cross flow manifold. The sealing member may be engaged and disengaged by moving the substrate holder, ionically resistive element, front side insert, or other portion of the apparatus that engages with the sealing member. Sealing members and methods of modulating cross flow are further discussed in the following U.S. patent applications, each of which is herein incorporated by reference in its entirety: U.S. patent application Ser. No. 15/225,716, filed Aug. 1, 2016, and titled “DYNAMIC MODULATION OF CROSS FLOW MANIFOLD DURING ELECTROPLATING”; and U.S. patent application Ser. No. 15/161,081, filed May 20, 2016, and titled “DYNAMIC MODULATION OF CROSS FLOW MANIFOLD DURING ELECTROPLATING.”
In various embodiments, one or more electrolyte jet may be provided to deliver additional electrolyte above the ionically resistive element. The electrolyte jet may deliver electrolyte proximate a periphery of the substrate, or at a location that is closer to the center of the substrate, or both. The electrolyte jet may be oriented in any position, and may deliver cross flowing electrolyte, impinging electrolyte, or a combination thereof. Electrolyte jets are further described in U.S. patent application Ser. No. 15/455,011, filed Mar. 9, 2017, and titled “ELECTROPLATING APPARATUS AND METHODS UTILIZING INDEPENDENT CONTROL OF IMPINGING ELECTROLYTE,” which is herein incorporated by reference in its entirety.
Various embodiments herein relate to methods and apparatus for reducing and/or controlling the degree to which electrolyte delivered to the cross flow manifold is able to bypass the cross flow manifold as described in relation to
In many cases, one or more membrane may be provided proximate an ionically resistive element. The membrane may be provided in a plane parallel to the ionically resistive element, in physical contact with this element. The membrane may be provided to reduce the degree to which electrolyte is able to flow backwards from the cross flow manifold, through the ionically resistive element, and down into the ionically resistive element manifold. The membrane may similarly reduce the degree to which electrolyte is able to flow in the opposite direction, from the ionically resistive element manifold, through the ionically resistive element, and up into the cross flow manifold. Such a membrane may be provided in addition to a membrane that separates the anode from the substrate (e.g., membrane 105 in
Although such a membrane may reduce the degree to which electrolyte impinges upon the surface of the substrate (e.g., after jetting through the holes in the ionically resistive element), this effect may be outweighed by benefits related to higher cross flow within the cross flow manifold (especially near the center of the substrate), improved non-uniformity of plating results, and in some cases, purposeful routing of electrolyte to particular portions of the substrate surface.
The membrane may be positioned either above the ionically resistive element, below the ionically resistive element, or within the ionically resistive element.
In each of
The membrane may be made of a variety of materials. Generally, any material used for membrane 105 may also be used for membrane 120. Membrane 105 is further described in the following U.S. patents, each of which is herein incorporated by reference in its entirety: U.S. Pat. No. 9,677,190, titled “MEMBRANE DESIGN FOR REDUCING DEFECTS IN ELECTROPLATING SYSTEMS”; U.S. Pat. No. 6,527,920, titled “COPPER ELECTROPLATING METHOD AND APPARATUS”; U.S. Pat. No. 6,821,407, titled “ANODE AND ANODE CHAMBER FOR COPPER ELECTROPLATING”; and U.S. Pat. No. 8,262,871, titled “PLATING METHOD AND APPARATUS WITH MULTIPLE INTERNALLY IRRIGATED CHAMBERS.”
The membrane material allows current to pass easily through the membrane, while reducing the degree to which fluid is able to pass through the membrane. In various cases, the membrane material has a relatively high flow resistance factor. As an example, the membrane may exhibit a pure water flux between about 1-2.5 GFD/PSI at about 25° C.
Example materials for the membrane include, but are not limited to, sub-micron filter materials, nanoporous filter materials, ion exchange materials (e.g., cation exchange materials), etc. Commercial examples of these include Dupont Nafion N324, Ion Power Vanadion 20-L, and Koch Membranes HFK-328 (PE/PES). These materials provide a substantial flow resistance, while allowing ions to migrate through the membrane when under the influence of an electromotive force.
The membrane should be sufficiently thick to be mechanically stable and provide a relatively high flow resistance. The membrane should be sufficiently thin to allow ionic current to easily pass through. In some embodiments, the membrane may have a thickness (measured up-down in
In a number of embodiments, a membrane frame may be provided to secure the membrane to the ionically resistive element. The membrane frame may be made of any of the same materials used to form anode chamber membrane frame 106, which supports membrane 105. The material used to fabricate the membrane frame should be resistant to the chemistry used during electroplating. Example materials include, but are not limited to, polyethylene, polyethylene terephthalate, polycarbonate, polypropylene, polyvinyl chloride, polyphenylene sulfide, etc. In some cases the membrane frame may be fabricated using 3D printing techniques.
The membrane frame should be shaped such that it supports the membrane against the ionically resistive element, while substantially allowing current to pass through the membrane. Many different designs are possible, further discussed below in relation to
Any of the membrane frames 121 shown or described in relation to
In cases where a membrane frame is provided above an ionically resistive element, the membrane frame may be designed to promote a desired flow pattern within the cross flow manifold. For example, with reference to
In some embodiments, the membrane includes one or more cutouts designed to route electrolyte through the cross flow manifold and ionically resistive element manifold as desired. In some cases this may be done to provide more uniform electroplating results. For example, if one area of a substrate experiences less plating than desired, electrolyte may be routed to this area to promote a higher degree of plating, resulting in a more uniform plating rate overall. A lower-than-desired local plating rate may be a result of locally thick photoresist in some cases. In these or other cases, a local plating rate may be lower-than-desired due to the flow pattern of electrolyte during electroplating. For instance, in some cases features near the center of the substrate experience less convection compared to features near the edge of the substrate, resulting in curved/domed features near the center of the substrate, and flat/sharp features near the edge of the substrate. This non-uniformity (e.g., commonly referred to as within-wafer non-uniformity) is not desirable. Irrespective of the cause, the non-uniformity can be mitigated by including one or more cutouts in the membrane proximate the ionically resistive element, where the cutouts route electrolyte in a desired manner.
In
In addition to cutouts provided to route electrolyte between the cross flow manifold and the ionically resistive element manifold (e.g., as described in relation to
Experimental results discussed below show that membranes as described herein are very useful in improving electroplating results, for example producing more desirable electrolyte flow and higher quality, more uniform plating results.
In some embodiments, one or more baffles may be provided in the ionically resistive element manifold in order to reduce the degree to which electrolyte undesirably bypasses the cross flow manifold as described above. The baffles may be formed as part of the ionically resistive element, a membrane frame proximate the ionically resistive element, a membrane frame proximate the anode chamber, a back side insert, or a separate piece of hardware. The baffles may be provided together as a single unit, or may be provided individually. Typically, the baffles are oriented perpendicular to the direction of cross flowing electrolyte within the cross flow manifold. In cases where the ionically resistive element or a membrane frame includes a series of linear ribs, the linear ribs and baffles may be oriented such that their lengths are parallel to one another. The baffles may also be referred to as walls.
In some cases, only a single baffle is used. The baffle may be located near the side inlet, near the center of the substrate, or near the side outlet. In other cases, two, three, four, five, six, or more baffles may be used. The baffles may be spaced evenly or unevenly. In some cases, the distance between adjacent baffles is between about 10 mm-30 mm, or between about 5 mm-150 mm. The width of each baffle (measured left-to-right in
In other cases, the baffles may be less extensive. For instance, they may not extend all the way down to the membrane frame defining the anode chamber, and/or they may not extend all the way out to the edges of the electroplating chamber. In these cases, the baffles provide a resistance to electrolyte flow, but not as great as the previous example. In some embodiments, it is desirable to provide increased convection/irrigation on a membrane near the anode chamber.
In certain implementations, the membrane frame that supports the membrane defining the anode chamber may be modified to mate with the baffles.
In some embodiments the baffles in the ionically resistive element manifold may be provided as part of the anode chamber membrane frame. In such cases, the anode chamber membrane frame may be referred to as a flow focusing membrane frame.
In the example of
Openings 141 are defined in the flow focusing membrane frame 145, between adjacent baffles 130 and support members. The openings 141 can be of various shapes and sizes, as desired for a particular application. In the embodiment of
In certain cases, the baffles of the flow focusing membrane frame do not extend all the way across the width of the ionically resistive element manifold. One benefit of this configuration is that a single flow focusing membrane frame can be used to electroplate different substrates with different back side inserts. For example, the back side insert may be designed to have a particular geometry (e.g., inner diameter) for a particular application. Different applications may utilize back side inserts of different sizes. The flow focusing membrane frame can be designed to interchangeably mate with various back side inserts to maximize the usefulness of the flow focusing membrane frame.
In certain embodiments (not shown), the apparatus may include both (i) a membrane in physical contact with the ionically resistive element (e.g., as described in relation to any of
The methods described herein may be performed by any suitable system/apparatus. A suitable apparatus includes hardware for accomplishing the process operations and a system controller having instructions for controlling process operations in accordance with the present embodiments. For example, in some embodiments, the hardware may include one or more process stations included in a process tool.
One embodiment of an electrodeposition apparatus 900 is schematically illustrated in
Referring once again to
In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can comprise semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
The various hardware and method embodiments described above may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility.
Lithographic patterning of a film typically comprises some or all of the following steps, each step enabled with a number of possible tools: (1) application of photoresist on a workpiece, e.g., a substrate having a silicon nitride film formed thereon, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or other suitable curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench or a spray developer; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper. In some embodiments, an ashable hard mask layer (such as an amorphous carbon layer) and another suitable hard mask (such as an antireflective layer) may be deposited prior to applying the photoresist.
In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, or 300 mm, or 450 mm. Further, the terms “electrolyte,” “plating bath,” “bath,” and “plating solution” are used interchangeably. The detailed description assumes the embodiments are implemented on a wafer. However, the embodiments are not so limited. The work piece may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other work pieces that may take advantage of the disclosed embodiments include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micro-mechanical devices and the like.
In the above description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.
Unless otherwise defined for a particular parameter, the terms “about” and “approximately” as used herein are intended to mean±10% with respect to a relevant value.
It is to be understood that the configurations and/or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated may be performed in the sequence illustrated, in other sequences, in parallel, or in some cases omitted. Likewise, the order of the above described processes may be changed. Certain references have been incorporated by reference herein. It is understood that any disclaimers or disavowals made in such references do not necessarily apply to the embodiments described herein. Similarly, any features described as necessary in such references may be omitted in the embodiments herein.
The subject matter of the present disclosure includes all novel and nonobvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and/or properties disclosed herein, as well as any and all equivalents thereof.
A number of embodiments described herein were tested by performing a static imprint on a non-patterned substrate having a seed layer of copper thereon. To perform a static imprint, a substrate is loaded into an electroplating apparatus that is filled with an acidic oxygen-rich solution. This solution is flowed through the apparatus in the same way that electrolyte flows through the apparatus during electroplating. The solution dissolves the copper seed layer to some degree, and areas that experience higher convection show a greater degree of etching. No current or potential is applied to the substrate during the static imprint. The substrate is not rotated during the static imprint.
This application claims benefit of U.S. Provisional Patent Application Ser. No. 62/548,116, filed Aug. 21, 2017, and titled “METHODS AND APPARATUS FOR FLOW ISOLATION AND FOCUSING DURING ELECTROPLATING,” which is herein incorporated by reference in its entirety and for all purposes.
Number | Date | Country | |
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62548116 | Aug 2017 | US |