Claims
- 1. A method of forming an integrated circuit, comprising:
a) forming a layered structure including at least first and second layers selected from first and second conducting layers, first and second dielectric layers or a first dielectric and a second conducting layer, with silicon filling spaces between the layers and the first and second layers being made of a material other than silicon; and b) etching the layered structure with a gas phase etchant selected from interhalogens and noble gas halides so as to remove the silicon and form a gap between the first and second layers and decrease the k value in the gap.
- 2. The method of claim 1, wherein the silicon is etched at a rate of 7.2 um/hr or less.
- 3. The method of claim 2, wherein the silicon is etched at a rate of about 3 um/hr or less.
- 4. The method of claim 1, wherein the silicon is amorphous silicon having a hydrogen concentration of 40 at % or less.
- 5. The method of claim 1, wherein the silicon is PECVD amorphous silicon deposited in a glow discharge.
- 6. The method of claim 1, wherein the etching of the silicon material is at a pressure of from 0.5 to 760 Torr.
- 7. The method of claim 6, wherein the etching of the silicon material is at a pressure of from 50 to 600 Torr.
- 8. The method of claim 1, wherein the selectivity toward a material other than silicon is 2000:1 or more.
- 9. The method of claim 2, wherein the selectivity toward a material other than silicon is 10000:1 or more.
- 10. The method of claim 1, wherein the silicon is preferentially etched relative to an adjacent metal in the first and/or second layer.
- 11. The method of claim 10, wherein the material other than silicon is a silicon compound.
- 12. The method of claim 11, wherein the silicon compound is silicon nitride or silicon dioxide.
- 13. The method of claim 11, wherein the material other than silicon is a ceramic material.
- 14. The method of claim 1, wherein the material other than silicon is a metal.
- 15. The method of claim 14, wherein the metal or metal alloy comprises copper, tantalum, titanium or aluminum.
- 16. The method of claim 15, wherein the metal is copper.
- 17. The method of claim 15, which is a damascene process.
- 18. The method of claim 1, wherein the silicon is PECVD, LPCVD or sputtered silicon.
- 19. The method of claim 1, wherein the silicon has a long range order of 100 nm or less.
- 20. The method of claim 16, wherein the ion implantation is performed on the silicon after deposition.
- 21. The method of claim 1, wherein prior to etching the silicon material:
depositing the silicon material on a substrate; and depositing the adjacent first and second layers before or after depositing the silicon.
- 22. The method of claim 21, wherein a semiconductor device is formed.
- 23. The method of claim 1, further comprising depositing a barrier material adjacent the first and/or second layers.
- 24. The method of claim 21, wherein the first layer comprises a metal and the second layer comprises a dielectric.
- 25. The method of claim 21, wherein the first and second layers comprise dielectric materials.
- 26. The method of claim 21, wherein a plurality of layers other than silicon are deposited on the silicon material.
- 27. The method of claim 1, wherein the silicon is polysilicon.
- 28. The method of claim 1, wherein the gas phase etchant is provided to a chamber in which the sample comprising silicon is disposed, and wherein the vapor phase etchant is capable of etching the sample in a non-energized state, and further comprising:
monitoring the gas in or from the etching chamber; and determining the end point of the etch based on the monitoring of the gas from the etching chamber.
- 29. The method of claim 28, wherein an end point is determined based on a value of an etching product passing below a threshold.
- 30. The method of claim 28, wherein a derivative is taken of partial pressure values of an etching product.
- 31. The method of claim 30, wherein an end point is determined when a derivative value is negative.
- 32. The method of claim 28, wherein an end point is determined when a partial pressure of a gas component decreases for a predetermined period of time.
- 33. The method of claim 28, wherein curve smoothing is performed prior to determining an end point of the etch.
- 34. The method of claim 28, wherein the material is silicon and the etchant is a gas fluoride etchant.
- 35. The method of claim 34, wherein the etch product that is monitored is a silicon fluoride compound.
- 36. The method of claim 35, wherein the etch product that is monitored is SiF, SiF2, SiF3 and/or SiF4.
- 37. The method of claim 1, wherein the silicon is doped during deposition.
- 38. The method of claim 37, wherein the silicon is doped with boron, phosphorous or arsenic.
- 39. The method of claim 38, wherein the doping is achieved by implantation at 1010 to 1014 ions/cm3.
- 40. The method of claim 39, wherein the doping is performed at an energy of 10 to 70 keV.
- 41. The method of claim 1, the silicon material is part of a silicon portion that is etched relative to a non-silicon portion of the sample, said non-silicon portion consisting of a member selected from the group consisting of a non-silicon metal, a compound of a non-silicon metal, and a silicon-containing compound in which silicon is bonded to a non-silicon element, by exposing both said silicon portion and said non-silicon portion to an etchant gas selected from the group consisting of noble gas fluorides and halogen fluorides, the improvement in which said etchant gas is utilized in the form of a gas mixture in which said etchant gas is mixed with a non-etchant gaseous additive, the partial pressure of said etchant gas in said gas mixture being at least about 0.1 mbar, and the molar ratio of said non-etchant gaseous additive to said etchant gas being from about 1:1 to about 500:1, such that said gas mixture achieves substantially greater etching selectivity toward said silicon portion than would be achieved with said etchant gas alone.
- 42. The method in accordance with claim 41 in which said non-etchant gaseous additive has a molar-averaged formula weight of less than about 25.
- 43. A method in accordance with claim 41 in which said non-etchant gaseous additive has a molar-averaged formula weight of from about 4 to about 25.
- 44. A method in accordance with claim 41 in which said non-etchant gaseous additive has a molar-averaged formula weight of from about 4 to about 20.
- 45. A method in accordance with claim 41 in which said non-etchant gaseous additive has a molar-averaged formula weight of from about 4 to about 10.
- 46. A method in accordance with claim 41 in which said non-etchant gaseous additive has a molar-averaged thermal conductivity at 300 K and atmospheric pressure of from about 10 mW/(m K) to about 200 mW/(m K).
- 47. A method in accordance with claim 41 in which said non-etchant gaseous additive has a molar-averaged thermal conductivity at 300 K and atmospheric pressure of from about 140 mW/(m K) to about 190 mW/(m K).
- 48. A method in accordance with claim 41 in which said molar ratio is from about 10:1 to about 200:1.
- 49. A method in accordance with claim 41 in which said molar ratio is from about 20:1 to about 150:1.
- 50. A method in accordance with claim 41 in which said non-etchant gaseous additive is a member selected from the group consisting of nitrogen, argon, helium, neon, and mixtures thereof.
- 51. A method in accordance with claim 41 in which said non-etchant gaseous additive is a member selected from the group consisting of helium, neon, mixtures of helium and neon, and mixtures of one or both of helium and neon with one or both of nitrogen and argon.
- 52. A method in accordance with claim 41 in which said non-etchant gaseous additive is a member selected from the group consisting of helium, a mixture of helium and nitrogen, and a mixture of helium and argon.
- 53. A method in accordance with claim 41 in which said non-etchant gaseous additive is a member selected from the group consisting of helium and a mixture of helium and nitrogen.
- 54. A method in accordance with claim 41 in which said non-etchant gaseous additive is helium.
- 55. A method in accordance with claim 41 in which said etchant gas is a noble gas fluoride.
- 56. A method in accordance with claim 55 in which said noble gas fluoride is a member selected from the group consisting of krypton difluoride and the xenon fluorides.
- 57. A method in accordance with claim 55 in which said noble gas fluoride is a member selected from the group consisting of xenon difluoride, xenon tetrafluoride, and xenon hexafluoride.
- 58. A method in accordance with claim 55 in which said noble gas fluoride is xenon difluoride.
- 59. A method in accordance with claim 55 in which said noble gas fluoride is xenon difluoride and said non-etchant gaseous additive is a member selected from the group consisting of helium, neon, and mixtures one or more or helium and neon with one or more of nitrogen and argon.
- 60. A method in accordance with claim 55 in which said noble gas fluoride is xenon difluoride and said non-etchant gaseous additive is a member selected from the group consisting of helium and a mixture of nitrogen and helium.
- 61. A method in accordance with claim 41 in which said etchant gas is a halogen fluoride.
- 62. A method in accordance with claim 61 in which said halogen fluoride is a member selected from the group consisting of chlorine trifluoride, bromine trifluoride, and iodine pentafluoride.
- 63. A method in accordance with claim 61 in which said halogen fluoride is a member selected from the group consisting of chlorine trifluoride and bromine trifluoride.
- 64. A method in accordance with claim 61 in which said halogen fluoride is bromine trifluoride.
- 65. A method in accordance with claim 41 in which the partial pressure of said etchant gas is from about 0.3 mbar to about 30 mbar.
- 66. A method, comprising:
a) forming a layered structure that includes a first conductive layer and either a dielectric layer or a second conductive layer, with silicon filling spaces between the conductive layer and the dielectric or second conductive layer; b) etching the layered structure with an etchant gas comprising an interhalogens or a noble gas halides so as to remove the silicon and form a gap between the first conductive layer and the dielectric or second conductive layer.
- 67. The method of claim 66, further comprising:
(a) placing said sample in an etching chamber disposed within a gas recirculation loop, said etching chamber in communication with a source of etchant gas, and said gas recirculation loop having a pump disposed therein; (b) passing etchant gas from said source of etchant gas into said etching chamber to expose said sample to said etchant gas; and (c) recirculating said etchant gas through said recirculation loop by way of said pump.
- 68. The method of claim 67 further comprising passing said etchant gas through an expansion chamber prior to step (b) and, while said etchant gas is in said expansion chamber, forming a mixture of said etchant gas with non-etchant gases, and step (b) comprises passing said etchant gas as part of said mixture into said etching chamber.
- 69. The method of claim 67, wherrein said pump is a continuous recirculation pump and step (c) comprises continuously recirculating said etchant gas through said recirculation loop.
- 70. The method of claim 67, further comprising bleeding etchant gas into said recirculation loop during step (c).
- 71. The method of claim 66, wherein the etchant gas is a gas mixture which further comprises a non-etchant gas additive at a partial pressure and a molar ratio relative to said fluoride gas such that said gas mixture achieves greater etching selectivity toward said silicon portion than would be achieved with said fluoride gas alone.
- 72. The method of claim 71, wherein said non-etchant gas additive is a member selected from the group consisting of nitrogen, argon, helium, neon, and mixtures thereof.
- 73. The method of claim 72, wherein the non-etchant gas additive is a member selected from the group consisting of helium, a mixture of helium and nitrogen, and a mixture of helium and argon.
- 74. The method of claim 73, wherein the gas phase etchant comprises xenon difluoride or bromine trifluoride and the non-etchant gas additive comprises helium.
- 75. A process for manufacturing a microprocessor, the process comprising:
a) creating a plurality of adjacent structures having a silicon fill between the adjacent structures; b) creating at least one layer above the adjacent structures and the fill; c) creating at least one discrete pathway to said fill through said layer; and d) converting said silicon fill to a gas product with a gas phase interhalogen or noble gas halide which gas product escapes through the pathway leaving an air void between the adjacent structures.
- 76. The process of claim 75, wherein the silicon fill comprises amorphous silicon.
- 77. The process of claim 75, wherein step (a) comprises creating a plurality of conductive lines.
- 78. The process of claim 77, wherein step (a) comprises creating a plurality of conductive lines surrounded by a barrier layer.
- 79. The process of claim 78, wherein the barrier layer comprises an early transition metal-silicon-nitride.
- 80. A method for forming air gaps between metal leads of a semiconductor device, comprising the steps of:
depositing a metal layer on a substrate; etching said metal layer in a pattern to form metal leads, said metal leads having tops; depositing a removable silicon layer between said metal leads; depositing a porous dielectric layer over said removable silicon layer and said metal leads; and removing said removable silicon layer through said porous dielectric layer with a gas phase interhalogen or noble gas halide so as to form air gaps between said metal leads beneath said porous dielectric layer.
- 81. A method of fabricating a multi-layered structure, the structure having a set of alternating layers selected from layers of semiconductor, conductor and insulator, wherein the neighboring layers are connected via a plurality of interconnects, and wherein the layers and the interconnects surround a multiplicity of intervening areas, the method comprising:
forming the multi-layered structure with a sacrificial material filled the intervening areas; and selectively etching the intervening areas for removing the sacrificial layer using with a gas phase interhalogen or noble gas halide.
- 82. The method of claim 81, after the step of etching the intervening areas, further comprising:
re-filling the intervening areas using a selected re-filling material.
- 83. The method of claim 82, wherein the re-filling material is an inert gas.
- 84. The method of claim 81, after the step of etching the intervening areas, further comprising:
selecting one or more intervening areas; selecting a re-filling material with an appropriate dielectric constant; and filling the selected intervening areas with the selected re-filling materials.
- 85. A method of forming an integrated circuit, comprising:
forming a layered structure including at least first and second layers selected from first and second conducting layers, first and second dielectric layers or a first dielectric and a second conducting layer, with silicon filling spaces between the layers and the first and second layers being made of a material other than silicon; and etching the layered structure with a gas phase etchant that is a supercritical fluid so as to remove the organic material and form a gap between the first and second layers and decrease the k value in the gap.
- 86. A method of fabricating a multi-layered structure, the structure having a set of alternating layers selected from layers of semiconductor, conductor and insulator, wherein the neighboring layers are connected via a plurality of interconnects, and wherein the layers and the interconnects surround a multiplicity of intervening areas, the method comprising:
forming the multi-layered structure with a sacrificial material filled the intervening areas; and selectively etching the intervening areas for removing the sacrificial layer using with a gas phase supercritical fluid
Parent Case Info
[0001] Related to the present application are U.S. Pat. No. 6,290,864 B1 issued Sep. 18, 2001 to Patel et al., and U.S. patent application Ser. No. 09/649,569 to Patel et al. filed Aug. 29, 2000; U.S. Ser. No. 60/293,092 to Patel et al. filed May 22, 2001; U.S. Ser. No. 09/954,864 to Patel et al. filed Sep. 17, 2001; and, U.S. Ser. No. 60/324,216 to Patel et al. filed Sep. 21, 2001, each of these being directed to various aspects of methods and apparatus for gas phase etching and are expressly incorporated herein by reference. Also relevant to the present invention is U.S. patent application Ser. No. 60/298,529 to Reid et al. filed Jun. 15, 2001 related to removal of organic materials with supercritical fluids and which is incorporated herein by reference.
[0002] Also relevant to the present invention are various US patents directed to air being the dielectric in a semiconductor device. Such patents include U.S. Pat. Nos. 6,228,770 to Pradeep et al., 6,057,224 to Bothra et al.; 6,171,971 to Natzle; 6,197,655 to Montanini et al.; 6,130,151 to Lin et al.; 6,287,979 to Zhou et al.; 6,268,261 to Petrarca et al.; 6,211,057 to Lin et al.; 6,071,805 to Liu et al.; 6,017,814 to Grill et al.; 5,814,555 to Bandyopadhyay et al.; 5,783,864 to Dawson et al.; 5,461,003 to Havemann et al.; 5,324,683 to Fitch et al.; 5,869,880 to Grill et al.; U.S. Pat. Nos. 5,559,055 to Chang et al.; 6,277,705 to Lee; 6,130151 to Lin et al.; 6,022,802 to Jang; 5,880,026 to Xing et al.; 5,759,913 to Fulford et al.; 5,708,303 to Jeng; 5,641,712 to Grivna et al.; 5,599,745 to Reinberg; 5,407,860 to Stoltz et al.; 5,310,700 to Lien et al.; 6,051,491 to Ito; 5,950,102 to Lee; 5,413,962 to Lur et al.; 5,227,658 to Beyer; 5,447,599 to Li et al.; 5,949,143 to Bang; 5,668,398 to Havemann; 6,300,667 to Miyamoto; 6,268,262 to Loboda; 6,211,561 to Zhao; 5,444,015 to Aitken et al.; 6,208,015 to Bandyopadhyay et al.; and 5,922,623 to Tsutsui, each of these patents incorporated herein by reference.
Provisional Applications (1)
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Number |
Date |
Country |
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60329385 |
Oct 2001 |
US |