Patent Application
20250006573
A semiconductor package may include a semiconductor die and a housing to cover the semiconductor die. The package may further include conductive terminals exposed to an exterior surface of the housing. The conductive terminals are coupled to the semiconductor die. The conductive terminals provide electrical pathways between circuitry on the semiconductor die and components (e.g., printed circuit boards) outside of the package.
In examples, a semiconductor package comprises a semiconductor die including a device side having circuitry formed therein. The device side includes a sensor. The package includes a metal member creating a hollow cavity extending through the metal member, the hollow cavity vertically aligned with the sensor, the metal member including a lower portion having a first wall thickness and an upper portion having varying wall thicknesses greater than and less than the first wall thickness, an intersection of the upper and lower portions forming a notch on an outer side of the metal member opposing the hollow cavity. The package also includes a mold compound covering portions of the semiconductor die and contacting the metal member.
In examples, a method for manufacturing a semiconductor package comprises positioning a photoresist layer on a semiconductor wafer having a sensor. The method includes using a photolithography reticle mask to alter the photoresist layer to form a first photoresist member having a first height and having a circular horizontal cross-section; a second photoresist member having a second height greater than the first height, the second photoresist member encircled by the first photoresist member and having a cylindrical shape; and a circular gap between the first and second photoresist members. The method also comprises plating a metal member having lower and upper portions, the lower portion filling the circular gap, and the upper portion extending above the circular gap such that the upper portion contacts a top surface of the first photoresist member and contacts an area of the second photoresist member that is higher than the top surface of the first photoresist member. The method also comprises removing the first and second photoresist members, the removal of the second photoresist member producing a hollow cavity in the metal member vertically aligned with the sensor.
Semiconductor packages can include various types of sensors. For example, packages may be configured to sense different properties of fluids and gases. Generally, such packages include a sensing area that is exposed to an ambient environment of the package so fluids, gases, and other materials to be sensed can come into contact with the sensing area.
Many such sensing packages are designed so the fluid, gas, or other material to be sensed does not make direct contact with porous or otherwise permeable materials, such as mold compounds, epoxies, etc. To this end, the packages may include metal walls (e.g., a cylindrical metal wall) surrounding the sensor so the material to be sensed only contacts the metal walls and the sensor, and not other, more permeable materials.
The structures of such metal walls, however, can be problematic. Many sensing packages include metal walls that have a “mushroom” shape, meaning that the top end of the wall farthest away from the package has a horizontal protrusion that obstructs access to the sensor. For instance, if the metal wall is cylindrical and the top end of the metal wall has a horizontal protrusion that obstructs the opening of the cylinder, ingress toward and egress away from the sensor becomes difficult. If ingress and egress are difficult, the flow rate of the material may be diminished, possibly resulting in inaccurate or outdated measurements by the sensor. Furthermore, photoresist may be used to form the metal wall, and if the horizontal protrusion described above obstructs the opening of the metal wall cylinder, it may be difficult to remove the photoresist during package manufacture.
This disclosure describes various examples of a semiconductor package having an open cavity sensor. The sensor is on a surface of the package and is exposed to an ambient environment of the package. The package includes a metal wall, such as a cylindrical metal wall, surrounding the sensor. Unlike prior solutions, the metal wall does not include horizontal protrusions obstructing ingress and egress of photoresist and materials to be sensed. As a result, photoresist is easily removed during manufacture, and materials to be sensed flow freely to and from the sensor, significantly improving sensor accuracy. The specific and unique semiconductor package manufacturing techniques described herein are useful to manufacture metal walls lacking horizontal protrusions that obstruct sensor access. These techniques and the resulting structures are now described with reference to the drawings.
The semiconductor package 100 also includes conductive terminals 108. The device side of the semiconductor die 104 is coupled to the conductive terminals 108 by way of bond wires 110. Each bond wire 110 may couple to the device side of the semiconductor die 104 by way of a ball bond and may further couple to a respective conductive terminal 108 by way of a stitch bond, for example.
In examples, a mold compound 112 covers the various components of the semiconductor package 100 that have been described above. The conductive terminals 108 are exposed to exterior surfaces of the mold compound 112 to facilitate coupling (e.g., soldering) to an exterior component or surface, such as a printed circuit board (PCB). The mold compound includes a cavity 114 (e.g., a cylindrical cavity). The cavity 114 is vertically aligned with the sensor 106, as shown. The cavity 114 has a diameter that is equivalent to the diameter of the sensor 106, assuming that the sensor 106 is circular. However, as explained, the sensor 106 may have differing shapes in different examples, and so more generally, the cavity 114 has horizontal dimensions that match or approximately match the horizontal dimensions of the sensor 106. In this way, the material to be sensed is confined to the cavity 114 and does not come into contact with (and, thus, damage) other parts of the device side of the semiconductor die 104. The cavity 114 is lined with a metal wall 116. (The cavity 114 may be said to be lined with the metal wall 116, and equivalently, the cavity 114 may be said to be formed in the metal wall 116.) The metal wall 116 may have a generally circular horizontal cross-section (as
The lower and upper portions 118, 120 meet at a notch 122. In some examples, the notch 122 is a right angle. The notch 122 is technically advantageous because it operates as a lock to mechanically retain mold compound 112 in place. The metal wall 116 is also technically advantageous because the metal wall 116 does not obstruct the cavity 114. Consequently, material to be sensed has free ingress and egress to and from the cavity 114 and the sensor 106.
Although the lack of horizontal protrusions obstructing the cavity 114 improves performance of the semiconductor package 100, at least some of the problems associated with such horizontal protrusions may remain if the diameter of the cavity 114 (i.e., the inner diameter of the metal wall 116) is too small. Accordingly, the diameter of the cavity 114 (i.e., the inner diameter of the metal wall 116) critically ranges from 100 microns to 150 microns, with a diameter wider than this range being disadvantageous because it would unacceptably increase die size, and with a diameter smaller than this range being disadvantageous because the diameter would not permit adequate ingress and egress of photoresist and materials to be sensed, as described above.
The method 200 includes positioning a photoresist layer on a semiconductor wafer having a sensor (202).
FIG. 3C1 shows a seed layer 302 on the device side of the wafer 300. The seed layer 302 may be applied by a sputtering technique, such as a copper sputtering technique, for example. FIG. 3C2 shows a top-down view of the structure of FIG. 3C1.
FIG. 3D1 shows photoresist 304 positioned on the seed layer 302. The photoresist 304 may be a positive or a negative photoresist. Critically, the photoresist 304 must be sensitive to grayscale reticles, meaning that different amounts of light affect the photoresist 304 differently. The photoresist 304 may be applied using a spin coating technique or any other suitable technique. FIG. 3D2 is a top-down view of the structure of FIG. 3D1.
The method 200 includes using a photolithography reticle mask (i.e., a grayscale photolithography mask) to alter the photoresist layer to form a first photoresist member having a first height and having a circular horizontal cross-section, and a second photoresist member having a second height greater than the first height (204). The second photoresist member is encircled by the first photoresist member and has a cylindrical shape (204). A circular gap is between the first and second photoresist members (204). FIG. 3E1 shows the photoresist 304 having undergone a photolithography process to form photoresist members 304a and 304b. Photoresist member 304a encircles photoresist member 304b. Photoresist member 304b may be a cylinder or similar shape. A gap 306 encircles the photoresist member 304, and the photoresist member 304a encircles the gap 306. The horizontal thickness of the gap 306 determines the wall thickness of the metal wall that is later formed in the gap 306, as described below. The horizontal diameter of the photoresist member 304b determines the inner diameter of the metal wall, as described below. The photolithography process is performed accordingly on the photoresist 304, thereby forming photoresist members 304a and 304b that are sized, shaped, and positioned appropriately to achieve the target dimensions of the metal wall.
Further, the heights of the photoresist members 304a, 304b are controlled such that the photoresist member 304b is taller than photoresist member 304a. As described below, when the metal wall is plated in gap 306, the metal wall will not be formed with horizontal protrusions that obstruct the cavity within the metal wall. Differing heights may be achieved for the photoresist members 304a, 304b by using a grayscale reticle during the photolithography process, because grayscale reticles provide finer control (i.e., granularity) over the amount of light passing through the reticle and onto the photoresist 304. FIG. 3E2 is a top-down view of the structure of FIG. 3E1.
The method 200 comprises plating a metal member having lower and upper portions, the lower portion filling the circular gap, and the upper portion extending above the circular gap such that the upper portion contacts a top surface of the first photoresist member and contacts an area of the second photoresist member that is higher than the top surface of the first photoresist member (206). The structure of FIG. 3F1 is identical to the structure of FIG. 3E1, except that the metal wall 116 has been plated (e.g., electroplated) in the gap 306. Specifically, the plating fills the gap 306 and, as the plating continues vertically, some of the plated metal “spills” over onto the top surface of the photoresist member 304a to form the “half-mushroom” shape provided by the upper portion 120, as shown. The plated metal also maintains contact with the outer surface of the photoresist member 304b as plating continues. If the horizontal wall thickness of the upper portion 120 is inadequate, the notch 122 will not properly form, and thus the notch 122 will not be able to properly retain the mold compound 112, as described above. Accordingly, it is critical that the horizontal thickness of the photoresist member 304a be adequate (i.e., a minimum of 100 microns) to support the formation of an adequately thick upper portion 120 (i.e., a minimum of 40 microns horizontal thickness).
Furthermore, the difference in heights between the photoresist members 304a, 304b must be within a critical range of 60 microns to 80 microns. A smaller height difference will result in a vertically thinner upper portion 120, which may be too thin to mechanically retain the mold compound 112 and may be subject to irreparable damage. A larger height difference will result in an upper portion 120 that has excessive vertical thickness, which may result in an inadequate notch 122 for retaining the mold compound 112. FIG. 3F2 is a top-down view of the structure of FIG. 3F1.
The method 200 includes removing the first and second photoresist members, with the removal of the second photoresist member producing a hollow cavity in the metal member that is vertically aligned with the sensor (208). FIG. 3G1 shows the structure of FIG. 3F1, except with the photoresist members 304a, 304b stripped, and the hollow cavity 308 having been formed. Because no portion of the metal wall 116 obstructs the cavity 308, the photoresist member 304b is easily removed, and further, ingress and egress of sensing materials is facilitated. FIG. 3G2 is a top-down view of the structure of FIG. 3G1.
The method 200 includes singulating the semiconductor wafer to produce a semiconductor die (210). FIG. 3H1 shows the structure of FIG. 3G1, except that the wafer 300 has been singulated to produce an individual semiconductor die 104. FIG. 3H2 is a top-down view of the structure of FIG. 3H1.
The method 200 includes coupling the semiconductor die to a die pad (212) and wirebonding the semiconductor die to conductive terminals (214).
The method 200 includes covering the conductive terminals, the die pad, the semiconductor die, and the metal member with a mold compound (216). FIG. 3K1 shows the structure of FIG. 3J1, but with the mold compound 112 applied to the various structures of the semiconductor package 100. A mold chase or other system for applying the mold compound 112 may be specifically designed to preclude mold compound from flowing into the cavity 308, thus leaving access to the sensor 106 unobstructed. FIG. 3K2 is a top-down view of the structure of FIG. 3K1.
In this description, the term “couple” may cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by direct connection; or (b) in a second example, device A is coupled to device B through intervening component C if intervening component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.
A device that is “configured to” perform a task or function may be configured (e.g., programmed and/or hardwired) at a time of manufacturing by a manufacturer to perform the function and/or may be configurable (or reconfigurable) by a user after manufacturing to perform the function and/or other additional or alternative functions. The configuring may be through firmware and/or software programming of the device, through a construction and/or layout of hardware components and interconnections of the device, or a combination thereof.
A circuit or device that is described herein as including certain components may instead be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and/or inductors), and/or one or more sources (such as voltage and/or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor die and/or integrated circuit (IC) package) and may be coupled to at least some of the passive elements and/or the sources to form the described structure either at a time of manufacture or after a time of manufacture, for example, by an end-user and/or a third-party.
While certain components may be described herein as being of a particular process technology, these components may be exchanged for components of other process technologies. Circuits described herein are reconfigurable to include the replaced components to provide functionality at least partially similar to functionality available prior to the component replacement. Components shown as resistors, unless otherwise stated, are generally representative of any one or more elements coupled in series and/or parallel to provide an amount of impedance represented by the shown resistor. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor.
Uses of the phrase “ground voltage potential” in the foregoing description include a chassis ground, an Earth ground, a floating ground, a virtual ground, a digital ground, a common ground, and/or any other form of ground connection applicable to, or suitable for, the teachings of this description. In this description, unless otherwise stated, “about,” “approximately” or “substantially” preceding a parameter means being within +/−10 percent of that parameter. Modifications are possible in the described examples, and other examples are possible within the scope of the claims.
