Number | Date | Country | Kind |
---|---|---|---|
9-046808 | Feb 1997 | JPX | |
10-016619 | Jan 1998 | JPX |
Number | Name | Date | Kind |
---|---|---|---|
5783340 | Farino et al. | Jul 1998 | |
5863680 | Kawakubo et al. | Jan 1999 |
Number | Date | Country |
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9-7924 | Jan 1997 | JPX |
Entry |
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F. Benistant et al., A Heavy Ion Implanted Pocket 1.10 .mu.m n-type Metal-Oxide-Semiconductor Field Effect Transistor With Hybrid Lithography (Electron-Beam/Deep Ultraviolet) and Specific Gate Passivation Process), J.Vac. Sci. Technol. B 14(6):4051-4054 (1996). |
R. Jonckheere et al., "Electron Beam/DUV Intra-Level Mix-and-Match Lithography for Random Logic 0.25 .mu.m CMOS", Microelectronic Engineering, 27:231-234 (1995). |