Claims
- 1. A photolithographic method for manufacturing a semiconductor device comprising:
- a step of applying photoresist onto a semiconductor substrate;
- a step of pre-baking said photoresist;
- a step of initially exposing said photoresist to light through a photomask, said photomask comprises a first part, a second part and a third part, each having different transparencies for exposing said photoresist, said first part being relatively opaque to said light, said second part being more transparent to said light than said first part, and said third part being more transparent to said light than said second part;
- a step of reversal-baking said photoresist;
- a step of flood-exposing said photoresist to light through another photomask positioned over an initially non-exposed region of the photoresist, said another photomask comprises a first part, a second part and a third part, each having different transparencies for exposing said photoresist, said first part being relatively opaque to said light, said second part being more transparent to said light than said first part, and said third part being more transparent to said light than said second part; and
- a step of developing said photoresist to form an aperture therein, said aperture having a platform and an overhang formed in a wall of said aperture.
- 2. A photolithographic method according to claim 1, further comprising a step of depositing metals onto said substrate through said aperture having the platform and the overhang.
- 3. A photolithographic method according to claim 2, further comprising a step of removing said photoresist having the platform and the overhang from said substrate.
- 4. A photolithographic method according to claim 1, wherein said method is applied for etching of said substrate through said aperture having the platform and the overhang.
- 5. A photolithographic method according to claim 1, wherein said method is applied for implantation of ions into said substrate through said aperture having the platform and the overhang.
Priority Claims (10)
Number |
Date |
Country |
Kind |
1-28496 |
Feb 1989 |
JPX |
|
1-28497 |
Feb 1989 |
JPX |
|
1-34338 |
Feb 1989 |
JPX |
|
1-34339 |
Feb 1989 |
JPX |
|
1-41069 |
Feb 1989 |
JPX |
|
1-41070 |
Feb 1989 |
JPX |
|
1-44713 |
Feb 1989 |
JPX |
|
1-44714 |
Feb 1989 |
JPX |
|
1-44715 |
Feb 1989 |
JPX |
|
1-52482 |
Mar 1989 |
JPX |
|
Parent Case Info
This application is a continuation of application Ser. No. 07/476/534, filed Feb. 7, 1990, now abandoned.
US Referenced Citations (10)
Non-Patent Literature Citations (1)
Entry |
Michael Bolsen, "AZ.RTM. 5200 Resists for Positive- and Negative Patterning", Hoechst High Chem, Jul. 1988. |
Continuations (1)
|
Number |
Date |
Country |
Parent |
476534 |
Feb 1990 |
|