Patent Application
20190350084
This application claims priority of Taiwan Patent Application Serial No. 107116111 entitled “Printed circuit board structure and method of forming the same” and filed May, 11, 2018, the entire disclosure of which is hereby incorporated by reference.
The present disclosure relates to a printed circuit board structure and a method of forming the same.
Among the packaging techniques being used nowadays, highly effective electronic components are usually electrically and mechanically connected to each other through solder bumps. For example, an integrated circuit (IC) chip is usually bonded with a packaging substrate by solder bumps. This kind of bonding technique is also known as flip-chip (FC) bonding, which belongs to area array bonding. Thus, the technique is suited for use with high-density packaging connection processes.
In the process mentioned above, an electrode pad is disposed on the surface of an IC chip, and a packaging substrate has a corresponding electric contact pad. The IC chip is electrically connected to the packaging substrate via the solder bumps disposed on the electric contact pad of the packaging substrate. Generally, the electric contact pad of the packaging structure is a copper plating layer formed by electroplating. However, during electroplating, the distribution of the magnetic lines of force of the electroplating bath will result in an uneven thickness of the copper plating layer. Thus, the solder bumps cannot become coplanar when the solder bumps are disposed on to the copper plating layer. This will result in forming non-contact openings when the IC chip is subsequently bonded with the solder bumps, leading to bonding failure and further affecting the electrical connectivity between the IC chip and the packaging substrate.
Consequently, a new structure of a printed circuit board and a method of making it are currently needed in order to obtain a copper layer that serves as an electric contact pad with even thickness. This increases the coplanarity of the solder bumps disposed on the copper layer, and further improves the mechanical and electrical connectivity between the IC chip and the packaging substrate.
In accordance with some embodiments of the present disclosure, a printed circuit board structure is provided. A printed circuit board structure includes a printed circuit board having a conductive structure and a dielectric structure. A copper foil layer having a first sub-copper foil layer and a second sub-copper foil layer is on the printed circuit board, wherein the dielectric structure and the first sub-copper foil layer have an opening, and the opening exposes the conductive structure. There is a conductive bump on the first sub-copper foil layer and in the opening, wherein the conductive bump is connected to the conductive structure. There is a recess between the first sub-copper foil layer and the second sub-copper foil layer, and a top surface of the second sub-copper foil layer is exposed.
In accordance with some embodiments of the present disclosure, a method of forming a printed circuit board structure is provided. A method of forming a printed circuit board structure includes providing a printed circuit board having a conductive structure and a dielectric structure, forming a copper foil layer on the printed circuit board, and patterning the dielectric structure and the copper foil layer to form a first opening. The first opening exposes the conductive structure. A first photoresist layer is then disposed on the copper foil layer, and the first photoresist layer is patterned to form a second opening. Afterwards, a conductive bump is formed in the first opening and in the second opening, where the conductive bump is electrically connected to the conductive structure. The first photoresist layer is removed, and a patterned second photoresist layer is formed on the copper foil layer and the conductive bump. The copper foil layer is patterned into a first sub-copper foil layer, a second sub-copper foil layer and a recess by using the patterned second photoresist layer as a mask. The patterned second photoresist layer is removed to expose the top surface of the second sub-copper foil layer.
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. In the description and the figures that follow, unless additional explanation is provided, the same or like components will be represented using similar reference numerals.
The following disclosure provides many different embodiments, or examples, for implementing different features of the subject matter provided. Specific examples of solutions and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. For simplicity and clarity, various features can be shown in different size arbitrarily.
Furthermore, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
An embodiment according to the present disclosure provides a printed circuit board structure and a method of forming the same. Through performing selective electroplating process, a portion of a copper foil layer is exposed as a contact pad. Due to the better evenness of the thickness of the copper foil layer, the solder bumps disposed on the copper foil layer could obtain better coplanarity, and the mechanical and electrical connectivity between the IC chip and the packaging substrate may be further improved.
Referring to
Then, referring to
In the comparative example mentioned above, as shown in
Referring to
Referring to
Afterwards, referring to
It should be noted that due to a portion of the copper foil layer 22 being covered by the photoresist layer 26, the copper plating layer (copper bumps) 30 may be selectively formed only in opening 24 and opening 28 during the electroplating process. The copper foil layer 22 that is shielded by the photoresist layer 26 does not have a copper plating layer. The copper foil layer 22 that is shielded by the photoresist layer 26 will afterwards become a contact pad (which is also known as an edge connector).
Referring to
In some embodiments, various suitable etching and/or stripping processes may be used, such as dry etching, wet etching, and/or other etching process (e.g. reactive ion etching (RIE), chemical mechanical polishing/planarization (CMP), etc.) to remove the photoresist layer 26/32. In some embodiments, the photoresist layer 32 may include one or more photosensitive materials. For example, the photoresist layer 32 may include a photoresist material that is sensitive to ultraviolet (UV), deep ultraviolet (DUV) and/or extreme ultraviolet (EUV) light. The photoresist layer 32 may be formed by a spin coating process or any other suitable process. In some embodiments, the method of patterning may include exposure, development, etching, a laser process, or any combination thereof.
As shown in
It should be noted that, during the process mentioned above, the area that is designed to form the copper foil layer 22b is covered by the photoresist layer 26 so the area does not have a copper plating layer. Thereby the top surface of the copper foil layer 22b can be exposed to serve as contact pads. Moreover, since the copper foil layer has better evenness of the copper thickness, the problem of the unevenness of the copper plating layer resulting from the distribution of the magnetic lines of force of the electroplating bath in the prior art may be avoided. By that means, the coplanarity of the solder bumps disposed on the sub-copper layer 22b in the subsequent processes may be further increased. The mechanical and the electrical connectivity between an IC chip and a printed circuit board 200 may be improved as well.
To sum up, the embodiments in this disclosure provide a printed circuit board structure and a method of forming the same. By selective electroplating, a portion of a copper foil layer is exposed to serve as contact pads. Since the copper foil layer has better evenness of the copper thickness, the coplanarity of the solder bumps disposed on the copper foil layer can be increased, and the mechanical and the electrical connectivity between an IC chip and a printed circuit board may be further improved.
The foregoing outlines features of several embodiments so that those of ordinary skill in the art may better understand the aspects of the present disclosure. Those of ordinary skill in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those of ordinary skill in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 107116111 | May 2018 | TW | national |
