The present application is based upon and claims the benefit of priority to
Japanese Patent Application No. 2017-190159, filed Sep. 29, 2017, the entire contents of which are incorporated herein by reference.
The present invention relates to a printed wiring board with a built-in electronic component and relates to a method for manufacturing the printed wiring board.
Japanese Patent Laid-Open Publication No. 2008-244029 describes a method for manufacturing a printed wiring board, in which an electronic component is accommodated in an opening part of a core substrate and a space between the electronic component and an inner wall of the opening part is filled with a resin that forms a resin insulating layer laminated on the core substrate. The entire contents of this publication are incorporated herein by reference.
According to one aspect of the present invention, a printed wiring board includes a core substrate, a first resin insulating layer formed on a first surface of the core substrate, a second resin insulating layer formed on a second surface of the core substrate on the opposite side with respect to the first surface, an electronic component accommodated in an opening portion formed in the core substrate, and a filling resin filling a space formed between the electronic component and an inner wall of the opening portion and including resin material that is different from resin material forming the first and second resin insulating layers. The core substrate has a first conductor pattern forming a first outermost layer of the core substrate and a second conductor pattern forming a second outermost layer of the core substrate on the opposite side with respect to the first conductor pattern, and the filling resin is filling spaces formed in the second conductor pattern of the core substrate.
According to another aspect of the present invention, a method for manufacturing a printed wiring board includes preparing a core substrate having a first conductor pattern forming a first outermost layer of the core substrate and a second conductor pattern forming a second outermost layer of the core substrate on the opposite side with respect to the first conductor pattern, forming an opening portion in the core substrate, accommodating an electronic component in the opening portion formed in the core substrate, filling a filling resin into a space formed between the electronic component and an inner wall of the opening portion of the core substrate, and forming resin insulating layers on a first surface and a second surface of the core substrate, respectively. The filling of the filling resin includes forming a resin layer including the filling resin on the second conductor pattern of the core substrate such that the filling resin fills spaces formed in the second conductor pattern, and polishing the resin layer such that the second conductor pattern is exposed, and the forming of the resin insulating layers includes forming one of the resin insulating layers on the second surface of the core substrate after the resin layer is polished.
A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein:
Embodiments will now be described with reference to the accompanying drawings, wherein like reference numerals designate corresponding or identical elements throughout the various drawings.
As illustrated in
The core substrate 11 is formed of a multilayer core and has a structure in which multiple insulating base materials (13K) having conductor patterns (12, 14) formed on front and back surfaces thereof are laminated with prepregs (13P) respectively sandwiched therebetween. A thickness of the conductor patterns 12 on the first surface (11F) side is larger than a thickness of the conductor patterns 12 on the second surface (11S) side. A thickness of the core substrate 11 is 150 μm or more and 2000 μm or less. Further, the thickness of the conductor patterns 12 on the first surface (11F) side is 15 μm, and the thickness of the conductor patterns 12 on the second surface (11S) side is 13 μm.
An opening part (11A) is formed in the core substrate 11. An electronic component 80 is accommodated in the opening part (11A). The electronic component 80 is, for example, a chip capacitor.
A space between the electronic component 80 and an inner wall of the opening part (11A) is filled with a filling resin 30. As a result. the electronic component 80 is fixed inside the opening part (11A). The filling resin 30 is formed of a resin different from a resin that forms the resin insulating layers 21.
The filling resin 30 is also filled in spaces between the conductor patterns 12 on the second surface (11S) side included in the core substrate 11. The resin that forms the resin insulating layers 21 is filled in spaces between conductor patterns 12 on the first surface (11F) side included in the core substrate 11.
Terminals of the electronic component 80 arranged on the first surface (11F) side are arranged flush with the conductor patterns 12 on the first surface (11F) side of the core substrate 11. The terminals of the electronic component 80 on the first surface (11F) side are connected to the conductor patterns 22 via via conductors 24. The via conductors 24 are formed by filling via holes 23 penetrating the resin insulating layers 21 with plating. Terminals of the electronic component 80 on the second surface (11S) side are connected to the conductor patterns 22 via the via conductors 24.
In the printed wiring board 10, through-hole conductors 16 connecting the conductor patterns 22 on the first surface (11F) side to the conductor patterns 22 on the second surface (11S) side are provided. The through-hole conductors 16 are formed on inner walls of through holes 15 penetrating the printed wiring board 10. An inner side of each of the through-hole conductors 16 is filled with a hole-filling resin 17. Both ends of each of the through-hole conductors 16 are covered by cover plating 18. Opening parts (14A) are provided in each of multiple conductor layers 14 included in the core substrate 11, and the through holes 15 are formed on inner sides of the opening parts (14A).
The printed wiring board 10 is manufactured as follows.
(1) As illustrated in
(2) As illustrated in
(3) As illustrated in
(4) As illustrated in
(5) As illustrated in
(6) As illustrated in
(7) As illustrated in
(8) As illustrated in
(9) The through holes 15 are formed by drilling, and the via holes 23 are formed by laser processing.
(10) An electroless plating treatment is performed. An electroless plating film 33 is formed on the resin insulating layers 21, in the via holes 23, and in the through holes 15 (
(11) As illustrated in
(12) An electrolytic plating treatment is performed. As illustrated in
(13) The plating resist 34 is peeled off, and the electroless plating film 33 under the plating resist 34 is removed. Then, the conductor patterns 22 are formed by the remaining electroless plating film 33 and electrolytic plating film 35.
(14) Processes similar to the above-described processes (8) and (10)-(13) are performed and the resin insulating layers 21 and the conductor patterns 22 are formed on the front and back sides one stage at a time. Further, the solder resist layers 26 are respectively formed on the front and back sides. As a result, the printed wiring board 10 illustrated in
The resin insulating layers 21 may each also be formed of a prepreg (a B-stage resin sheet obtained by impregnating a core material with a resin containing an inorganic filler). In this case, the conductor patterns 22 are formed by laminating a copper foil on each of the resin insulating layers 21 and then performing an electroless plating treatment and an electrolytic plating treatment.
In the method for manufacturing the printed wiring board 10 of the present embodiment, after the electronic component 80 is accommodated in the opening part (11A) of the core substrate 11, the space between the electronic component 80 and the inner wall of the opening part (11A) is filled with the filling resin 30, and the resin layer 31 composed of the filling resin 30 is formed on the conductor patterns 12 on the second surface (11S) side of the core substrate 11. Then, after a portion of each of the conductor patterns 12 and the resin layer 31 are polished, the resin insulating layer 21 is formed on the conductor patterns 12. As a result, the spaces between the conductor patterns 12 on the second surface (11S) side are filled with the filling resin 30.
In this way, in the present embodiment, since the resin insulating layer 21 is formed after the second surface (11S) of the core substrate 11 is flattened by polishing, the flatness of the resin insulating layer 21 is improved. In addition, since the resin layer 31 composed of the filling resin 30 is formed before polishing, the space between the electronic component 81 and the inner wall of the opening part (11A) can be reliably filled with the filling resin 30. As a result, the resin that forms the resin insulating layer 21 is prevented from entering the space between the electronic component 80 and the inner wall of the opening part (11A), and that the resin insulating layer 21 becomes thin near the electronic component 80 is prevented.
(1) The printed wiring board 10 may include multiple electronic components 80 having different thicknesses. In this case, it is possible that the multiple electronic components 80 are accommodated in one opening part (11A), or, as illustrated in
(2) In the above embodiment, the core substrate 11 may be a single-layer core having only one insulating base material (13K).
(3) The electronic component 80 may be a passive component such as a resistor or a coil, or may be an active component such as an IC chip formed of a semiconductor element.
(4) It is possible that the adhesive tape 40 is provided on both sides of a support plate, and printed wiring boards 10 are manufactured in parallel on both sides of the support plate.
(5) In the above embodiment, it is also possible that the core substrate 11 is placed in a manner that the electronic component 80 is accommodated in the opening part (11A) after the electronic component 80 is placed on the adhesive tape 40.
In the printed wiring board of Japanese Patent Laid-Open Publication No. 2008-244029, there may be a problem that flatness of the resin insulating layer near the electronic component is decreased.
A printed wiring board according to an embodiment of the present invention improves flatness of a resin insulating layer, and another embodiment of the present invention is to provide a method for manufacturing such a printed wiring board.
A printed wiring board according to an embodiment of the present invention includes: a core substrate having a first surface and a second surface respectively on front and back sides thereof and having conductor patterns on outermost layers; an opening part formed in the core substrate; an electronic component accommodated in the opening part; resin insulating layers that are respectively fomied on the first surface and on the second surface of the core substrate; and a filling resin that is formed of a resin different from a resin that forms the resin insulating layers and is filled in a space between the electronic component and an inner wall of the opening part. Spaces between the conductor patterns on the second surface side are filled with the filling resin.
A method for manufacturing a printed wiring board according to another embodiment of the present invention includes: preparing a core substrate having a first surface and a second surface respectively on front and back sides thereof and having conductor patterns on outermost layers; forming an opening part in the core substrate; accommodating an electronic component in the opening part; filling a space between the electronic component and an inner wall of the opening part with a filling resin; and forming resin insulating layers respectively on the first surface and on the second surface of the core substrate. Further, the filling of the space between the electronic component and the inner wall of the opening part with the filling resin includes: forming a resin layer composed of the filling resin on the conductor patterns on the second surface side and filling spaces between the conductor patterns on the second surface side with the filling resin; and exposing the conductor patterns on the second surface side by polishing the resin layer. Further, on the second surface, the resin insulating layer is formed after the resin layer is polished.
Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.
Number | Date | Country | Kind |
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2017-190159 | Sep 2017 | JP | national |