The above and other objects, characteristics and advantages of the invention will be more apparent from the following descriptions of preferred embodiments of the invention as shown in the drawings unnecessarily drawn to scale, where identical reference numbers indicate alike or identical parts, and thicknesses of a layer and a region are enlarged for clarity:
In order to make the above objects, characteristics and advantages of the invention more apparent, preferred embodiments of the invention will be described in detail with reference to the drawings.
Details will be presented in the following for a full understanding of the invention. However, the invention can be implemented in any way different from those disclosed here, and variations and modifications thereto can be obvious to those skilled in the art without departing from the scope of the invention. Note that the invention shall not be limited to the disclosed embodiments in the following.
A plasma etching process is important for semiconductor manufacturing technologies, and can be used for etching a medium layer including a silicon oxide layer, a silicon nitride layer, a polysilicon layer, etc., and a material with a high dielectric constant such as hafnium oxide, hafnium silicon oxide, hafnium silicon oxynitride, etc., for etching a metal layer such as copper, titanium, tungsten, tantalum, nickel, cobalt, etc., and for stripping the plasma ashing of an organic material of a photoresist, an anti-reflection layer, etc. An etching agent is typically in the form of gas including O2, N2, Ar, He, Ne, Cl2, O2—He, HBr, a fluorine-containing gas and a mixture thereof. Particularly, the etching of a dielectric layer primarily uses a fluorine-containing gas such as CF4, CH2F2, CHF3, SF6, etc.; the etching of a metal primarily uses a gas such as Cl2, Br2, HBr, etc.; and the plasma ashing primarily uses O2 for an organic material of a photoresist, an anti-reflecting layer, etc.
An etching gas is injected and an electron stream is introduced into a reaction chamber under a low-pressure environment. Electrons are accelerated through an RF electric field generated using an RF power source. Respective electrons collide with gas molecules for a transfer of kinetic energy, and the gas molecules are ionized to generate plasma. In addition to the use for etching, the generated plasma can also be used for such a process as deposition, ion implantation, etc.
Plasma etching is a type of dry etching, where a gaseous chemical etching agent is used to react with a material so as to form a volatile byproduct removable from a wafer. The plasma can generate free radicals liable to a chemical reaction (a radical refers to an ionized atom or molecule), and these free radicals may lead to a significant increase of an etching rate. The plasma also can cause an ion bombardment on a surface of the wafer. The bombardment can not only physically remove a material from the surface, but also destroy a chemical bond between atoms on the surface, thus resulting in a considerable increase of an etching reaction rate.
As an ionized gas with positive and negative charges of equal quantities, the plasma is comprised of ions, electrons and neutral atoms or molecules. Three important collisions for the plasma are Ionization, Excitation-Relaxation Impact and Dissociation collisions. These collisions can generate and maintain the plasma respectively, cause a gas glow discharge, and generate free radicals liable to a chemical reaction for enhancement of the chemical reaction. A Mean Free Path (MFP) is a mean distance that one particle can move prior to collision with another particle. A lowered pressure may result in an increased MFP and collision energy of ions, and also in reduced ion dispersion, which can be advantageous in obtaining a vertically etched profile.
During processes of plasma film-synthesizing and plasma etching, a bias voltage (a DC, RF or pulse bias voltage) is typically applied on a wafer, and thus a non-electro neutral region, i.e. a plasma sheath, can be formed in the vicinity of the wafer. A sheath electric field has a direct control over an energy distribution and an angle distribution of ions incident upon the wafer, and hence an influence on a process of the plasma. An electric field formed in the vicinity of an electrode due to a difference between positive and negative charges is also referred to as a Sheath voltage. A potential of the plasma is typically higher than that of the electrode. Upon generation of the plasma, electrons with a small mass and a rapid motion can lead to the electrode with negative charges. Since ions with positive charges are accelerated through the sheath voltage to reach the electrode at a lower potential, a higher plasma potential can induce an ion bombardment. In this regard, an ion group can be accelerated through the sheath voltage to move toward the electrode, but a too high sheath voltage may cause an excessive ion bombardment upon the wafer.
For a node of 65 nm and below, a characteristic dimension of a device is very tiny. During an etching process of a semiconductor device, a region such as an ultra shallow junction composed of an extremely thin gate oxide layer and an extremely shallow extension doped region is liable to being damaged to different extents due to plasma etching. For example, during the stripping of the photoresist with plasma, a gate oxide layer is being etched simultaneously, and a recess may occur in the active area and the LDD region. For this reason, the plasma is required to be provided with a sufficient base flow for a full reaction with a material to be etched, and also an ion flow shall be reduced as much as possible for a reduced etching strength per unit time. Thus during the etching process, the material to be etched can react fully with the radicals, and a damage due to etching of another material layer for which no etching is required can be minimized.
In a plasma etching method and apparatus according to an embodiment of the invention, pulse output power is used to ionize in a pulse mode an etching gas to generate plasma that etches a film layer to be etched in an intermittent not continuous mode. Thus the etching effect of the plasma can be controlled and buffered. In such a pulse plasma etching mode, a ratio between a time width of power output from a plasma source and a whole pulse period can be adjusted as needed. That is, during the whole etching phase, a plasma etching interval of time can be set as needed, and an electron temperature and a sheath voltage of the plasma can be adjusted to be within an appropriate range, thus resulting in a required base flow and ion flow and a good etching effect.
In addition, the sheath voltage is associated with the pressure inside the reaction chamber. The electron density can be reduced by increasing the pressure inside the reaction chamber, and thus the electron temperature can be lowered. The lowered electron temperature can directly lead to a drop of the sheath voltage. Thus, the sheath voltage can be adjusted through adjustment of the pressure inside the reaction chamber. In the invention method, the pressure inside the reaction chamber can be controlled at 3 to 500 mTorr; the electron temperature can be controlled between 0.1 and 2 eV; and the electron density can be controlled at about 1016-17/cm3.
The plasma etching method and apparatus according to the embodiments of the invention output power in a pulse mode, that is, the RF power source for generating plasma outputs RF power in a pulse mode, and the plasma etches a film layer to be etched in an intermittent not continuous mode. Thus the etching effect of the plasma can be controlled and buffered. With such a pulse plasma etching mode, a proportion of the time width in which the plasma source outputs power relative to the whole pulse period can be adjusted as needed, and the electron temperature and the sheath voltage of the plasma can be adjusted to be within an appropriate range. During an etching process for a semiconductor device of 65 nm and below, the inventive plasma etching method and apparatus can be suitable for etching respective layers including a photoresist layer, a metal layer or a medium layer, and can precisely control an etching depth and improve an precision of a point where the etching can be disabled. The etching depth can be controlled precisely during a process such as the stripping of the photoresist, the etching of the gate oxide layer, etc., thus resulting in elimination of any recess occurring in the active area and the LDD region.
The present invention has been described and illustrated with reference to the embodiments thereof and the drawings. It shall be recognized by those skilled in the art that those embodiments and drawings are merely illustrative and not restrictive, that the present invention shall not be limited thereto, and that various modifications and variations can be made thereto in light of the descriptions and the drawings without departing from the spirit and scope of the present invention as defined in the accompanying claims.
Number | Date | Country | Kind |
---|---|---|---|
200610116855.6 | Sep 2006 | CN | national |