Patent Application
20250210442
Computing devices generate heat as a byproduct of computational workloads. The heat is removed from the devices to enable processing to continue without incurring damage to constituent electronic components such as semiconductors. A heat exchanger receives heat from the electronic components to efficiently remove heat from the computing device and dissipate it to a surrounding environment.
Disclosed is a semiconductor assembly having resistance to a failure mechanism known as the “pump-out effect” in which thermal interface material (TIM) is displaced by a membrane-like pump movement of components in the assembly as the semiconductor is cyclically thermally loaded as it is operated. The semiconductor includes a heat-producing die within and is optionally configured with an integrated heat spreader that can be incorporated into a lid of the semiconductor. A heat exchanger, illustratively comprising a heatsink and/or coldplate which is optionally liquid-cooled, is located on a broad area surface of the semiconductor and TIM is utilized as a gap-filling layer between the mating surfaces of the heat exchanger and semiconductor.
In a first illustrative embodiment of the semiconductor assembly, a capillary tube disposed in the heat exchanger extends from the internal TIM layer to an opening that is exposed to the environment surrounding the assembly. The capillary tube provides a reservoir into which a viscous liquid TIM is displaced and from which the TIM is recovered as the semiconductor assembly is cyclically thermally loaded. The capillary tube is designed with a high aspect ratio, i.e., having a small diameter and a relatively long length, to prevent air from the surrounding environment intruding past the TIM in the tube and becoming entrapped within the TIM layer to form internal gaps or voids which lower the effective thermal conductivity of the TIM. The dimensions of the capillary tube may be determined in various ways. For example, the tube diameter is selected to maintain a target pressure differential across a vapor-liquid interface between the TIM and air in the tube in which the pressure differential is determined by the radius, surface tension of the liquid TIM in the capillary tube, and a contact angle between the liquid TIM and the capillary tube sidewall.
In a second illustrative embodiment of the semiconductor assembly, an edge seal is located around a peripheral seam between the heat exchanger and semiconductor to trap the TIM within the gap and prevent extrusion from pump-out. The seal alternatively comprises gaskets, O-rings, knife-edge seals, or edgebond adhesives. Surfaces of either the heat exchanger or semiconductor are configurable with features to interface with the seal including slots, grooves, lips, offset edges, or textures which may enhance the seal effectiveness in some applications. In a third illustrative embodiment of the semiconductor assembly, both the capillary tube and peripheral edge seal are used with the semiconductor assembly in combination.
This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure.
Like reference numerals indicate like elements in the drawings. Elements are not drawn to scale in the drawings.
As computing semiconductors (i.e., “chips”) get to larger geometries and higher heat flux, it becomes more challenging to maintain and achieve ideal flatness and parallelism between the top of the chip and the bottom of a heat exchanger such as a heatsink or coldplate. Further challenges arise as the assembly flexes during alternating heating and cooling cycles. In effect, the semiconductor/heat exchanger assembly becomes a pump that squeezes the viscous thermal interface material (TIM) out of the sides, which causes empty voids between the two components when their surfaces revert back to their maximum spacing. This pump-out effect can cause contamination of neighboring components and result in a high thermal resistance at the interface between the semiconductor and heat exchanger. In some circumstances, the interface can lose enough TIM from pump-out to result in thermal failure of the semiconductor. Without TIM, the voids are thermally insulating and the semiconductor can no longer efficiently transfer heat to the nearby heat exchanger through the void space.
Some current solutions to TIM pump-out are directed to material properties of the TIM itself. For example, some applications utilize solid metal TIMs to prevent pump-out, other applications may benefit from materials like gels and thermally conductive adhesives that are dispensed like thermal greases but which are then at least partially cross-linked during curing. While such solutions can be effective in some application spaces, the present pump-out resistant coldplate is operable with a wide variety of TIM types to provide increased flexibility and design freedom for thermal management solutions.
Manufacturing of semiconductor assemblies (i.e., a semiconductor and heat exchanger in combination) can also be simplified using the present principles. For example, solid metal TIMs (e.g., using solder) are inherently pump-out resistant but may not be effective for some semiconductor assembly designs having extended areas. In addition, manufacturing processes and infrastructure need to be robust for high temperature processing and reworking. Curable TIM compositions may be less effectively used in a manufacturing environment due to reworking opportunities being negatively impacted.
Turning now to the drawings,
An edge bonding feature 128, for example using an epoxy material placed around the periphery of the semiconductor 110, is used in this illustrative example to increase the mechanical strength of the bond between the semiconductor and PCB 122. Edge bonding is typically utilized in applications in which the semiconductor assembly 100 is exposed to high temperature cycling and/or environmental conditions having high levels of shock and vibration. As shown, the edge bonding feature penetrates under the substrate 105 to ensure proper mechanical bonding between the semiconductor assembly and the PCB. Edge bonding is generally removable in reworking scenarios by application of heat and mechanical scraping.
The heat produced by the semiconductor 110 (shown in the drawing by arrows 125) needs to be removed to ensure that the semiconductor assembly remains within its thermal design parameters. The semiconductor assembly optionally includes an integrated heat spreader (IHS) 130 implemented, for example, in a lid or case configuration using metal alloys. The IHS is coated with thermally conductive metallic (e.g., copper alloy) and/or composite materials in some embodiments. TIM 135, such as a curable or other suitable composition, is typically utilized to decrease the thermal resistance of the interface between the semiconductor and the IHS.
A gasket 136 or other suitable seal around the lower periphery of the IHS is optionally utilized at the interface between the IHS and substrate 105 to encapsulate the semiconductor from the surrounding environment. Semiconductor encapsulation creates a hermetic barrier between the semiconductor circuits and the lid assembly or enclosure to protect, for example, against corrosion and electrical shorts caused by water vapor and condensation. The combination of IHS, semiconductor, and substrate is commonly referred to as a semiconductor package, as indicated by reference numeral 138.
In this illustrative example, the IHS 130 has a substantially planar broad area top surface, although non-planar or partially non-planar broad area surfaces are alternatively usable. The top surface of the IHS is configured to interface with a mating bottom surface of a heat exchanger 150. The heat exchanger is typically attached to the IHS using fasteners (not shown) such as clamps, screws, and the like to effectuate a uniform and constant contact pressure between the components which ensures effective heat transfer.
The heat exchanger comprises a heatsink or coldplate, or a combination of both. When configured as a heatsink, a number of cooling fins 145 extend from a base 148 of the heat exchanger to increase its radiant surface area. Fins are not typically used when the heat exchanger is configured as a coldplate. The selection of heatsink or coldplate is a design choice based on requirements of a specific application such as anticipated thermal loading of the semiconductor and size and weight considerations for the assembly. However, the present principles are adaptable to both heatsink and coldplate configurations. It may be appreciated that the heat output of a given semiconductor is not spatially uniform in typical applications. The cooling provided to the semiconductor by the heat exchanger is also generally non-uniform.
An exemplary coldplate arrangement incorporates liquid-cooling in which a coolant is piped through channels (not shown) of the heat exchanger 150 to and from an external liquid-cooling system using tubes or hoses that interface with inlet/outlet fluid couplers 155. The external cooling system typically includes suitable pumps, tanks, and heat exchangers to efficiently transfer thermal energy from the semiconductor assembly 100 to an external environment via the coolant as a heat transfer medium.
The heat exchanger 150 is disposed on the IHS 130. A layer of TIM 160 is utilized between the components, as shown. Various types and classes of TIM can be utilized as needed to meet the thermal conductivity and reliability requirements of a given application. For example, the TIM is selectable from phase change material, thermal grease, thermal paste, thermal putty, thermal gel, graphite-based material, silicone-based material, metal-based material, or combinations thereof. Many current TIM formulations are composites containing particulate fillers to increase thermal conductivity. Inorganic particulate fillers include aluminum oxide, magnesium oxide, aluminum nitride, boron nitride, and diamond powder. Metal fillers, notably silver, are also usable in some cases.
In addition to thermal performance, TIMs are selected based on other criteria including, for example, ease of use in initial assembly and/or rework during manufacturing of the semiconductor assembly 100. TIM properties of at least partial viscosity at some temperatures may facilitate manufacturing process flows in some scenarios. TIMs may also need to be electrically isolating or provide some structural fastening of the heat exchanger to the semiconductor.
Surfaces of the semiconductor package 138 are displaced under the influence of thermal loading, as shown in
Variations in coefficients of thermal expansion among components of the semiconductor assembly can result in thermal expansion and contraction to occur at different rates. The cyclical thermal loading results in a membrane-like pumping movement of semiconductor surfaces which causes the TIM 160 to be extruded out the gaps between the heat exchanger 150 and the packaged semiconductor 138 and enables air to intrude into the opened gaps, as shown in
As shown in
The pump-out effect of TIM is countered with a semiconductor assembly having mechanical design features arranged in accordance with the present principles to complement existing pump-out solutions that are directed to material properties of the TIM. The design features include a capillary tube located in the heat exchanger providing a TIM reservoir and an edge seal around the perimeter seam between the peripheral edges of the heat exchanger and semiconductor that prevents TIM extrusion during cyclical thermal loading.
In an unpowered (i.e., original) state of the semiconductor assembly 1000, the opposing surfaces of the coldplate 1005 and semiconductor are substantially flat and parallel and form a thin, but broad area, volume configured to receive the TIM 1020, as shown in the enlarged view on the right side of
The capillary tube 1015 receives the viscous TIM as it is displaced when the semiconductor flexes with temperature changes as it operates. When the semiconductor flexes back to its original state, the TIM is sucked back into the volume formed by the gap between the coldplate 1005 and the packaged semiconductor 1010. Thus, the capillary tube functions as a reservoir into which the viscous liquid TIM is displaced and from which the TIM is recovered as the semiconductor assembly is cyclically thermally loaded.
The top surface of the TIM 1205 forms a meniscus 1210 as a result of the contact angle of the TIM with the walls 1215 of the capillary tube 1015. The curvature of the meniscus is greater (i.e., the radius of curvature R is smaller) as the radius of the tube r is narrower as shown by:
where θ is the contact angle. The contact angle is dependent on material properties of the TIM and capillary tube walls and may be further affected by gravity depending on the tube and coldplate orientation in some applications. The curvature causes a pressure differential to develop across the solid-liquid-vapor interfaces as shown by vectors 1220, 1225, and 1230 in the drawing.
In accordance with the present principles, the capillary tube 1015 in a given semiconductor assembly design is configured to optimize resistance against air bypassing the TIM 1205 and becoming sucked into the TIM layer at the interface between the opposing surfaces of the coldplate and semiconductor during cyclical thermal loading. The tube diameter may be selected using different methodologies. For example, the tube radius r is selected to achieve a pressure differential across the vapor-liquid interface of the static fluids (i.e., air and the viscous TIM) meeting a predetermined target value, for example 1 bar. It may be appreciated that the capillary tube dimensions, applicable material properties of the TIM, and target pressure differential may be selected to meet the needs of a particular semiconductor assembly implementation and thus can vary from what is described herein.
An alternative methodology for calculating capillary tube dimensions includes accommodating a maximum volume of TIM that can be displaced into the tube within some predetermined criteria for time interval and maximum pressure drop. It may be appreciated that this calculation methodology depends on TIM viscosity and not capillary forces within the tube.
The location of the capillary tube 1015 in the coldplate 1005 can vary and some implementations may utilize more than one capillary tube as needed to meet design requirements. A capillary tube is locatable, for example, adjacent to areas of the semiconductor of local or global maximum displacement when flexing during cyclical thermal loading. Other capillary tube locations include those adjacent to areas of the TIM 1020 and/or semiconductor having local or global maximum temperature and/or pressures.
The seal 1505 is configurable as an elastically or plastically deformable gasket that is capable of withstanding the expected operating temperatures of the semiconductor assembly 1300 without degradation within some predetermined operating lifespan. Various materials are usable for the seals described herein including those that are pliable, compliant, or otherwise malleable, and which are pressure-rated to provide a suitable seal to prevent TIM leakage or extrusion from pump-out. The seal is configurable using a single material or using composite materials that may include stiffeners or reinforcements. For example, the seal may include a rubberized exterior (e.g., neoprene, silicone, and the like) with rigid internal reinforcements such as metallic or polymeric plates, fibers, components, fillers, or the like. Alternatively, the seal is configurable using viscous sealants that are non-curing, partially-curing, or fully-curing, depending on the needs of a particular application such as rework-ability in manufacturing. Another alternative seal configuration comprises preferentially cooling the edges of the semiconductor assembly with the coldplate 1305 to solidify the TIM along the cooled edges to thereby form a seal. In some applications, combinations of seal types and techniques may be utilized.
As shown, the respective peripheral edges 2015 and 2020 of the coldplate 1305 and packaged semiconductor 1325 are laterally offset to provide additional bonding area for the adhesive and facilitate penetration of the material into the gap between the components. The offset edge features may enhance mechanical bonding between the coldplate and semiconductor and facilitate a strong seal of the TIM 1330 within the internal volume 1510.
The knife-edge portions 2110 of the seal 2105 are configured as a harder material than the corresponding mating surfaces which can include an intermediate gasket (not shown) made of softer material such as copper or the surfaces of the coldplate and semiconductor themselves. When the coldplate 1305 is assembled to the semiconductor 1325, the softer material is extruded out from the knife-edge grooves to fill and seal the seam between the mating components.
Various exemplary embodiments of the present pump-out resistant coldplate are now presented by way of illustration and not as an exhaustive list of all embodiments. An example includes a semiconductor assembly, comprising: a semiconductor including a heat-producing die, the semiconductor having a broad area surface through which heat is conducted from the die; a heat exchanger having a mating broad area surface that interfaces with the semiconductor; thermal interface material (TIM) disposed in a TIM-receiving volume formed between the respective broad area surfaces of the semiconductor and the heat exchanger; and a seal disposed around an outer perimeter of the receiving volume formed between the semiconductor and the heat exchanger that traps the TIM within the TIM-receiving volume.
In another example, the seal comprises one of gasket, O-ring, knife-edge gasket, or edgebond adhesive. In another example, the TIM comprises one of phase change material, thermal grease, thermal paste, thermal putty, thermal gel, graphite-based material, silicone-based material, or metal-based material. In another example, the semiconductor assembly further includes a seal-receiving feature disposed in one or more of the heat exchanger or semiconductor, the seal-receiving feature comprising one of slot, groove, lip, offset edge, or surface texture. In another example, the heat exchanger comprises one of heatsink or coldplate. In another example, the coldplate is liquid-cooled. In another example, the semiconductor includes an integrated heat spreader providing the broad area surface through which heat is conducted from the die.
A further example includes a semiconductor assembly, comprising: a semiconductor including a heat-producing die, the semiconductor having a broad area surface through which heat is conducted from the die; a heat exchanger disposed on the semiconductor, the heat exchanger having a broad area surface interfacing with the broad area surface of the semiconductor; thermal interface material (TIM) disposed as a layer in an interstitial air gap between mating broad area surfaces of the semiconductor and heat exchanger, the TIM being flowable in the interstitial air gap; and a capillary tube disposed in the heat exchanger extending from the broad area surface of the heat exchanger to an opening in the heat exchanger that is exposed to an atmosphere surrounding the semiconductor assembly, wherein the capillary tube provides a reservoir into which the TIM is displaced and from which the TIM is recoverable as the TIM flows in the interstitial air gap.
In another example, the TIM comprises a viscous liquid material and the capillary tube has a radius dimension between a central axis of the tube and a sidewall of the tube, the radius dimension being selected to maintain a target pressure differential across a vapor-liquid interface between the TIM and air in the capillary tube from the atmosphere surrounding the semiconductor assembly, wherein the pressure differential is determined by the radius dimension, surface tension of the liquid TIM in the capillary tube, and a contact angle between the liquid TIM and the sidewall. In another example, the broad area surface of the semiconductor comprises a lid, wherein the lid has flexure motion relative to the heat exchanger as the semiconductor is operated. In another example, the capillary tube is axially located in line with a point of local maximum excursion of the lid. In another example, the capillary tube is axially located in line with a point of local maximum temperature of the lid. In another example, the capillary tube is axially located in line with a point of local maximum pressure of the TIM. In another example, the capillary tube has an aspect ratio that maximizes resistance to air intrusion into the interstitial air gap through the opening in the heat exchanger exposed to the surrounding atmosphere.
A further example includes a semiconductor assembly, comprising: a semiconductor including a heat-producing die, the semiconductor having a broad area surface through which heat is conducted from the die, wherein the broad area surface deforms with a membrane-like pumping motion as the semiconductor undergoes cyclical thermal loading through operations of the heat-producing die; a heat exchanger having a broad area surface interfacing with the broad area surface of the semiconductor; thermal interface material (TIM) filling a gap between mating broad area surfaces of the semiconductor and heat exchanger, the TIM being flowable with the membrane-like pumping motion of the semiconductor; a seal around a seam between the semiconductor and the heat exchanger that limits excursion of the TIM from the gap as the broad area surface of the semiconductor deforms with the membrane-like pumping motion; and a capillary tube disposed in the heat exchanger extending from the broad area surface of the heat exchanger to an opening in the heat exchanger that is exposed to an atmosphere surrounding the semiconductor assembly, wherein the capillary tube provides a volume to receive the flowable TIM and wherein the TIM is restorable from the capillary tube.
In another example, the broad area surface of the semiconductor is incorporated into a lid or integrated heat spreader. In another example, the TIM is cyclically flowable and restorable from the capillary tube with cyclical thermal loading of the semiconductor. In another example, the semiconductor assembly further comprises a plurality of capillary tubes distributed in the heat exchanger. In another example, the seal comprises a reworkable edgebond adhesive. In another example, the seal around the seam is airtight.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
