BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING
FIG. 1 is a schematic cross sectional view of the structure of an MIS semiconductor device according to the first embodiment;
FIGS. 2A to 2D are cross sectional views showing a process of manufacturing the MIS semiconductor device according to the first embodiment;
FIG. 3A shows a cross sectional TEM photograph of the crystal structure of a gate electrode section obtained when an interfacial layer is formed according to the first embodiment;
FIG. 3B shows a cross sectional TEM photograph of the crystal structure of a gate electrode section obtained when an interfacial layer is formed according to a prior art method;
FIG. 4 shows a graph of variations of the interface state density Dit, S factor, and silicon-oxide-film equivalent oxide thickness (EOT) in an nMISFET when the temperature of processing varies;
FIG. 5 shows a graph of effective field dependency of electron mobility in the nMISFET when the temperature of processing varies;
FIG. 6A is a diagram showing a profile of oxygen density in a gate insulating film;
FIG. 6B shows a graph of a differential value of the oxygen density in the gate insulating film;
FIG. 7 is a schematic cross sectional view of an MIS semiconductor device according to the second embodiment; and
FIGS. 8A to 8D are cross sectional views showing a process of manufacturing the MIS semiconductor device according to the second embodiment.