Embodiments described herein relate to a semiconductor device and a method of manufacturing the same.
In recent years, there has been a request to form an air gap between copper (Cu) interconnects. For example, the air gap can be formed by forming the Cu interconnects in a sacrificial film, removing the sacrificial film after forming the Cu interconnects, and forming an insulator having a poor filling property on the Cu interconnects after removing the sacrificial film. However, the Cu interconnects in this case may dissolve or disappear when removing the sacrificial film by wet etching or the like. A similar problem may occur in a case of forming an air gap between interconnects other than the Cu interconnects.
Embodiments will now be explained with reference to the accompanying drawings.
In one embodiment, a method of manufacturing a semiconductor device includes forming a plug in a first insulator, forming a first film on the first insulator and the plug, and forming an opening in the first film. The method further includes forming a second insulator in the opening to form an air gap in the opening, removing the first film after forming the second insulator, to expose the plug, and forming an interconnect on the exposed plug.
(First Embodiment)
[
First, a first insulator 2 is formed on a substrate 1, contact plugs 3 are formed in the first insulator 2, and a sacrificial film 4 is formed on the first insulator 2 and the contact plugs 3 (
The substrate 1 has a structure, for example, including a semiconductor substrate, such as a silicon substrate, and one or more interconnect layers formed on the semiconductor substrate.
An example of the first insulator 2 is a silicon oxide film. The first insulator 2 may be formed on the substrate 1 directly, or may be formed on the substrate 1 via another layer. The first insulator 2 may be a laminated film including a plurality of insulators. The first insulator 2 is, for example, an inter layer dielectric.
An example of each contact plug 3 is a tungsten (W) layer. The contact plugs 3 in the present embodiment are formed by forming contact holes to penetrate the first insulator 2, filling plug material of the contact plugs 3 into the contact holes, and removing excess plug material outside the contact holes. Therefore, each contact plug 3 in the present embodiment has an upper face S2 as high as an upper face S1 of the first insulator 2 when the process of
An example of the sacrificial film 4 is a silicon nitride film or an amorphous silicon film.
[
Next, openings 4a to 4c are formed in the sacrificial film 4 by lithography and reactive ion etching (RIE) (
[
Next, a second insulator 5 is formed on the whole surface of the substrate 1 (
The width of the opening 4c in the present embodiment is set wider than widths of the openings 4a and 4b. Therefore, in the process of
The air gaps 6 in the present embodiment are preferably formed so as not to contact the sacrificial film 4. The reason is that if the air gaps 6 are in contact with the sacrificial film 4 as in
[
Next, a surface of the second insulator 5 is planarized by chemical mechanical polishing (CMP) (
The second insulator 5 in the present embodiment is preferably planarized so as not to expose the air gaps 6 out of the second insulator 5. The reason is that if the air gaps 6 are exposed out of the second insulator 5 as in
[
Next, the sacrificial film 4 is removed by wet etching (
[
Next, a first interconnect material 7a is formed on the whole surface of the substrate 1 (
[
Next, a second interconnect material 7b is formed on the whole surface of the substrate 1 (
[
Next, surfaces of the first and second interconnect materials 7a and 7b are planarized by CMP (
The air gaps 6 in the present embodiment are not in contact with the interconnects 7. This arises from the air gaps 6 in
Each interconnect 7 in the present embodiment is formed adjacent to the second insulator 5. Therefore, the interconnects 7 in the present embodiment are adjacent to each other via an air gap 6 formed in the second insulator 5. In this way, the present embodiment can form the interconnects 7 after forming the second insulator 5 including the air gaps 6.
In the process of
Thereafter, various layers such as inter layer dielectrics, plug layers, and interconnect layers are formed on the substrate 1 in the present embodiment. In this way, the semiconductor device in the present embodiment is manufactured.
[Comparative Example to First Embodiment ]
The comparative example first forms a first insulator 2 on a substrate 1, forms contact plugs 3 in the first insulator 2, forms a base film 11 and a sacrificial film 12 on the first insulator 2 and the contact plugs 3, and forms openings 13 in the base film 11 and the sacrificial film 12 (
Next, interconnects 7 each including a first interconnect material 7a and a second interconnect material 7b is formed on the contact plugs 3 in the openings 13 (
Next, the sacrificial film 12 is removed by wet etching (
In the comparative example, when the sacrificial film 12 is removed by wet etching, there is a possibility that dissolution or disappearance of the interconnects 7 may occur. An arrow A1 indicates an example of a dissolved interconnect 7. An arrow A2 indicates an example of an interconnect 7 having disappeared.
On the other hand, in the present embodiment, the openings 4a and 4b are formed in the sacrificial film 4, the second insulator 5 including the air gaps 6 is formed in the openings 4a and 4b, the sacrificial film 4 is removed after forming the second insulator 5, and the interconnects 7 are formed after removing the sacrificial film 4. Therefore, because the interconnects 7 do not exist yet when the sacrificial film 4 in the present embodiment is removed, the present embodiment can avoid causing the interconnects 7 to dissolve or disappear at the time of removing the sacrificial film 4. Therefore, the present embodiment enables forming the air gaps 6 between the interconnects 7 while preventing the dissolution and disappearance of the interconnects 7.
(Second Embodiment)
First, a first insulator 2 is formed on a substrate 1, contact plugs 3 are formed in the first insulator 2, and a sacrificial film 4 is formed on the first insulator 2 and the contact plugs 3 (
Next, openings 4a to 4c are formed in the sacrificial film 4 by lithography and RIE (
Next, a second insulator 5 is formed on the whole surface of the substrate 1 (
Next, processes of
The misalignment in lithography in the process of
According to the present embodiment, the air gaps 6 can be formed between the interconnects 7 while preventing the dissolution and disappearance of the interconnects 7, similarly to the first embodiment.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel devices and methods described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the devices and methods described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
This application is based upon and claims the benefit of priority from the prior U.S. Provisional Patent Application No. 62/118,256 filed on Feb. 19, 2015, the entire contents of which are incorporated herein by reference.
Number | Name | Date | Kind |
---|---|---|---|
5837618 | Avanzino | Nov 1998 | A |
5960311 | Singh | Sep 1999 | A |
6162723 | Tanaka | Dec 2000 | A |
6949456 | Kumar | Sep 2005 | B2 |
8399349 | Vrtis et al. | Mar 2013 | B2 |
20090087977 | Spuller | Apr 2009 | A1 |
20090093112 | Al-Bayati | Apr 2009 | A1 |
20110021017 | Ueda | Jan 2011 | A1 |
20130119550 | Hayashi | May 2013 | A1 |
20130267088 | Baek | Oct 2013 | A1 |
20140065818 | Lu | Mar 2014 | A1 |
20140242792 | Liu | Aug 2014 | A1 |
20150102496 | Zhang | Apr 2015 | A1 |
20150137375 | Chen | May 2015 | A1 |
Number | Date | Country |
---|---|---|
2004-153280 | May 2004 | JP |
2008-010534 | Jan 2008 | JP |
5485953 | May 2014 | JP |
Number | Date | Country | |
---|---|---|---|
20160247755 A1 | Aug 2016 | US |
Number | Date | Country | |
---|---|---|---|
62118256 | Feb 2015 | US |