Semiconductor device and method of producing the same

Abstract

A semiconductor device, includes: a first conductivity type semiconductor base having a main face; a hetero semiconductor region contacting the main face of the semiconductor base and forming a hetero junction in combination with the semiconductor base, the semiconductor base and the hetero semiconductor region in combination defining a junction end part; a gate insulating film defining a junction face in contact with the semiconductor base and having a thickness; and a gate electrode disposed adjacent to the junction end part via the gate insulating film and defining a shortest point in a position away from the junction end part by a shortest interval, a line extending from the shortest point to a contact point vertically relative to the junction face, forming such a distance between the contact point and the junction end part as to be smaller than the thickness of the gate insulating film contacting the semiconductor base.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross sectional view showing a structure of a semiconductor device, according to a first embodiment of the present invention.

FIG. 2A to FIG. 2D are stepwise cross sectional views showing a method of producing the semiconductor device, according to the first embodiment of the present invention.

FIG. 3 shows an enlarged view of a part III in FIG. 1.

FIG. 4 shows current I-voltage V characteristic of the semiconductor device, according to the first embodiment.

FIG. 5 shows a first modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 6 shows a second modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 7 shows a third modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 8 shows a fourth modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 9 shows a fifth modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 10 shows a sixth modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 11 shows a seventh modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 12 shows an eighth modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 13 shows a ninth modified structure of the semiconductor device, according to the first embodiment of the present invention.

FIG. 14 is a cross sectional view showing the structure of the semiconductor device, according to a second embodiment of the present invention.

FIG. 15 shows an enlarged view of a part XV in FIG. 14.

FIG. 16 shows a first modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 17 shows a second modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 18 shows a third modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 19 shows a fourth modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 20 shows a fifth modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 21 shows a sixth modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 22 shows a seventh modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 23 shows an eighth modified structure of the semiconductor device, according to the second embodiment of the present invention.

FIG. 24 is a cross sectional view showing the structure of the semiconductor device, according to a third embodiment of the present invention.

FIG. 25 shows an enlarged view of a part XXV in FIG. 24.

FIG. 26 shows a first modified structure of the semiconductor device, according to the third embodiment of the present invention.

FIG. 27 shows a second modified structure of the semiconductor device, according to the third embodiment of the present invention.

FIG. 28 shows a third modified structure of the semiconductor device, according to the third embodiment of the present invention.

FIG. 29 shows a fourth modified structure of the semiconductor device, according to the third embodiment of the present invention.

FIG. 30 shows a fifth modified structure of the semiconductor device, according to the third embodiment of the present invention.

FIG. 31 shows a sixth modified structure of the semiconductor device, according to the third embodiment of the present invention.

Claims

1. A semiconductor device, comprising: 1) a first conductivity type semiconductor base having a main face;2) a hetero semiconductor region configured to contact the main face of the semiconductor base and to form a hetero junction in combination with the semiconductor base, the semiconductor base and the hetero semiconductor region in combination defining a junction end part;3) a gate insulating film configured to define a junction face in contact with the semiconductor base and to have a thickness; and4) a gate electrode disposed adjacent to the junction end part via the gate insulating film and configured to define a shortest point in a position away from the junction end part by a shortest interval, a line extending from the shortest point to a contact point substantially vertically relative to the junction face, forming such a distance between the contact point and the junction end part as to be smaller than the thickness of the gate insulating film contacting the semiconductor base.

2. The semiconductor device as claimed in claim 1, further comprising: 1) a source electrode connected to the hetero semiconductor region, and2) a drain electrode connected to the semiconductor base.

3. The semiconductor device as claimed in claim 2, wherein the semiconductor base includes: a substrate region connected to the drain electrode, anda drain region having the main face, anda first angle of the junction end part between the drain region and the hetero semiconductor region is less than 90°.

4. The semiconductor device as claimed in claim 2, wherein the semiconductor base includes: a substrate region connected to the drain electrode, anda drain region having the main face, anda first angle of the junction end part between the drain region and the hetero semiconductor region is more than 90°.

5. The semiconductor device as claimed in claim 1, wherein a second angle defined by the following is less than or equal to 180°:1) the hetero junction between the semiconductor base and the hetero semiconductor region, and2) the junction face between the gate insulating film and the semiconductor base.

6. The semiconductor device as claimed in claim 1, wherein the semiconductor base is made of silicon carbide.

7. The semiconductor device as claimed in claim 1, wherein the hetero semiconductor region is made of a material selected from the group consisting of single crystalline silicon, polycrystalline silicon and amorphous silicon.

8. The semiconductor device as claimed in claim 1, wherein a thickness of the junction end part is smaller than the thickness of the gate insulating film.

9. The semiconductor device as claimed in claim 1, wherein a certain step is formed in a position spaced apart from the junction end part.

10. The semiconductor device as claimed in claim 9, wherein the certain step has any one of a right angle, an obtuse angle and an acute angle.

11. The semiconductor device as claimed in claim 1, wherein 1) the hetero semiconductor region has a contact face which contacts the gate insulating film at the junction end part and is curved,2) the first angle is defined by: an interface of the hetero junction between the drain region and the hetero semiconductor region, anda tangent of an interface of a junction between the hetero semiconductor region and the gate insulating film, and3) the first angle is variable when moving away from the junction end part.

12. The semiconductor device as claimed in claim 1, wherein the distance is expressed as 0<tgs<tox.

13. The semiconductor device as claimed in claim 1, wherein the distance is expressed as 0≦tgs<tox.

14. The semiconductor device as claimed in claim 5, wherein the second angle is 90° or more.

15. A method of producing a semiconductor device, comprising: 1) a first operation for forming a hetero semiconductor region on a first conductivity type semiconductor base, forming a hetero junction therebetween;2) a second operation for forming on the hetero semiconductor region a mask material for selectively removing the hetero semiconductor region;3) a third operation for selectively removing the hetero semiconductor region with the mask material as a mask;4) a fourth operation for forming a gate insulating film on the semiconductor base and on the hetero semiconductor region, such that the gate insulating film is configured to define a junction face in contact with the semiconductor base;5) a fifth operation for forming a gate electrode adjacent to a junction end part via the gate insulating film, the junction end part being defined between the semiconductor base and the hetero semiconductor region,whereinthe third operation includes forming such a distance between a contact point and the junction end part as to be smaller than a thickness of the gate insulating film contacting the semiconductor base, whereinabove the gate electrode is configured to define a shortest point in a position away from the junction end part by a shortest interval and a line extends from the shortest point to the contact point substantially vertically relative to the junction face.

16. The method of producing the semiconductor device as claimed in claim 15, further comprising: 1) a sixth operation for forming a source electrode connected to the hetero semiconductor region, and2) a seventh operation for forming a drain electrode connected to the semiconductor base.