This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2017-180636, filed on Sep. 20, 2017; the entire contents of which are incorporated herein by reference.
Embodiments described herein relate to a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method.
Conventionally, there is a thermal cleaving process as a technique of cleaving a brittle material represented by glass. The thermal cleaving process is a process of forming a groove with a cutting tool on a brittle material such as glass, heating a groove portion with fire, and rapidly cooling with a cloth containing water to cleave the brittle material at a position of the groove.
With the capability of cleaving a semiconductor wafer on which a plurality of semiconductor devices is formed into individual semiconductor devices using this thermal cleaving process, it is possible to singulate a high-hardness semiconductor wafer with high performance, leading to achieving technical advantages.
Hereinafter, a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method according to the present embodiment will be described with reference to the drawings. In the following description, constituent elements having substantially the same function and configuration are denoted by the same reference numerals, and overlapping explanation will be given when necessary.
A semiconductor device manufacturing apparatus according to a first embodiment forms a groove for singulating a plurality of semiconductor devices on one surface of a semiconductor wafer on which the plurality of semiconductor devices is formed, and then heats the groove and thereafter cools the groove to cleave the semiconductor wafer at a position of the groove. The details will be described below.
As illustrated in
The groove former 10 is a unit for forming a groove on the semiconductor wafer 2 mounted on the traveler 40.
In the present embodiment, the groove former 10 includes a pulse laser emission apparatus to emit a pulse laser with a short wavelength or an electron beam emission apparatus to emit an electron beam, and emits a pulse laser or an electron beam to form a groove on the semiconductor wafer 2.
The groove former 10 also includes a spraying apparatus for spraying pure water or liquid nitrogen onto the semiconductor wafer 2. The pure water or liquid nitrogen is sprayed by the spraying apparatus to cool the semiconductor wafer 2 having the groove formed by a pulse laser or an electron beam.
The heater 20 is a unit to heat the groove of the semiconductor wafer 2 mounted on the traveler 40. In the present embodiment, the heater 20 includes a laser apparatus that emits a laser, for example. The laser apparatus emits the laser to the semiconductor wafer 2 to heat the groove.
The cooler 30 is a unit to cool the groove of the semiconductor wafer 2, mounted on the traveler 40. In the present embodiment, the cooler 30 includes a spraying apparatus for spraying liquid nitrogen, for example. The spraying apparatus sprays liquid nitrogen onto the semiconductor wafer 2 to cool the groove.
The traveler 40 is a unit on which the semiconductor wafer 2 as illustrated in
The controller 50 is an apparatus that performs overall control of the semiconductor device manufacturing apparatus 1. In the present embodiment, the controller 50 controls operation of, in particular, the groove former 10, the heater 20, the cooler 30, and the traveler 40. The controller 50 may include a computer, for example, or may include a dedicated control apparatus having an ASIC and a storage apparatus.
First, as illustrated in
Moreover, in the present embodiment, the die bonding film 100 is formed on one surface of the semiconductor wafer 2 via a metal film 101. That is, the metal film 101 is formed on the one surface of the semiconductor wafer 2, with the die bonding film 100 formed on the metal film 101. The metal film 101 is formed of a high melting point metal material, for example, and reduces an electric resistance between the semiconductor wafer 2 and the die bonding film 100.
A first sheet 102 having a first adhesion, that is, relatively weak in adhesion, is bonded to the surface of the semiconductor wafer 2 on which the die bonding film 100 is not formed. The first sheet 102 serves to prevent the semiconductor devices from coming loose at singulation of the plurality of semiconductor devices of the semiconductor wafer 2.
Next, as illustrated in
Next, as illustrated in
Next, as illustrated in
As illustrated in
Next, as illustrated in
As illustrated in
While the groove former 10 emits these lasers while spraying pure water or liquid nitrogen, the traveler 40 causes the semiconductor wafer 2 to travel in a traveling direction of
Next, as illustrated in
As illustrated in
In the present embodiment, the semiconductor wafer 2 is formed of SiC, for example, a type of a brittle material. While the thermal shock resistance of SiC is a temperature difference of 450° C., the thermal shock resistance at the groove GV is lowered to 365° C. or less because the stress concentrates on the groove GV by the groove forming in step S12. Therefore, in the present embodiment, the groove GV is heated up to 180° C. by laser emission by the heater 20, for example. The die bonding film 100 does not melt at this temperature of 180° C. Following the heating of the groove GV by the heater 20, the cooler 30 cools the groove GV down to −186° C. by spraying liquid nitrogen.
This makes the temperature difference 180° C.+186° C.=366° C., which exceeds the thermal shock resistance temperature of 365° C. This makes it possible to cleave the semiconductor wafer 2 at the groove GV. Note that the temperature 180° C. generated by laser emission by the heater 20 corresponds to a first temperature according to the present embodiment, and the temperature −186° C. generated by the spraying of liquid nitrogen by the cooler 30 corresponds to a second temperature according to the present embodiment.
As can be seen from this, the shorter the time after heating by the heater 20 before cooling by the cooler 30, the better. This is because the temperature of the grooves GV heated by the laser emission decreases with the lapse of time, making it difficult to form the temperature difference needed for the thermal cleaving with the cooling by the cooler 30. Moreover, heat transfer by nucleate boiling is occurring when the liquid nitrogen is sprayed by the cooler 30, making it possible to rapidly cool the semiconductor wafer 2.
Incidentally, the thermal shock resistance temperature is an index which indicates how much rapid temperature change the material can absorb, and it shows that the material can absorb bigger temperature change as its value is bigger. One of examples of the materials which form the semiconductor wafer 2 in the present embodiment is SiC, and it can absorb a temperature difference of 450° C. or less but a crack will be made by the temperature difference more than that. In the present embodiment, the thermal shock resistance is lowered to 365° C. or less by the stress concentration to the groove GV in order to cleave the semiconductor wafer 2 at the groove GV.
For instance, the Japanese Industrial Standards (JIS) 1648 defines a test method to evaluate a thermal shock resistance of fine ceramic. In the present embodiment, in compliance with the test method defined by the JIS 1648, a groove GV has been formed between two chips and a cross sectional shape of the groove GV has been adjusted so that a temperature to make a crack at the groove GV is 365° C. or less.
In the present embodiment, the semiconductor wafer 2 travels in the traveling direction by the traveler 40 while heating by the heater 20 and cooling by the cooler 30 is performed onto the groove GV. Therefore, the semiconductor wafer 2 is sequentially cleaved along the groove GV, to form a cleaving surface SF. This cleaving is performed toward all the grooves GV formed on the semiconductor wafer 2 in
Next, as illustrated in
As described above, with the semiconductor device manufacturing apparatus 1 according to the present embodiment, the groove GV for singulating the plurality of semiconductor devices DE is formed on one side of the semiconductor wafer 2, and the groove GV is heated by the heater 20 and then cooled by the cooler 30 so as to cleave the semiconductor wafer 2 at the groove GV. Accordingly, it is possible to cleave the high-hardness semiconductor wafer 2 to singulate into individual semiconductor devices DE by the thermal cleaving process.
Moreover, by thermally cleaving the semiconductor wafer 2 by the temperature difference in this manner, it is possible to singulate the plurality of semiconductor devices DE formed on the semiconductor wafer 2 with high quality and with high accuracy. Furthermore, it is possible to achieve higher performance than in semiconductor wafer 2 cutting processing using a conventional dicing saw, leading to higher throughput.
While the first embodiment described above performs a thermal cleaving process in which the groove GV formed in the semiconductor wafer 2 is heated by the heater 20 and thereafter is cooled by the cooler 30 so as to cleave the semiconductor wafer 2 at the groove GV, the present embodiment performs the thermal cleaving process in which the grooves GV are first cooled and then heated to cleave the semiconductor wafer 2 at the grooves GV using the temperature difference. Hereinafter, portions different from the above-described first embodiment will be described.
The first cooler 60 includes a cooling apparatus to cool the semiconductor wafer 2 as a whole and has a capability of cooling the semiconductor wafer 2 down to −186° C. using liquid nitrogen in the present embodiment. The second cooler 70 includes a cooling apparatus for additionally cooling the grooves GV formed on the semiconductor wafer 2, and includes a spraying apparatus for spraying liquid nitrogen, for example. The other configuration is similar to the configuration of the semiconductor device manufacturing apparatus 1 according to the above-described first embodiment.
After this groove forming processing (step S12), the first cooler 60 of the semiconductor device manufacturing apparatus 1 performs overall cooling of the semiconductor wafer 2 (step S30) in the present embodiment.
In the present embodiment, the semiconductor wafer 2 is cooled down to −186° C. by the cooling by the first cooler 60. Next, as illustrated in
Similarly to the first embodiment, this thermal cleaving process is performed along the groove GV while conveying the semiconductor wafer 2 in a direction for conveying the semiconductor wafer 2 by the traveler 40, i.e. an extending direction of the groove GV to cleave the semiconductor wafer 2. The all the grooves GV of the semiconductor wafer 2 mounted on the traveler 40 are thermally cleaved and thereafter singulation of the plurality of semiconductor devices DE formed on the semiconductor wafer 2 is completed, then, it is judged whether the thermal cleaving of all the prepared semiconductor wafers 2 has been completed (step S18) similarly to the first embodiment.
As illustrated in
As described above, also in the semiconductor device manufacturing apparatus 1 according to the present embodiment, the groove GV for singulating the plurality of semiconductor devices DE is formed on one side of the semiconductor wafer 2, and then the groove GV is cooled by the first cooler 60 beforehand and thereafter additionally cooled by the second cooler 70 and then is heated by the heater 20, whereby the semiconductor wafer 2 is cleaved at the groove GV. Accordingly, it is possible to cleave the high-hardness semiconductor wafer 2 to singulate into individual semiconductor devices DE by the thermal cleaving process.
Incidentally, in the present embodiment, if the first cooler 60 can cool the semiconductor wafer 2 sufficiently and the semiconductor wafer 2 cooled at −186° C. can be kept, the second cooler 70 may be omitted.
In the first and the second embodiments described above, the die bonding film 100 is formed on one surface of the semiconductor wafer 2. Alternatively, however, the die bonding film 100 need not be formed during in thermal cleaving process. That is, in the first embodiment, as illustrated in
In the second embodiment, as illustrated in
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
For example, in the above-described embodiments, SiC is exemplified as a brittle material to form the semiconductor wafer 2. Alternatively, however, it is also possible to form the semiconductor wafer 2 with another brittle material such as GaN and then apply the thermal cleaving process in the above-described embodiments to cleave the semiconductor wafer 2.
Number | Date | Country | Kind |
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2017-180636 | Sep 2017 | JP | national |