The present disclosure relates to a semiconductor device.
There is a semiconductor device in which a main electrode and a control electrode are provided on one main surface of a semiconductor element. Such a semiconductor device is, for example, a power semiconductor device for power conversion. In the power semiconductor device, since a current, which is smaller than a current flowing through the main electrode, flows through the control electrode, the area of the control electrode is smaller than the area of the main electrode. In such a semiconductor device, a metal block is connected to the main electrode, and a wire is bonded to the control electrode.
For example, there is a semiconductor device having a wiring sheet attached to one main surface of a semiconductor element. The wiring sheet has an electrode terminal connected to a main electrode and a control terminal connected to a control electrode on one of main surfaces.
The present disclosure describes a semiconductor device including a semiconductor element and a terminal substrate. According to an aspect, the semiconductor element has a main electrode and a control electrode on a first main surface. The terminal substrate has a bonding terminal to which a wire is to be bonded on a front surface and a relay terminal on a back surface. The bonding terminal and the relay terminal are electrically connected to each other. The bonding terminal has an area larger than an area of the control electrode. The terminal substrate is bonded to the semiconductor element so that the relay terminal and the control electrode are in contact with each other. The terminal substrate has a step on the back surface, and a side surface of the semiconductor element is in contact with the step.
Features and advantages of the present disclosure will become more apparent from the following detailed description made with reference to the accompanying drawings, in which:
To begin with, a relevant technology will be described only for understanding the embodiments of the present disclosure.
For example, a semiconductor device, such as a power semiconductor device for power conversion, has a main electrode and a control electrode on one surface of a semiconductor element. Since a smaller current flows in the control electrode than in the main electrode, an area of the control electrode is smaller than an area of the main electrode. In such a semiconductor device, a metal block is connected to the main electrode, and a wire, such as a bonding wire is bonded to the control electrode. The bonding wire is often made of aluminum, and has a diameter of about 500 μm.
As another example, there is a semiconductor device having a wiring sheet attached to a main surface of a semiconductor element on one side. The wiring sheet has an electrode terminal connected to a main electrode and a control terminal connected to a control electrode on one of main surfaces. A copper member is provided inside the wiring sheet, and one end of the copper member is connected to the control terminal. The other end of the copper member is connected to a control electrode terminal, and the control electrode terminal extends out from the wiring sheet. Since the control electrode of the semiconductor element is connected to the copper member through the control terminal on the wiring sheet rather than the wire, the distance between the main electrode and the control electrode can be shortened. For example, a flexible printed circuit board is used for the wiring sheet.
Since only a smaller current flows through the control electrode, the control electrode may be significantly smaller than the main electrode in terms of current capacity. However, in such a semiconductor device described above, the wire (bonding wire) is bonded to the control electrode. In order to bond the wire, the control electrode needs a larger area than the cross-sectional area of the wire. However, if the control electrode is enlarged only for the bonding of the wire, an area of the main surface of the semiconductor element will be enlarged unnecessarily. If the area of the control electrode can be reduced, the area of the main surface of the semiconductor element, that is, the external dimensions of the semiconductor element can be reduced. Since SiC substrates and GaN substrates, which have been attracting attention in recent years, are expensive, the reduction of the area of the main surface results in the reduction of the cost of the semiconductor device.
In the semiconductor device having the wiring sheet, the area of the control electrode can be reduced, and the area of the main surface of the semiconductor element can be reduced accordingly. However, if a flexible wiring sheet is used as the wiring sheet, it is difficult to align the terminal of the wiring sheet to the control electrode of the semiconductor element. The control electrode of the semiconductor element requires an area large enough to allow for a positional error with respect to the terminal on the wiring sheet.
The present disclosure provides a semiconductor device which is capable of reducing the area of a control electrode.
According to an aspect of the present disclosure, a semiconductor device includes a semiconductor element and a terminal substrate. The semiconductor element is provided with a main electrode and a control electrode on a first main surface. The terminal substrate has a bonding terminal to which a wire is to be bonded on a front surface thereof, and a relay terminal on a back surface thereof. The bonding terminal and the relay terminal are electrically connected to each other. The terminal substrate is bonded to the semiconductor element so that the relay terminal is in contact with the control electrode. The bonding terminal has an area larger than the area of the control electrode. Further, the terminal substrate is formed with a step on the back surface, and a side surface of the semiconductor element is in contact with the step.
Since the bonding terminal to which a wire is bonded is provided on the board separate from the semiconductor element, that is, on the terminal substrate, the control electrode on the main surface can be made smaller. Since the side surface of the semiconductor element is brought into contact with the step on the back surface of the terminal substrate, the position of the terminal substrate relative to the semiconductor element can be determined accurately. Therefore, the positional error between the control electrode of the semiconductor element and the relay terminal of the terminal substrate can be reduced, and the control electrode can be made smaller accordingly.
For example, the step may be configured as follows. The terminal substrate has a thin plate portion including the relay terminal and a thick plate portion including the bonding terminal. The thickness of the thin plate portion is smaller than the thickness of the thick plate portion. The step is provided by the boundary between the thin plate portion and the thick plate portion on the back surface of the terminal substrate. The thin plate portion is bonded to the semiconductor element. The back surface of the thick plate portion of the terminal substrate may be flush with a second main surface of the semiconductor element. If there is a flat surface under the semiconductor element and the thick plate portion, both the semiconductor element and the thick plate portion can be supported by the flat surface. In such a case, therefore, the semiconductor element and the thick plate portion will not shift in the thickness direction when the wire is bonded to the bonding terminal.
As another example, a protrusion may be provided on the back surface of the terminal substrate, and the protrusion may form the step.
Details and further improvements provided by the present disclosure will be further explained hereinafter.
A semiconductor device 2 of a first embodiment will be described with reference to the drawings.
The semiconductor element 20 is a switching element for power conversion, such as an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET). The semiconductor element 20 is thus generally referred to as a power semiconductor element. The semiconductor element 20 has a first main surface 20a as a main surface on one side. A first main electrode 21 and a plurality of control electrodes 23 (see
The lower surface of a copper block 17 is bonded to the first main electrode 21 on the first main surface 20a, and a first heat dissipation plate 14 is bonded to the upper surface of the copper block 17. A first main terminal 11 extends from the edge of the first heat dissipation plate 14. The second main electrode 22 (see
As shown in
Although not visible in
As shown in
Although the semiconductor element 20 and the terminal substrate 30 are covered by the resin package 10, external devices can be electrically connected to the first main electrode 21, the control electrodes 23 and the like of the semiconductor element 20 via the main terminals 11 and 12 and the control terminals 13.
For convenience of explanation, the surface of the terminal substrate 30 facing a +Z direction will be referred to as a front surface 30a, and the surface facing a −Z direction will be referred to as a back surface 30b. In a right upper area in
The plurality of bonding terminals 33 are arranged on the front surface 30a of the terminal substrate 30, and the plurality of relay terminals 34 are arranged on the back surface 30b of the terminal substrate 30. The plurality of bonding terminals 33 are correspondingly and electrically connected to the plurality of relay terminals 34 inside the terminal substrate 30.
The terminal substrate 30 includes a thin plate portion 31 having a small thickness and a thick plate portion 32 having a large thickness. The thickness of the thin plate portion 31 is smaller than the thickness of the thick plate portion 32. The plurality of relay terminals 34 are arranged on the back surface 30b of the thin plate portion 31. On the back surface 30b of the terminal substrate 30, the boundary between the thin plate portion 31 and the thick plate portion 32 forms a step 35.
The terminal substrate 30 is bonded to the semiconductor element 20 such that each of the plurality of relay terminals 34 is in contact with and is electrically connected to each of the plurality of control electrodes 23. In this case, the terminal substrate 30 is fixed to the semiconductor element 20 so that a side surface 20c of the semiconductor element 20 abut to the step 35, in particular, to the side surface of the step (see
Each of the plurality of relay terminals 34 is arranged so as to face each of the plurality of control electrodes 23 when the side surface 20c of the semiconductor element 20 is in contact with the step 35. When the terminal substrate 30 is attached to the semiconductor element 20 so that the side surface 20c is in contact with the step 35, each of the plurality of relay terminals 34 comes into contact with each of the plurality of control electrodes 23 and is electrically connected. The step 35 serves to accurately position the terminal substrate 30 with respect to the semiconductor element 20 at a target position.
The bonding wire 16 is generally made of aluminum and has a diameter of about 500 micrometers (μm). As shown in
In the semiconductor device 2 of the first embodiment, the terminal substrate 30 ensures the bonding terminals 33 having sufficient areas for bonding the bonding wires 16, as well as enables to reduce the control electrodes 23 provided on the first main surface 20a of the semiconductor element 20 in size. As a result, the main surface of the semiconductor element 20 can be reduced in size. That is, the semiconductor element 20 can be reduced in size.
As shown in
Most part of the bonding terminal 33 is arranged in the thick plate portion 32 of the terminal substrate 30, and the relay terminal 34 is arranged in the thin plate portion 31. The thin plate portion 31 is bonded to the first main surface 20a of the semiconductor element 20. As shown in
Instead of having the second side surface 135b on the step 135, the second heat dissipation plate 15 may have a protruding guide. The surface of the terminal substrate 30 and the surface of the semiconductor element 20 of the first embodiment respectively facing the Y direction are pressed against the protruding guide. Thus, the terminal substrate 30 can be accurately positioned with respect to the semiconductor element 20 also in the Y direction.
A terminal substrate 230 as a second modification will be described with reference to
The terminal substrate 230 includes a plurality of protrusions 231, instead of having the thick plate portion 32 of the terminal substrate 30 of the first embodiment. In the right upper area of
The plurality of protrusions 231 are provided on the back surface 230b of the terminal substrate 230. The side surface of the protrusion 231 serves as the step 35 of the terminal substrate 30 of the first embodiment. More precisely, the height difference between the back surface 230b of the terminal substrate 230 and the tip surface of the protrusion 231 corresponds to the step.
When the terminal substrate 230 is attached to the semiconductor element 20, the side surface of the protrusion 231, which corresponds to the side surface of the step, is brought into contact with the side surface 20c of the semiconductor element 20. By bringing the side surface of the protrusion 231 into contact with the side surface 20c of the semiconductor element 20, the terminal substrate 230 can be accurately positioned relative to the semiconductor element 20 in the X direction.
Other features regarding the semiconductor devices 2 (202) of the embodiments will be described hereinafter. The terminal substrate 30 (130, 230) is made of the same material as the resin package 10 covering the semiconductor element 20. The material of the resin package 10 is typically polyimide or polyamide. By making the terminal substrate 30 (130, 230) from the same material as the resin package 10, the stress generated near the boundary between the resin package 10 and the terminal substrate 30 (130, 230) can be reduced when the resin package 10 is formed by injection molding.
The points to be noted regarding the techniques of the embodiments described above will be described. A plurality of terminal substrates may be attached to one semiconductor element. A plurality of control electrodes may be dispersedly arranged at a plurality of locations on the first main surface of the semiconductor element 20.
Although specific examples of the present disclosure have been described in detail above, these are merely examples and do not limit the scope of claims. The techniques described in the claims include various modifications and modifications of the specific examples illustrated above. The technical elements described in the present description or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the present description at the time of filing. In addition, the techniques illustrated in the present specification or the drawings can achieve multiple purposes at the same time, and achieving one of the purposes itself has technical usefulness.
Number | Date | Country | Kind |
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2022-016678 | Feb 2022 | JP | national |
The present application is a continuation application of International Patent Application No. PCT/JP2022/046879 filed on Dec. 20, 2022, which designated the U.S. and claims the benefit of priority from Japanese Patent Application No. 2022-016678 filed on Feb. 4, 2022. The entire disclosures of all of the above applications are incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/JP2022/046879 | Dec 2022 | WO |
Child | 18669914 | US |