A first exemplary embodiment of the present invention will now be described in detail with reference to
During exposure, the reticle R serving as a negative plate is placed on the reticle stage 13 via the reticle chuck 12. The reticle R is irradiated with the exposure light emitted from the illumination optical system 11. The exposure light passing through the reticle R is reduced to, for example, one fifth by the projection optical system 14, and is incident on the silicon wafer W to be processed. The wafer chuck 15 retaining the wafer W is placed on the XYθ stage 16 that is movable on a horizontal plane.
Operations of the exposure apparatus are started when a command for starting exposure is issued while the wafer W is automatically or manually set in the exposure apparatus. First, a first wafer W is sent onto the wafer chuck 15 by a conveying system. Next, the magnification, the rotation, and the XY deviation of the wafer W are determined by detecting alignment marks on the wafer W using the off-axis alignment scope 17 such that the position of the wafer W is corrected. The XYθ stage 16 moves the wafer W such that the first-shot position on the wafer W placed on the XYθ stage 16 corresponds to the exposure position of the exposure apparatus.
Subsequently, the focus of the projection optical system 14 is adjusted on the wafer W on the basis of the measurement results of the surface-position measuring unit 18, and the wafer W is exposed to light for approximately 0.2 seconds during the first shot. The wafer W is then moved to the second-shot position by one step, and exposure is performed again. These operations are repeated until the last shot. In this manner, the exposure process of one wafer W is completed. The wafer W after the exposure process is transferred from the wafer chuck 15 to a robot hand (not shown), and returned to a known wafer carrier by the robot hand.
A cylindrical wall 24 is formed along the edge portion of the wafer chuck 15. A large number of supporting pins (protrusions) 25 integrated with the wafer chuck 15 protrude vertically upward in an area of a circle C (central area) inside the cylindrical wall 24. Similarly, a large number of supporting pins (protrusions) 26 integrated with the wafer chuck 15 protrude upward in an area between the circle C and the cylindrical wall 24 of the wafer chuck 15 (peripheral area). The supporting pins 25 and 26 are arranged at regular intervals of, for example, 2 mm in a grid pattern. The supporting pins 25 in the central area support the central portion of the wafer W, and the supporting pins 26 in the peripheral area support the peripheral portion of the wafer W. In the first exemplary embodiment, the wafer chuck 15 and the supporting pins 25 and 26 are composed of silicon carbide (SiC).
In the first exemplary embodiment, the rigidity of the supporting pins 25 disposed in the central area (first area) in the horizontal direction is lower than that in the vertical direction, and the rigidity of the supporting pins 26 disposed in the peripheral area (second area) in the horizontal direction is higher than that of the supporting pins 25 in the horizontal direction. Moreover, the radius of the central area (circle C) is approximately half the radius of the wafer chuck 15 in the first exemplary embodiment. However, the radius of the central area can be approximately one third of that of the wafer chuck 15. Furthermore, it is not necessary for the wafer chuck to be partitioned into two areas of the circular central area and the ring-shaped peripheral area in which the rigidities of the supporting pins in the horizontal direction differ from each other, and the supporting pins 25 whose rigidity in the horizontal direction is lower than that in the vertical direction can be arranged in the entire area of the wafer chuck.
Before adhesion of the wafer W, the lift pins 23 raised for transferring the wafer W support the wafer W above the supporting pins 25 and 26 of the wafer chuck 15, and hold the wafer W with vacuum via the exhaust holes 23a thereof. At this moment, the wafer W is warped downward by the weight of the wafer W as shown in
The lift pins 23 are lowered from the state shown in
In order to release part of or all the strain generated in the central portion of the wafer by the deformation of the supporting pins in the horizontal direction, the ratio d/h of the width d to the height h of the supporting pins 25 arranged in the central area of the wafer chuck 15 is smaller than that of the supporting pins 26 arranged in the peripheral area in the first exemplary embodiment. When the rigidity of the supporting pins 25 in the horizontal direction is reduced as compared with that in the vertical direction such that the supporting pins 25 can be easily deformed in the horizontal direction, the supporting pins 25 deform in the horizontal direction in response to a force for returning the wafer W from the warped state to an original state, and the strain in the wafer W can be reduced.
In the first exemplary embodiment, the shape of the supporting pins 25 is determined such that the deformation remaining in the wafer W does not exceed 2 nm. More specifically, the supporting pins 25 in the first exemplary embodiment are cylindrical, and the ratio d/h of the diameter d to the height h shown in
x≦2 nm (1)
x=Fh
3/3Eh=32Fh3/3Eπd3 (2)
where x, E, and F denote a permissible value of the amount of deformation of the supporting pins 25 in the horizontal direction, Young's modulus of the material of the supporting pins 25, and a horizontal force applied to the supporting pins 25, respectively.
When the supporting pins 25 are composed of SiC and the Young's modulus E and the force F applied to the supporting pins 25 are 420 GPa and 10 N, respectively, the diameter d of the supporting pins 25 becomes less than or equal to 0.35 times the height h. The supporting pins 26 are also cylindrical, and the diameter d of the supporting pins 26 is larger than 0.35 times the height h, for example, 1.00.
The rigidity of the fiber laminate serving a base material of the fiber-reinforced material is low in the horizontal direction and high in the vertical direction. Therefore, when the supporting pins 25a are composed of the fiber-reinforced material, the supporting pins 25a deform in response to a force for returning the wafer W from the warped state to the original state. Thus, part of or all the strain in the wafer W can be released.
In the second exemplary embodiment, the supporting pins 25a composed of a fiber-reinforced material and having a low rigidity in the horizontal direction are arranged in the central area, and the supporting pins 26 composed of SiC and having a high rigidity in the horizontal direction are arranged in the peripheral area. Moreover, the supporting pins 25a arranged in the central area and the supporting pins 26 arranged in the peripheral area are both cylindrical. Furthermore, the ratios d/h of the supporting pins 25a and the supporting pins 26 are the same, and are larger than 0.35 times, for example, 1.00. However, the shapes and the ratios d/h of the supporting pins 25a and the supporting pins 26 can differ from each other. In addition, the supporting pins 25a composed of a fiber-reinforced material can be arranged in the entire area of the wafer chuck 15.
The substrate-retaining units according to the first and second exemplary embodiments attract and hold the wafer W with vacuum. However, the present invention can be applied to substrate-retaining units that attract and hold substrates such as wafers with electrostatic force. According to the first and second exemplary embodiments and the modifications thereof, part of or all the strain generated in the wafer W while the wafer W is attracted and held with vacuum can be released by the deformation of the supporting pins 25 or 25a, thereby the flatness of the wafer W can be corrected more reliably.
Next, an application of the present invention will be described.
Step S5 (assembly) is referred to as a back-end process in which semiconductor chips are produced using the wafers W processed in Step S4, and includes an assembly step (dicing and bonding), a packaging step (molding), and the like. In Step S6 (inspection), operations, durability, and the like of the semiconductor devices produced in Step S5 are checked. The semiconductor devices produced through these steps are then shipped (Step S7).
With this production method, highly integrated devices can be stably produced.
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all modifications, equivalent structures and functions.
This application claims the priority of Japanese Application No. 2006-254287 filed Sep. 20, 2006, which is hereby incorporated by reference herein in its entirety.
Number | Date | Country | Kind |
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2006-254287 | Sep 2006 | JP | national |