The present disclosure generally relates to semiconductor memory modules, and more particularly relates to tubular heat spreaders for memory modules and memory modules incorporating the same.
Semiconductor memories are often provided in memory modules, such as dual in-line memory modules, for use in system applications. These modules share common physical form factors (e.g., dimensions, pin-outs, connector shapes), in accordance with industry standards. As memory devices are provided with greater capacities and faster performance, the amount of heat generated poses a challenge to memory module design. There exists a need to convey heat away from the memory devices (and other heat-generating components, such as registering clock drivers (RCD), other semiconductor devices, integrated circuit elements, etc.) to heat radiating structures which can be cooled by, e.g., forced air cooling. Because the dimensions of memory modules are limited by industry-standard specifications, such as JEDEC specifications for dual in-line memory modules (DIMMs such as DDR4 and DDR5 RDIMMs and LRDIMMs), the space available for such thermal structures is limited and the performance of the thermal management solutions is frequently unsatisfactory.
As discussed above, thermal management of memory modules poses challenges, particularly given the space constraints of industry standard module dimensions and the high heat generated by higher-capacity and higher-bandwidth memory devices. For example, a memory module may includes a printed circuit board (PCB) having an edge connector, a plurality of memory devices (e.g., DRAM devices), and a registering clock driver (RCD). To convey thermal energy away from the memory devices and RCD during operation, various thermally conductive structures may be provided. For example, a heat spreader may be disposed over the memory module. The heat spreader may comprise a metal or other thermally conductive structure configured to increase the surface area available to radiate heat/permit heat exchange with a cooling gas (e.g., over a surface area greater than that of the outer surfaces of the memory devices and other heat-generating components). The heat spreader can include planar elements interfacing with (e.g., in thermal contact with) an outer surface of the memory devices to transfer heat from the memory devices to the heat spreader, and an upper portion joining the planar elements. The heat spreader may be held on the memory module by a friction fit, thermal adhesive, or with other approaches known to those of skill in the art.
In many systems where space is at a premium (e.g., server racks), there may be very little clearance above the top of a memory module, leaving very little room for heat exchanging structures exposed to the flow of a cooling gas. Accordingly, the performance of conventional heat spreaders may be limited. Several embodiments of the present technology can provide improved thermal management of memory modules by providing a memory module with a reduced-height printed circuit board (PCB) and a tubular heat spreader opposite the edge connector of the module without exceeding a module height restriction imposed by an industry standard. For example, some embodiments of the present technology are directed to memory modules comprising a PCB having an edge connector; a plurality of memory devices disposed on a surface of the PCB; and a tubular heat spreader disposed along an edge of the PCB opposite the edge connector. Other embodiments of the present technology are directed to tubular heat spreaders for a memory module, comprising a tubular portion open at both ends thereof to permit the through flow of a cooling gas; and two planar elements extending in parallel away from the tubular portion and configured to provide a friction fit with the memory module, wherein each of the planar elements is configured to convey thermal energy from the memory module to the tubular portion.
In accordance with one embodiment of the present technology, the tubular heat spreader 110 can have a constant cross section (e.g., the rectilinear tubular cross section shown in
Although for ease of illustration in
In an alternative embodiment, a tubular heat spreader may be provided with integrated planar elements for providing a thermal connection to heat-generating devices on a memory module. For example,
Although in the foregoing example embodiments, tubular heat spreaders have been illustrated and described with reference to rectilinear cross-sectional tubular portions, in other embodiments of the present technology, other tubular cross-sectional profiles may be used. For example,
Although in the foregoing example embodiments, tubular heat spreaders have been illustrated and described with planar elements for contacting heat-generating devices of a memory module, in other embodiments of the present technology, other approaches may be used to provide a thermal path between a heat-generating device on a memory module and a tubular heat spreader at an upper edge thereof. For example,
Although in the foregoing example embodiments, memory modules have been described and illustrated with respect to DIMMs, in other embodiments of the present technology, other memory module formats may also employ a tubular heat spreader as set forth in greater detail above. Moreover, although DIMMs have been described and illustrated with particular numbers of memory devices, and dedicated RCD dies, in other embodiments, other numbers of memory dies may be included, and RCD dies (and/or other integrated circuit dies, such as memory controllers, processors, etc.) may or may not be included in the memory modules.
Although in the foregoing example embodiments, memory modules have been described and illustrated with memory dies disposed on both sides thereof, in other embodiments, tubular heat spreaders may be provided on memory modules having integrated circuit dies on only one side. In such an embodiment, the tubular heat spreader may be thermally connected to the integrated circuit dies by a singular planar element, or via a thermally conductive layer internal to the module, or the like.
It should be noted that the methods described above describe possible implementations, and that the operations and the steps may be rearranged or otherwise modified and that other implementations are possible. Furthermore, embodiments from two or more of the methods may be combined.
Specific details of several embodiments of semiconductor devices are described herein. The term “semiconductor device” generally refers to a solid-state device that includes a semiconductor material. A semiconductor device can include, for example, a semiconductor substrate, wafer, or die that is singulated from a wafer or substrate. Throughout the disclosure, semiconductor devices are generally described in the context of semiconductor dies; however, semiconductor devices are not limited to semiconductor dies.
The term “semiconductor device package” can refer to an arrangement with one or more semiconductor devices incorporated into a common package. A semiconductor package can include a housing or casing that partially or completely encapsulates at least one semiconductor device. A semiconductor device package can also include an interposer substrate that carries one or more semiconductor devices and is attached to or otherwise incorporated into the casing. The term “semiconductor device assembly” can refer to an assembly of one or more semiconductor devices, semiconductor device packages, and/or substrates (e.g., interposer, support, or other suitable substrates). The semiconductor device assembly can be manufactured, for example, in discrete package form, strip or matrix form, and/or wafer panel form. As used herein, the terms “vertical,” “lateral,” “upper,” and “lower” can refer to relative directions or positions of features in the semiconductor device or device assembly in view of the orientation shown in the Figures. For example, “upper” or “uppermost” can refer to a feature positioned closer to or closest to, respectively, the top of a page than another feature or portion of the same feature. These terms, however, should be construed broadly to include semiconductor devices having other orientations, such as inverted or inclined orientations where top/bottom, over/under, above/below, up/down, and left/right can be interchanged depending on the orientation.
The devices discussed herein, including a memory device, may be formed on a semiconductor substrate or die, such as silicon, germanium, silicon-germanium alloy, gallium arsenide, gallium nitride, etc. In some cases, the substrate is a semiconductor wafer. In other cases, the substrate may be a silicon-on-insulator (SOI) substrate, such as silicon-on-glass (SOG) or silicon-on-sapphire (SOP), or epitaxial layers of semiconductor materials on another substrate. The conductivity of the substrate, or sub-regions of the substrate, may be controlled through doping using various chemical species including, but not limited to, phosphorous, boron, or arsenic. Doping may be performed during the initial formation or growth of the substrate, by ion-implantation, or by any other doping means.
The functions described herein may be implemented in hardware, software executed by a processor, firmware, or any combination thereof. Other examples and implementations are within the scope of the disclosure and appended claims. Features implementing functions may also be physically located at various positions, including being distributed such that portions of functions are implemented at different physical locations.
As used herein, including in the claims, “or” as used in a list of items (for example, a list of items prefaced by a phrase such as “at least one of” or “one or more of”) indicates an inclusive list such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Also, as used herein, the phrase “based on” shall not be construed as a reference to a closed set of conditions. For example, an exemplary step that is described as “based on condition A” may be based on both a condition A and a condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase “based on” shall be construed in the same manner as the phrase “based at least in part on.”
From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. Rather, in the foregoing description, numerous specific details are discussed to provide a thorough and enabling description for embodiments of the present technology. One skilled in the relevant art, however, will recognize that the disclosure can be practiced without one or more of the specific details. In other instances, well-known structures or operations often associated with memory systems and devices are not shown, or are not described in detail, to avoid obscuring other aspects of the technology. In general, it should be understood that various other devices, systems, and methods in addition to those specific embodiments disclosed herein may be within the scope of the present technology.
This application is a continuation of U.S. application Ser. No. 16/530,792, filed Aug. 2, 2019; which is incorporated herein by reference in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
6421240 | Patel | Jul 2002 | B1 |
6657864 | Dyckman et al. | Dec 2003 | B1 |
7023701 | Stocken et al. | Apr 2006 | B2 |
7038142 | Abe | May 2006 | B2 |
7933125 | Wei et al. | Apr 2011 | B2 |
8385069 | Iyengar | Feb 2013 | B2 |
9245820 | Goldrian | Jan 2016 | B2 |
9775263 | Ross | Sep 2017 | B2 |
9867315 | Berk | Jan 2018 | B2 |
10602640 | Tsai et al. | Mar 2020 | B1 |
20030136577 | Abe | Jul 2003 | A1 |
20060104035 | Vasoya | May 2006 | A1 |
20060221573 | Li | Oct 2006 | A1 |
20070215381 | Vasoya | Sep 2007 | A1 |
20080062652 | Lieberman | Mar 2008 | A1 |
20080084667 | Campbell | Apr 2008 | A1 |
20090002951 | Legen | Jan 2009 | A1 |
20090135565 | Legen | May 2009 | A1 |
20090168374 | Clayton et al. | Jul 2009 | A1 |
20130322081 | Pan et al. | Dec 2013 | A1 |
20140002980 | Berk et al. | Jan 2014 | A1 |
20160057854 | Schneider et al. | Feb 2016 | A1 |
20160095201 | Min et al. | Mar 2016 | A1 |
20160249445 | Min et al. | Aug 2016 | A1 |
20200163253 | Lunsman et al. | May 2020 | A1 |
20210005575 | Yoo et al. | Jan 2021 | A1 |
20210037679 | Kinsley et al. | Feb 2021 | A1 |
Number | Date | Country | |
---|---|---|---|
20220071061 A1 | Mar 2022 | US |
Number | Date | Country | |
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Parent | 16530792 | Aug 2019 | US |
Child | 17523750 | US |