The present invention relates to a wiring board and a wiring board production method.
Patent Document 1 discloses a semiconductor device including a metal base, a first mounting substrate formed on the metal base, and a second mounting substrate formed on the metal base. A power semiconductor element is mounted on the first mounting substrate. A control circuit element is mounted on the second mounting substrate. Traces are formed on the first or second mounting substrate to extend outside the substrate. The extended traces electrically connect the first and second mounting substrates with each other.
Patent Document 1: Japanese Laid-Open Patent Publication No. 7-74306
When the traces that lie outside the substrates electrically connect the first and second mounting substrates with each other, the traces create a step at the connection between the first mounting substrate and the second mounting substrate. Due to this, components need to be mounted on the first and second mounting substrates by solder printing and reflowing. This increases production costs.
Known methods for electrically connecting two substrates (a thick copper power substrate 100 and a control substrate 200 in
An objective of the present invention is to provide a wiring board and a wiring board production method that allow mass-soldering to be performed on a plurality of substrates.
According to one aspect of the present invention to achieve the above objective, a wiring board is provided. The wiring board includes a first substrate including a first surface and a second substrate including a first surface. A solder hole is arranged at least in the first surface of the first substrate. A solder hole is arranged at least in the first surface of the second substrate. The second substrate is coupled to the first substrate. The first substrate and the second substrate are electrically connected with each other. The first surface of the first substrate and the first surface of the second substrate are flush with each other and configured such that a part of one surface of a mask is placed on the first surface of the first substrate and another part of the surface of the mask is placed on the first surface of the second substrate.
According to another aspect of the present invention, a wiring board production method is provided. The method includes a coupling process, a first placement process, a solder application process, and a removal process, a second placement process, and a reflowing process. The coupling process couples a first substrate to a second substrate such that a first surface of the first substrate, which has a solder hole, is flush with a first surface of the second substrate, which has a solder hole. The first placement process places a mask on the first surface of the first substrate and the first surface of the second substrate. A part of one surface of the mask is placed on the first surface of the first substrate, and another part of the surface of the mask is placed on the first surface of the second substrate. The solder application process applies solder onto the first substrate and the second substrate through the mask. The removal process removes the mask. The second placement process places a component on at least a part of the applied solder. The reflowing process mass-solders the component by reflowing.
A wiring board and a wiring board production method according to one embodiment of the present invention will now be described with reference to the drawings.
In the drawings, a horizontal plane is defined with the X and Y directions, and a vertical direction is defined as the Z direction.
The thick copper pattern 25a, the thick copper pattern 25b, and the thick copper pattern 25c are spaced from one another in the first substrate 20. The thick copper pattern 25a and the thick copper pattern 25c each include a solder hole H1.
The second substrate 30 includes an insulative layer 31. An inner layer wiring pattern 32a is formed on the top surface of the insulative layer 31. Inner layer wiring patterns 33a and 33b are formed on the bottom surface of the insulative layer 31. The top surface of the insulative layer 31 is laminated with an insulative layer 34. The bottom surface of the insulative layer 31 is laminated with an insulative layer 35. Wiring patterns 36a, 36b, and 36c are formed on the top surface of the insulative layer 34. A wiring pattern 37a is formed on the bottom surface of the insulative layer 35.
A via hole 34a connects the wiring pattern 36a with the inner layer wiring pattern 32a. A via hole 34b connects the wiring pattern 36b with the inner layer wiring pattern 32a. Thus, the wiring pattern 36a and the wiring pattern 36b are electrically connected with each other through the inner layer wiring pattern 32a. A via hole 35a connects the wiring pattern 37a with the inner layer wiring pattern 33a.
A resist 38 covers the wiring patterns 36a, 36b, and 36c on the top surface of the insulative layer 34. A resist 39 covers the wiring pattern 37a on the bottom surface of the insulative layer 35. Solder holes H2 are formed in the resist 38.
The thickness t1 of the first substrate 20 is the same as the thickness t2 of the second substrate 30. The first substrate 20 and the second substrate 30 are placed on one plane to line up in the X direction and have side surfaces (end surfaces) that contact with each other. In other words, the first substrate 20 and the second substrate 30 are placed side by side without overlapping. In this manner, the first substrate 20 is coupled to the second substrate 30.
When the first substrate 20 and the second substrate 30 are coupled to each other, i.e., are integrated, an upper surface 20a of the first substrate 20 and an upper surface 30a of the second substrate 30 are located at the same height (in the Z direction).
The first substrate 20 includes the upper surface 20a as the first surface, and the solder holes H1 are arranged in the first substrate. The second substrate 30 includes the upper surface 30a as the first surface, and the solder holes H2 are arranged in the first substrate. The first substrate 20 is coupled to the second substrate 30 such that the bottom surfaces of the substrates 20 and 30 are placed on one plane and the upper surface 20a of the first substrate 20 is flush with the upper surface 30a of the second substrate 30. In other words, the upper surface 20a and the upper surface 30a are flush with each other and configured such that a part of one surface of a mask M (refer to
The wiring board 10 includes positioning portions 50, which position the first substrate 20 and the second substrate 30 using the relationship between projections and recesses of the positioning portions 50.
The positioning portions 50 are arranged at two positions as shown in
Each positioning portion 50 has a space S1 for placing adhesive 53 as a connection member. In particular, the space S1 is formed between the distal surface of the projection 51 and the bottom surface of the recess 52 as viewed from the top in
Components are soldered to the top surface of the wiring board 10 (the first substrate 20 and the second substrate 30). In particular, components such as power elements and electrolytic capacitors are mounted on the upper surface 20a of the first substrate 20. Components such as IC chips are mounted on the upper surface 30a of the second substrate 30. In the case of
In
The jumper wire 40 is mounted on the upper surfaces 20a and 30a of the first and second substrates 20 and 30. The jumper wire 40 electrically connects the first substrate 20 and the second substrate 30 with each other. In particular, solder 41 and 42 connects the thick copper pattern 25c of the first substrate 20 with the wiring pattern 36a of the second substrate 30. Similarly,
Thus, the jumper wires 40 and 45 electrically connect the first substrate 20 with the second substrate 30 using the patterns 25c and 25d formed of a copper board, which is laid on a patterned copper-plated laminated board via the adhesive sheets 24 and 26.
Operation of the wiring board 10 will now be described.
To produce the wiring board 10, the first substrate 20 and the second substrate 30 are prepared. The second substrate 30 includes the projection 51, and the first substrate 20 includes the recess 52. The projection 51 is engaged with the recess 52. The adhesive 53 is applied to fill the space S1 of the positioning portion 50 between the first substrate 20 and the second substrate 30. As shown in
After the wiring board 10 is obtained in this way, the metal mask M is placed on the top surface of the wiring board 10, i.e. the upper surfaces 20a and 30a of the substrates 20 and 30 as shown in
After that, the mask M is removed as shown in
The chip C1 and the jumper wires 40 and 45 as components are mass-soldered by reflowing solder as shown in
Thus, the two substrates 20 and 30 have unique outlines that match each other and are integrated by hardening the adhesive 53 as liquid resin.
The two substrates 20 and 30 are designed to have uniform heights. This design enables mass-solder printing, thereby reducing production costs.
In addition, the design enables the mask of the two substrates 20 and 30 to have a flush surface. If the substrates 20 and 30 had different heights, a step at the connection between the substrates 20 and 30 would necessitate a step in the mask in accordance with the step at the connection. This would require positioning of the substrates 20 and 30 not only in the horizontal direction but also in the vertical direction.
The jumper wires 40 and 45 are mounted between the substrates 20 and 30 when components are mounted. This enables electrical connection between the substrates 20 and 30. In particular, the wiring board shown in
The above illustrated embodiment achieves the following advantages.
(1) The wiring board 10 is configured such that the first substrate 20, which has the solder holes H1 in the upper surface 20a, is coupled to the second substrate 30, which has the solder holes H2 in the upper surface 30a. In a broad sense, the first substrate 20, which includes at least the first surface having the solder holes H1, is coupled to the second substrate 30, which includes at least the first surface having the solder holes H2. When the first substrate 20 and the second substrate 30 are electrically connected with each other, the upper surface 20a of the first substrate 20, which has solder holes, is flush with the upper surface 30a of the second substrates 30, which has solder holes. In other words, the first substrate 20 and the second substrate 30 are coupled to each other to have solder joining surfaces that are flush with each other. This enables mass-soldering to a plurality of substrates, the substrates 20 and 30, by applying cream solder at a time.
(2) Components are mass-soldered to at least one of the first substrate 20 and the second substrate 30. Thus, components can be mass-soldered to a plurality of substrates, the substrates 20 and 30.
(3) The positioning portions 50 each include the projection 51, which is arranged in the second substrate 30, and the recess 52, which is arranged in the first substrate 20 and engages with the projection 51. In a broad sense, each positioning portion 50 includes the projection 51, which is arranged in one of the first substrate 20 and the second substrate 30, and the recess 52, which is arranged in the other configuration facilitates forming of the positioning portion 50.
The positioning portion 50, which is formed in at least one of the first substrate 20 and the second substrate 30, enables positioning of the substrates 20 and 30.
(4) The positioning portion 50 has the space S1 for placing a connection member. Thus, the first substrate 20 and the second substrate 30 are easily connected to each other using the connection member (53).
(5) The connection member is the adhesive 53. Thus, the first substrate 20 and the second substrate 30 are easily connected to each other using the adhesive 53.
(6) The recess 52 of the first substrate 20 is coupled to the projection 51 of the second substrate 30 such that the substrates 20 and 30 have solder joining surfaces that are flush with each other. This allows the mask of the first substrate 20 and the second substrate 30 to have a flush surface on the solder joining surfaces of the first and second substrates 20 and 30. This facilitates the placement of a mask on the first substrate 20 and the second substrate 30.
(7) A mass-soldered component is the jumper wire 40, which electrically connects the first substrate 20 and the second substrate 30 with each other. Thus, the first substrate 20 and the second substrate 30 can be electrically connected with each other with the jumper wire 40.
(8) A mass-soldered component is the chip C1 as a surface-mount component. Thus, the chip C1 as a surface-mount component can be soldered.
(9) The wiring board production method includes a coupling process, a first placement process, an application process, a removal process, a second placement process, and a reflowing process. The coupling process couples the first substrate 20 to the second substrate 30 such that the first surface 20a of the first substrate 20, which has the solder holes H1, is flush with the first surface 30a of the second substrate 30, which has the solder holes H2. The first placement process places the mask M on the first surface 20a of the first substrate 20, which has the solder holes H1, and the first surface 30a of the second substrate 30, which has the solder holes H2. The application process applies the solder 60 onto the first substrate 20 and the second substrate 30 through the mask M. The removal process removes the mask M. The second placement process places components (the jumper wire 40 and the chip C1 as a surface-mount component) on at least a part of the applied solder 60. The reflowing process mass-solders the components (the jumper wire 40 and the chip C1) to the substrates 20 and 30 by reflowing solder. Thus, mass-soldering to a plurality of substrates, the substrates 20 and 30, is possible.
The present invention is not restricted to the illustrated embodiment but may be embodied, for example, in the following forms.
Any coupling means may be employed as long as the first substrate 20 is coupled to the second substrate 30. In particular, coupling means such as bonding and crimping may couple the first and second substrates 20 and 30.
The positioning portion 50 does not necessarily position the first and second substrates 20 and 30 using the projection-recess relationship of the projection 51 and the recess 52. For example, another member may be used to prevent mechanical displacement of the first and second substrates 20 and 30. The liquid adhesive 53, which fills the positioning portion 50, does not necessarily need to be used.
In
Furthermore, the bottom surface of the first substrate 20 may be a soldered surface, and the bottom surface of the second substrate 30 may be a soldered surface. In this case, the bottom surface of the first substrate 20 is made flush with the bottom surface of the second substrate 30.
The substrates 20 and 30 may be any types of substrates. The substrates 20 and 30 may be, e.g., multilayered substrates, double-sided substrates, or single-sided substrates.
A metal component as a connection member may be inserted into the space S1 of the positioning portion 50 and plastically deformed.
The jumper wire 40 electrically connects the first substrate 20 and the second substrate 30 with each other. Instead of the jumper wire 40, the thick copper pattern 25c of the substrate 20 may have a portion extending from the lateral side of the substrate 20 as shown in
Instead of the jumper wires 40 and 45, a bus bar may electrically connect the first substrate 20 and the second substrate 30 with each other.
Number | Date | Country | Kind |
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2012-207388 | Sep 2012 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2013/074985 | 9/17/2013 | WO | 00 |