Number | Date | Country | Kind |
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5-213239 | Aug 1993 | JPX | |
6-164349 | Jul 1994 | JPX |
This application is a continuation-in-part application of U.S. patent application Ser. No. 08/296,022 filed on Aug. 25, 1994, now U.S. Pat. No. 5,529,955.
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Entry |
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Novuyoshi Kobayashi, "Technique for Forming Fine Wiring, Using Tungsten CVD", 38th semiconductor specialized meetings preliminary text (Jul. 25-28, 1992). |
Wolf, Stanley, Ph.D., "Silicon Processing For the VLSI ERA", Process Integration, vol. 2, Lattice Press, pp. 245-252, 1990. |
Ono, Hisako, et al., "Development of a Planarized A1-Si Contact Filing Technology", VMIC Conference, Jun. 12-13, 1990, pp. 76-82. |
Drynan, J.M., et al., "A Quarter-Micron Contact-Hole Definition Process Using Electron-Beam Lithography", Microelectronics Research Laboratories, NEC Corporation, pp. 38-39. Date unknown. |
Number | Date | Country | |
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Parent | 296022 | Aug 1994 |