Albert M. Chu

Person

Nashua, NH, US

People

Patents Grantslast 30 patents

Information Patent Grant
Local interconnect for cross coupling
- Patent number 12,322,652
- Issue date Jun 3, 2025
- International Business Machines Corporation
- Heng Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SRAM with backside cross-couple
- Patent number 12,295,133
- Issue date May 6, 2025
- International Business Machines Corporation
- Ruilong Xie
Information Patent Grant
Vertically-stacked field effect transistor cell
- Patent number 12,278,184
- Issue date Apr 15, 2025
- International Business Machines Corporation
- Albert M Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Backside power rails and power distribution network for density sca...
- Patent number 12,268,031
- Issue date Apr 1, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Staggered stacked semiconductor devices
- Patent number 12,142,656
- Issue date Nov 12, 2024
- International Business Machines Corporation
- Albert Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra-short-height standard cell architecture
- Patent number 12,001,772
- Issue date Jun 4, 2024
- International Business Machines Corporation
- Albert Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnects on multiple sides of a semiconductor structure
- Patent number 11,658,116
- Issue date May 23, 2023
- International Business Machines Corporation
- Junli Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor
- Patent number 11,355,401
- Issue date Jun 7, 2022
- International Business Machines Corporation
- Effendi Leobandung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D vertical FET with top and bottom gate contacts
- Patent number 11,031,296
- Issue date Jun 8, 2021
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabricating tapered semiconductor devices
- Patent number 10,832,971
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Rajasekhar Venigalla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-patterning techniques for fabricating an array of metal lines...
- Patent number 10,755,969
- Issue date Aug 25, 2020
- International Business Machines Corporation
- Albert Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cell placement in a circuit with shared inputs and outputs
- Patent number 10,755,017
- Issue date Aug 25, 2020
- International Business Machines Corporation
- Brent A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical transport logic circuit cell with shared pitch
- Patent number 10,742,218
- Issue date Aug 11, 2020
- International Business Machines Corpoartion
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable gate contacts over active areas
- Patent number 10,693,005
- Issue date Jun 23, 2020
- International Business Machines Corporation
- Emre Alptekin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
4T static random access memory bitcell retention
- Patent number 10,614,877
- Issue date Apr 7, 2020
- International Business Machines Corporation
- Albert Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
3D vertical FET with top and bottom gate contacts
- Patent number 10,529,625
- Issue date Jan 7, 2020
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell architecture with at least one gate contact over an a...
- Patent number 10,424,574
- Issue date Sep 24, 2019
- International Business Machines Corporation
- Albert M. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell architecture with at least one gate contact over an a...
- Patent number 10,424,576
- Issue date Sep 24, 2019
- International Business Machines Corporation
- Albert M. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal fill optimization for self-aligned double patterning
- Patent number 10,381,338
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Albert M. Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable gate contacts over active areas
- Patent number 10,381,480
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Emre Alptekin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D vertical FET with top and bottom gate contacts
- Patent number 10,361,128
- Issue date Jul 23, 2019
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D vertical FET with top and bottom gate contacts
- Patent number 10,074,570
- Issue date Sep 11, 2018
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra dense vertical transport FET circuits
- Patent number 9,954,529
- Issue date Apr 24, 2018
- International Business Machines Corporation
- Brent A. Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High density vertical field effect transistor multiplexer
- Patent number 9,859,898
- Issue date Jan 2, 2018
- International Business Machines Corporation
- Brent A. Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Vertical transistors with merged active area regions
- Patent number 9,761,712
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Brent A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal fill optimization for self-aligned double patterning
- Patent number 9,735,029
- Issue date Aug 15, 2017
- International Business Machines Corporation
- Albert M. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ultra dense vertical transport FET circuits
- Patent number 9,680,473
- Issue date Jun 13, 2017
- International Business Machines Corporation
- Brent A. Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Read only memory (ROM) with redundancy
- Patent number 9,460,811
- Issue date Oct 4, 2016
- GLOBALFOUNDRIES Inc.
- George M. Braceras
- G11 - INFORMATION STORAGE
Information Patent Grant
Generating place and route abstracts
- Patent number 9,424,386
- Issue date Aug 23, 2016
- International Business Machines Corporation
- Albert M. Chu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuits for generating physically unclonable function
- Patent number 9,202,554
- Issue date Dec 1, 2015
- International Business Machines Corporation
- Albert M. Chu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
COMBINED FRONTSIDE/BACKSIDE POWER SUPPLY FOR CHARGE SHARING
- Publication number 20250183145
- Publication date Jun 5, 2025
- International Business Machines Corporation
- Nicholas Anthony Lanzillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
U-SHAPED SPACER TO PROTECT THE INTRA-DEVICE SPACE REGION FOR STACKE...
- Publication number 20250185298
- Publication date Jun 5, 2025
- International Business Machines Corporation
- Lijuan Zou
Information Patent Application
STACKED FIELD-EFFECT TRANSISTOR DEVICE WITH BACKSIDE CUT FOR TOP SO...
- Publication number 20250167118
- Publication date May 22, 2025
- International Business Machines Corporation
- Debarghya Sarkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURES HAVING ANGLED DIELECTRIC BARS ATTACHED TO...
- Publication number 20250169131
- Publication date May 22, 2025
- International Business Machines Corporation
- Ruilong Xie
Information Patent Application
ENLARGED BOTTOM CONTACT AREA IN STACKED TRANSISTORS
- Publication number 20250159997
- Publication date May 15, 2025
- International Business Machines Corporation
- Brent A. Anderson
Information Patent Application
VIA CONNECTION IN MIDDLE BEOL WIRING
- Publication number 20250140650
- Publication date May 1, 2025
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED FET WITH ASYMMETRIC CELL BOUNDARY
- Publication number 20250133816
- Publication date Apr 24, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LINE-VIA-LINE STRUCTURE FOR BSPDN
- Publication number 20250125250
- Publication date Apr 17, 2025
- International Business Machines Corporation
- Nicholas Anthony Lanzillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORKSHEET TRANSISTOR STRUCTURE
- Publication number 20250126884
- Publication date Apr 17, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CUT SHAPES FOR BACKSIDE METALS
- Publication number 20250118661
- Publication date Apr 10, 2025
- International Business Machines Corporation
- Nicholas Anthony Lanzillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL SIDE STACKED TRANSISTOR
- Publication number 20250118630
- Publication date Apr 10, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD-EFFECT TRANSISTOR CRESCENT-SHAPED DIELECTRIC ISOLATION
- Publication number 20250113560
- Publication date Apr 3, 2025
- International Business Machines Corporation
- Lijuan Zou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH OFFSET GATE CONTACT
- Publication number 20250107205
- Publication date Mar 27, 2025
- International Business Machines Corporation
- Albert M. Chu
Information Patent Application
METAL TIP-TO-TIP SCALING
- Publication number 20250096132
- Publication date Mar 20, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE OFFSET GATE CONTACT FOR BACKSIDE SPACING
- Publication number 20250096074
- Publication date Mar 20, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH GATE CONTACT OVER AN ACTIVE REGION
- Publication number 20250098215
- Publication date Mar 20, 2025
- International Business Machines Corporation
- Tao Li
Information Patent Application
DUAL SIDED CIRCUIT CONNECTIONS
- Publication number 20250089336
- Publication date Mar 13, 2025
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE WITH SELF-ALIGNED OFFSET GATE CONTACT AND DIRECT BACKSIDE...
- Publication number 20250081581
- Publication date Mar 6, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED FET WITH BOTTOM EPI SIZE CONTROL AND WRAPAROUND BACKSIDE CO...
- Publication number 20250062190
- Publication date Feb 20, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCAL TRAPPED METAL CONTACT FOR STACKED FET
- Publication number 20250063795
- Publication date Feb 20, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLEXIBLE TRACKPLAN FOR POWER DELIVERY
- Publication number 20250054863
- Publication date Feb 13, 2025
- International Business Machines Corporation
- Reinaldo Vega
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Contact Formation With Staggered Gate Patterning
- Publication number 20250040184
- Publication date Jan 30, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHARED SOURCE/DRAIN CONTACT FOR STACKED TRANSISTORS
- Publication number 20250040199
- Publication date Jan 30, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE LOCAL INTERCONNECT
- Publication number 20250022795
- Publication date Jan 16, 2025
- International Business Machines Corporation
- Nicholas Anthony Lanzillo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED FET WITH LOW PARASITIC-CAPACITANCE GATE
- Publication number 20250006786
- Publication date Jan 2, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PITCH CHANGE BETWEEN METAL LINES
- Publication number 20250006638
- Publication date Jan 2, 2025
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MERGED SELF-ALIGNED BACKSIDE CONTACT
- Publication number 20240429098
- Publication date Dec 26, 2024
- International Business Machines Corporation
- Albert M. Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTECTION DIODE FOR STACKED FIELD EFFECT TRANSISTOR
- Publication number 20240429226
- Publication date Dec 26, 2024
- International Business Machines Corporation
- HUIMEI ZHOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE FOR BACKSIDE SIGNAL AND POWER
- Publication number 20240421087
- Publication date Dec 19, 2024
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT LAYOUTS WITH STAGGERED GATE AND SOURCE/DRAIN REGIONS
- Publication number 20240421145
- Publication date Dec 19, 2024
- International Business Machines Corporation
- Carl Radens
- H01 - BASIC ELECTRIC ELEMENTS

Albert M. Chu

Person

Patents Grantslast 30 patents

Local interconnect for cross coupling

SRAM with backside cross-couple

Vertically-stacked field effect transistor cell

Backside power rails and power distribution network for density sca...

Staggered stacked semiconductor devices

Ultra-short-height standard cell architecture

Interconnects on multiple sides of a semiconductor structure

Field effect transistor

3D vertical FET with top and bottom gate contacts

Fabricating tapered semiconductor devices

Multi-patterning techniques for fabricating an array of metal lines...

Cell placement in a circuit with shared inputs and outputs

Vertical transport logic circuit cell with shared pitch

Reliable gate contacts over active areas

4T static random access memory bitcell retention

3D vertical FET with top and bottom gate contacts

Standard cell architecture with at least one gate contact over an a...

Standard cell architecture with at least one gate contact over an a...

Metal fill optimization for self-aligned double patterning

Reliable gate contacts over active areas

3D vertical FET with top and bottom gate contacts

3D vertical FET with top and bottom gate contacts

Ultra dense vertical transport FET circuits

High density vertical field effect transistor multiplexer

Vertical transistors with merged active area regions

Metal fill optimization for self-aligned double patterning

Ultra dense vertical transport FET circuits

Read only memory (ROM) with redundancy

Generating place and route abstracts

Methods and circuits for generating physically unclonable function

Patents Applicationslast 30 patents

COMBINED FRONTSIDE/BACKSIDE POWER SUPPLY FOR CHARGE SHARING

U-SHAPED SPACER TO PROTECT THE INTRA-DEVICE SPACE REGION FOR STACKE...

STACKED FIELD-EFFECT TRANSISTOR DEVICE WITH BACKSIDE CUT FOR TOP SO...

SEMICONDUCTOR STRUCTURES HAVING ANGLED DIELECTRIC BARS ATTACHED TO...

ENLARGED BOTTOM CONTACT AREA IN STACKED TRANSISTORS

VIA CONNECTION IN MIDDLE BEOL WIRING

STACKED FET WITH ASYMMETRIC CELL BOUNDARY

LINE-VIA-LINE STRUCTURE FOR BSPDN

FORKSHEET TRANSISTOR STRUCTURE

CUT SHAPES FOR BACKSIDE METALS

DUAL SIDE STACKED TRANSISTOR

FIELD-EFFECT TRANSISTOR CRESCENT-SHAPED DIELECTRIC ISOLATION

SEMICONDUCTOR DEVICE WITH OFFSET GATE CONTACT

METAL TIP-TO-TIP SCALING

BACKSIDE OFFSET GATE CONTACT FOR BACKSIDE SPACING

SEMICONDUCTOR DEVICE WITH GATE CONTACT OVER AN ACTIVE REGION

DUAL SIDED CIRCUIT CONNECTIONS

STRUCTURE WITH SELF-ALIGNED OFFSET GATE CONTACT AND DIRECT BACKSIDE...

STACKED FET WITH BOTTOM EPI SIZE CONTROL AND WRAPAROUND BACKSIDE CO...

LOCAL TRAPPED METAL CONTACT FOR STACKED FET

FLEXIBLE TRACKPLAN FOR POWER DELIVERY

Contact Formation With Staggered Gate Patterning

SHARED SOURCE/DRAIN CONTACT FOR STACKED TRANSISTORS

BACKSIDE LOCAL INTERCONNECT

STACKED FET WITH LOW PARASITIC-CAPACITANCE GATE

PITCH CHANGE BETWEEN METAL LINES

MERGED SELF-ALIGNED BACKSIDE CONTACT

PROTECTION DIODE FOR STACKED FIELD EFFECT TRANSISTOR

STRUCTURE FOR BACKSIDE SIGNAL AND POWER

CIRCUIT LAYOUTS WITH STAGGERED GATE AND SOURCE/DRAIN REGIONS