Chang-Ming Hsieh

Person

Fishkill, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method to suppress subthreshold leakage due to sharp isolation corn...
- Patent number 6,144,081
- Issue date Nov 7, 2000
- International Business Machines Corporation
- Louis Lu-Chen Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash EEPROM
- Patent number 6,107,141
- Issue date Aug 22, 2000
- International Business Machines Corporation
- Louis Lu-Chen Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI transistor having a self-aligned body contact
- Patent number 5,962,895
- Issue date Oct 5, 1999
- International Business Machines Corporation
- Klaus Dietrich Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash EEPROM with dual-sidewall gate
- Patent number 5,910,912
- Issue date Jun 8, 1999
- International Business Machines Corporation
- Louis Lu-Chen Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Modular MOSFETS for high aspect ratio applications
- Patent number 5,874,764
- Issue date Feb 23, 1999
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to enhance SOI SRAM cell stability
- Patent number 5,774,411
- Issue date Jun 30, 1998
- International Business Machines Corporation
- Chang-Ming Hsieh
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI transistor having a self-aligned body contact
- Patent number 5,729,039
- Issue date Mar 17, 1998
- International Business Machines Corporation
- Klaus Dietrich Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making trimmable modular MOSFETs for high aspect ratio ap...
- Patent number 5,721,144
- Issue date Feb 24, 1998
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to suppress subthreshold leakage due to sharp isolation corn...
- Patent number 5,567,553
- Issue date Oct 22, 1996
- International Business Machines Corporation
- Louis L. Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-density DRAM structure on soi
- Patent number 5,528,062
- Issue date Jun 18, 1996
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced silicon on oxide semiconductor device structure for BiCMOS...
- Patent number 5,521,399
- Issue date May 28, 1996
- International Business Machines Corporation
- Shao-Fu S. Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming silicon on oxide semiconductor device structure f...
- Patent number 5,484,738
- Issue date Jan 16, 1996
- International Business Machines Corporation
- Shao-Fu S. Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a high-density DRAM structure on SOI
- Patent number 5,466,625
- Issue date Nov 14, 1995
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical-gate CMOS compatible lateral bipolar transistor
- Patent number 5,446,312
- Issue date Aug 29, 1995
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a SOI transistor having a self-aligned body contact
- Patent number 5,405,795
- Issue date Apr 11, 1995
- International Business Machines Corporation
- Klaus D. Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming integrated interconnect for very high density DRAMs
- Patent number 5,389,559
- Issue date Feb 14, 1995
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a doped region in a semiconductor substrate utili...
- Patent number 5,385,850
- Issue date Jan 31, 1995
- International Business Machines Corporation
- Jack O. Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a novel vertical-gate CMOS compatible lateral bip...
- Patent number 5,371,022
- Issue date Dec 6, 1994
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded wafer structure having a buried insulation layer
- Patent number 5,366,923
- Issue date Nov 22, 1994
- International Business Machines Corporation
- Klaus D. Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a vertical gate transistor with low temperature ep...
- Patent number 5,340,759
- Issue date Aug 23, 1994
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Novel vertical-gate CMOS compatible lateral bipolar transistor
- Patent number 5,341,023
- Issue date Aug 23, 1994
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor structure utilizing a deposited epitaxial base region
- Patent number 5,315,151
- Issue date May 24, 1994
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermal dissipation of integrated circuits using diamond paths
- Patent number 5,313,094
- Issue date May 17, 1994
- International Business Machines Corportion
- Klaus D. Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical gate transistor with low temperature epitaxial channel
- Patent number 5,283,456
- Issue date Feb 1, 1994
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded wafer structure having a buried insulation layer
- Patent number 5,276,338
- Issue date Jan 4, 1994
- International Business Machines Corporation
- Klaus Beyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate controlled Schottky barrier diode
- Patent number 5,258,640
- Issue date Nov 2, 1993
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical bipolar transistor with recessed epitaxially grown intrins...
- Patent number 5,235,206
- Issue date Aug 10, 1993
- International Business Machines Corporation
- Brian H. Desilets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor formed with deep-submicron gate
- Patent number 5,202,272
- Issue date Apr 13, 1993
- International Business Machines Corporation
- Chang-Ming Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical bipolar transistor with recessed epitaxially grown intrins...
- Patent number 5,137,840
- Issue date Aug 11, 1992
- International Business Machines Corporation
- Brian H. Desilets
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral PNP transistor and method for forming same
- Patent number 5,045,911
- Issue date Sep 3, 1991
- International Business Machines Corporation
- Peter A. Habitz
- H01 - BASIC ELECTRIC ELEMENTS

Chang-Ming Hsieh

Person

Patents Grantslast 30 patents

Method to suppress subthreshold leakage due to sharp isolation corn...

Flash EEPROM

SOI transistor having a self-aligned body contact

Flash EEPROM with dual-sidewall gate

Modular MOSFETS for high aspect ratio applications

Methods to enhance SOI SRAM cell stability

SOI transistor having a self-aligned body contact

Method of making trimmable modular MOSFETs for high aspect ratio ap...

Method to suppress subthreshold leakage due to sharp isolation corn...

High-density DRAM structure on soi

Advanced silicon on oxide semiconductor device structure for BiCMOS...

Method of forming silicon on oxide semiconductor device structure f...

Method of making a high-density DRAM structure on SOI

Vertical-gate CMOS compatible lateral bipolar transistor

Method of forming a SOI transistor having a self-aligned body contact

Method of forming integrated interconnect for very high density DRAMs

Method of forming a doped region in a semiconductor substrate utili...

Method of forming a novel vertical-gate CMOS compatible lateral bip...

Bonded wafer structure having a buried insulation layer

Method of making a vertical gate transistor with low temperature ep...

Novel vertical-gate CMOS compatible lateral bipolar transistor

Transistor structure utilizing a deposited epitaxial base region

Thermal dissipation of integrated circuits using diamond paths

Vertical gate transistor with low temperature epitaxial channel

Bonded wafer structure having a buried insulation layer

Gate controlled Schottky barrier diode

Vertical bipolar transistor with recessed epitaxially grown intrins...

Field effect transistor formed with deep-submicron gate

Vertical bipolar transistor with recessed epitaxially grown intrins...

Lateral PNP transistor and method for forming same