Christoph Kleint

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit including structures arranged at different densi...
- Patent number 8,021,933
- Issue date Sep 20, 2011
- Qimonda AG
- Dominik Olligs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method of forming an integrated circuit
- Patent number 8,009,477
- Issue date Aug 30, 2011
- Qimonda AG
- Christoph Kleint
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, a non-volatile semiconductor memory device and a met...
- Patent number 7,733,698
- Issue date Jun 8, 2010
- Qimonda AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried bitline with reduced resistance
- Patent number 7,678,654
- Issue date Mar 16, 2010
- Qimonda AG
- Christoph Kleint
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnection structure and method of manufacturing the same
- Patent number 7,462,038
- Issue date Dec 9, 2008
- Qimonda AG
- Roman Knoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming contacts using auxiliary structures
- Patent number 7,416,976
- Issue date Aug 26, 2008
- Infineon Technologies AG
- Josef Willer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory
- Patent number 7,405,441
- Issue date Jul 29, 2008
- Infineon Technology AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an NROM memory cell arrangement
- Patent number 7,323,383
- Issue date Jan 29, 2008
- Infineon Technologies AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SONOS memory cells and arrays and method of forming the same
- Patent number 7,323,388
- Issue date Jan 29, 2008
- Infineon Technologies AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell
- Patent number 7,274,069
- Issue date Sep 25, 2007
- Infineon Technologies AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating NROM memory cells with trench transistors
- Patent number 7,205,195
- Issue date Apr 17, 2007
- Infineon Technologies AG
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Charge-trapping memory device
- Patent number 7,144,776
- Issue date Dec 5, 2006
- Infineon Technologies AG
- Ricardo Pablo Mikalo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an NROM memory cell array
- Patent number 7,094,648
- Issue date Aug 22, 2006
- Infineon Technologies AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor memory having charge trappin...
- Patent number 7,015,095
- Issue date Mar 21, 2006
- Infineon Technologies AG
- Mathias Krause
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating semiconductor memories with charge trapping...
- Patent number 7,005,355
- Issue date Feb 28, 2006
- Infineon Technologies AG
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory with vertical charge-trapping memory cells and...
- Patent number 6,992,348
- Issue date Jan 31, 2006
- Infineon Technologies AG
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FORMING AN INTEGRATED CIRCUIT
- Publication number 20100027311
- Publication date Feb 4, 2010
- QIMONDA AG
- Christoph Kleint
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit having a base structure and a nanostructure
- Publication number 20090251968
- Publication date Oct 8, 2009
- Christoph Andreas Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Including Structures Arranged at Different Densi...
- Publication number 20090057743
- Publication date Mar 5, 2009
- QIMONDA AG
- Dominik Olligs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnection Structure and Integrated Circuit
- Publication number 20080296778
- Publication date Dec 4, 2008
- QIMONDA AG
- Martin Roessiger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit, cell, cell arrangement, method for manufacturin...
- Publication number 20080237738
- Publication date Oct 2, 2008
- Christoph Andreas Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE, A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND A MET...
- Publication number 20080232170
- Publication date Sep 25, 2008
- QIMONDA AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20080200046
- Publication date Aug 21, 2008
- QIMONDA AG
- Roman Knoefler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried bitline with reduced resistance
- Publication number 20080002466
- Publication date Jan 3, 2008
- Christoph Kleint
- G11 - INFORMATION STORAGE
Information Patent Application
Method for production of semiconductor memory devices
- Publication number 20070048951
- Publication date Mar 1, 2007
- Hocine Boubekeur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor product and method for forming a semiconductor product
- Publication number 20070048993
- Publication date Mar 1, 2007
- Josef Willer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHARGE-TRAPPING MEMORY DEVICE
- Publication number 20060267078
- Publication date Nov 30, 2006
- Ricardo Pablo Mikalo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor memory
- Publication number 20060205148
- Publication date Sep 14, 2006
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor memory with vertical charge-trapping memory cells and...
- Publication number 20060065922
- Publication date Mar 30, 2006
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SONOS memory cells and arrays and method of forming the same
- Publication number 20050196923
- Publication date Sep 8, 2005
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating an NROM memory cell array
- Publication number 20050164456
- Publication date Jul 28, 2005
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating an NROM memory cell arrangement
- Publication number 20050158953
- Publication date Jul 21, 2005
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating NROM memory cells with trench transistors
- Publication number 20050085037
- Publication date Apr 21, 2005
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory cell
- Publication number 20050030780
- Publication date Feb 10, 2005
- Infineon Technologies AG
- Joachim Deppe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a semiconductor memory having charge trappin...
- Publication number 20050003613
- Publication date Jan 6, 2005
- Mathias Krause
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor memory with vertical charge-trapping memory cells and...
- Publication number 20040164345
- Publication date Aug 26, 2004
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating semiconductor memories with charge trapping...
- Publication number 20040147072
- Publication date Jul 29, 2004
- Christoph Kleint
- H01 - BASIC ELECTRIC ELEMENTS

Christoph Kleint

Person

Patents Grantslast 30 patents

Integrated circuit including structures arranged at different densi...

Integrated circuit and method of forming an integrated circuit

Memory device, a non-volatile semiconductor memory device and a met...

Buried bitline with reduced resistance

Interconnection structure and method of manufacturing the same

Method of forming contacts using auxiliary structures

Semiconductor memory

Method for fabricating an NROM memory cell arrangement

SONOS memory cells and arrays and method of forming the same

Memory cell

Method for fabricating NROM memory cells with trench transistors

Charge-trapping memory device

Method for fabricating an NROM memory cell array

Method for fabricating a semiconductor memory having charge trappin...

Method for fabricating semiconductor memories with charge trapping...

Semiconductor memory with vertical charge-trapping memory cells and...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT AND METHOD OF FORMING AN INTEGRATED CIRCUIT

Integrated circuit having a base structure and a nanostructure

Integrated Circuit Including Structures Arranged at Different Densi...

Interconnection Structure and Integrated Circuit

Integrated circuit, cell, cell arrangement, method for manufacturin...

MEMORY DEVICE, A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND A MET...

INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME

Buried bitline with reduced resistance

Method for production of semiconductor memory devices

Semiconductor product and method for forming a semiconductor product

CHARGE-TRAPPING MEMORY DEVICE

Semiconductor memory

Semiconductor memory with vertical charge-trapping memory cells and...

SONOS memory cells and arrays and method of forming the same

Method for fabricating an NROM memory cell array

Method for fabricating an NROM memory cell arrangement

Method for fabricating NROM memory cells with trench transistors

Memory cell

Method for fabricating a semiconductor memory having charge trappin...

Semiconductor memory with vertical charge-trapping memory cells and...

Method for fabricating semiconductor memories with charge trapping...