Eduardo Maayan

Person

Klar Saba, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Methods, circuits, devices, and systems for sensing an NVM cell
- Patent number 10,304,545
- Issue date May 28, 2019
- Cypress Semiconductor Corporation
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods, circuits, devices and systems for sensing an NVM cell
- Patent number 9,991,001
- Issue date Jun 5, 2018
- Cypress Semiconductor Corporation
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
NROM device with reduced power unit
- Patent number 8,971,129
- Issue date Mar 3, 2015
- Spansion Israel Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Device to program adjacent storage cells of different NROM cells
- Patent number 8,400,841
- Issue date Mar 19, 2013
- Spansion Israel Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods, circuits and systems for reading non-volatile memory cells
- Patent number 8,264,884
- Issue date Sep 11, 2012
- Spansion Israel Ltd.
- Ilan Bloom
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading array cell with matched reference cell
- Patent number 7,864,612
- Issue date Jan 4, 2011
- Spansion Israel Ltd
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading a memory array with neighbor effect cancellation
- Patent number 7,755,938
- Issue date Jul 13, 2010
- Saifun Semiconductors Ltd.
- Shahar Atir
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 7,738,304
- Issue date Jun 15, 2010
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming a reference cell
- Patent number 7,701,779
- Issue date Apr 20, 2010
- Sajfun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced power programming of non-volatile cells
- Patent number 7,599,227
- Issue date Oct 6, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 7,573,745
- Issue date Aug 11, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device and method for reading cells
- Patent number 7,535,765
- Issue date May 19, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for multi-level sensing in a memory array
- Patent number 7,532,529
- Issue date May 12, 2009
- Saifun Semiconductors Ltd.
- Oleg Dadashev
- G11 - INFORMATION STORAGE
Information Patent Grant
EEPROM array and method for operation thereof
- Patent number 7,518,908
- Issue date Apr 14, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming a reference cell
- Patent number 7,512,009
- Issue date Mar 31, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 7,489,562
- Issue date Feb 10, 2009
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic matching of signal path and reference path for sensing
- Patent number 7,466,594
- Issue date Dec 16, 2008
- Saifun Semiconductors Ltd.
- Yair Sofer
- G11 - INFORMATION STORAGE
Information Patent Grant
Operating array cells with matched reference cells
- Patent number 7,457,183
- Issue date Nov 25, 2008
- Saifun Semiconductors Ltd.
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell and non-volatile memory device using said...
- Patent number 7,400,529
- Issue date Jul 15, 2008
- Saifun Semiconductors Ltd.
- Boaz Eitan
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced power programming of non-volatile cells
- Patent number 7,366,025
- Issue date Apr 29, 2008
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading non-volatile memory cells
- Patent number 7,257,025
- Issue date Aug 14, 2007
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
MOS capacitor with reduced parasitic capacitance
- Patent number 7,256,438
- Issue date Aug 14, 2007
- Saifun Semiconductors Ltd.
- Joseph S. Shor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for operating a memory device
- Patent number 7,190,620
- Issue date Mar 13, 2007
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method circuit and system for compensating for temperature induced...
- Patent number 7,184,313
- Issue date Feb 27, 2007
- Saifun Semiconductors Ltd.
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Grant
Charge pump element with body effect cancellation for early charge...
- Patent number 7,148,739
- Issue date Dec 12, 2006
- Saifun Semiconductors Ltd.
- Joseph S. Shor
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Dynamic matching of signal path and reference path for sensing
- Patent number 7,095,655
- Issue date Aug 22, 2006
- Saifun Semiconductors Ltd.
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming a reference cell
- Patent number 7,064,983
- Issue date Jun 20, 2006
- Saifum Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Mass storage device architecture and operation
- Patent number 7,062,619
- Issue date Jun 13, 2006
- Saifun Semiconductor Ltd.
- Ran Dvir
- G11 - INFORMATION STORAGE
Information Patent Grant
Mass storage array and methods for operation thereof
- Patent number 6,975,536
- Issue date Dec 13, 2005
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple use memory chip
- Patent number 6,954,382
- Issue date Oct 11, 2005
- Saifun Semiconductors Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS, CIRCUITS, DEVICES, AND SYSTEMS FOR SENSING AN NVM CELL
- Publication number 20190035477
- Publication date Jan 31, 2019
- CYPRESS SEMICONDUCTOR CORPORATION
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS, CIRCUITS, DEVICES AND SYSTEMS FOR SENSING AN NVM CELL
- Publication number 20150340098
- Publication date Nov 26, 2015
- SPANSION LLC
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
ACCESSING AN NROM ARRAY
- Publication number 20130223144
- Publication date Aug 29, 2013
- SPANSION ISRAEL LTD
- Eduardo MAAYAN
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS, CIRCUITS AND SYSTEMS FOR READING NON-VOLATILE MEMORY CELLS
- Publication number 20090323423
- Publication date Dec 31, 2009
- Ilan Bloom
- G11 - INFORMATION STORAGE
Information Patent Application
Reading array cell with matched reference cell
- Publication number 20090231915
- Publication date Sep 17, 2009
- Eli Lusky
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, CIRCUIT AND SYSTEM FOR SENSING A CELL IN A NON-VOLATILE MEM...
- Publication number 20090129166
- Publication date May 21, 2009
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile memory cell and non-volatile memory device using said...
- Publication number 20090032862
- Publication date Feb 5, 2009
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Reduced power programming of non-volatile cells
- Publication number 20080198670
- Publication date Aug 21, 2008
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple use memory chip
- Publication number 20080130359
- Publication date Jun 5, 2008
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple use memory chip
- Publication number 20080123413
- Publication date May 29, 2008
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile memory cell and non-volatile memory device using said...
- Publication number 20080111177
- Publication date May 15, 2008
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile memory device and method for reading cells
- Publication number 20080002464
- Publication date Jan 3, 2008
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Method for programming a reference cell
- Publication number 20070253248
- Publication date Nov 1, 2007
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Non-volatile memory cell and non-volatile memory device using said...
- Publication number 20070206415
- Publication date Sep 6, 2007
- Boaz Eitan
- G11 - INFORMATION STORAGE
Information Patent Application
Memory circuit arrangement and method for reading and/or verifying...
- Publication number 20070177428
- Publication date Aug 2, 2007
- Zeev Cohen
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic matching of signal path and reference path for sensing
- Publication number 20070171717
- Publication date Jul 26, 2007
- SAIFUN SEMICONDUCTORS LTD.
- Yair Sofer
- G11 - INFORMATION STORAGE
Information Patent Application
Accessing an NROM array
- Publication number 20060285386
- Publication date Dec 21, 2006
- Saifun Semiconductors, Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD CIRCUIT AND SYSTEM FOR COMPENSATING FOR TEMPERATURE INDUCED...
- Publication number 20060285408
- Publication date Dec 21, 2006
- Saifun Semiconductors, Ltd.
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY
- Publication number 20060285402
- Publication date Dec 21, 2006
- SAIFUN SEMICONDUCTORS LTD.
- Oleg Dadashev
- G11 - INFORMATION STORAGE
Information Patent Application
Method for programming a reference cell
- Publication number 20060268621
- Publication date Nov 30, 2006
- Saifun Semiconductors, Ltd.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple use memory chip
- Publication number 20060152975
- Publication date Jul 13, 2006
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Method for reading non-volatile memory cells
- Publication number 20060126382
- Publication date Jun 15, 2006
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic matching of signal path and reference path for sensing
- Publication number 20060034122
- Publication date Feb 16, 2006
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Application
Reduced power programming of non-volatile cells
- Publication number 20050276118
- Publication date Dec 15, 2005
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
MOS capacitor with reduced parasitic capacitance
- Publication number 20050269619
- Publication date Dec 8, 2005
- Joseph S. Shor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for reading a memory array with neighbor effect cancellation
- Publication number 20050232024
- Publication date Oct 20, 2005
- Shahar Atir
- G11 - INFORMATION STORAGE
Information Patent Application
Multiple use memory chip
- Publication number 20050117444
- Publication date Jun 2, 2005
- SAIFUN SEMICONDUCTORS LTD.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Method for operating a memory device
- Publication number 20050117395
- Publication date Jun 2, 2005
- SAIFUN SEMICONDUCTORS LTD.
- Eduardo Maayan
- G11 - INFORMATION STORAGE
Information Patent Application
Stack element circuit
- Publication number 20040233771
- Publication date Nov 25, 2004
- Joseph S. Shor
- G05 - CONTROLLING REGULATING
Information Patent Application
High speed and low noise output buffer
- Publication number 20040151032
- Publication date Aug 5, 2004
- Yan Polansky
- G11 - INFORMATION STORAGE

Eduardo Maayan

Person

Patents Grantslast 30 patents

Methods, circuits, devices, and systems for sensing an NVM cell

Methods, circuits, devices and systems for sensing an NVM cell

NROM device with reduced power unit

Device to program adjacent storage cells of different NROM cells

Methods, circuits and systems for reading non-volatile memory cells

Reading array cell with matched reference cell

Method for reading a memory array with neighbor effect cancellation

Multiple use memory chip

Method for programming a reference cell

Reduced power programming of non-volatile cells

Multiple use memory chip

Non-volatile memory device and method for reading cells

Apparatus and methods for multi-level sensing in a memory array

EEPROM array and method for operation thereof

Method for programming a reference cell

Multiple use memory chip

Dynamic matching of signal path and reference path for sensing

Operating array cells with matched reference cells

Non-volatile memory cell and non-volatile memory device using said...

Reduced power programming of non-volatile cells

Method for reading non-volatile memory cells

MOS capacitor with reduced parasitic capacitance

Method for operating a memory device

Method circuit and system for compensating for temperature induced...

Charge pump element with body effect cancellation for early charge...

Dynamic matching of signal path and reference path for sensing

Method for programming a reference cell

Mass storage device architecture and operation

Mass storage array and methods for operation thereof

Multiple use memory chip

Patents Applicationslast 30 patents

METHODS, CIRCUITS, DEVICES, AND SYSTEMS FOR SENSING AN NVM CELL

METHODS, CIRCUITS, DEVICES AND SYSTEMS FOR SENSING AN NVM CELL

ACCESSING AN NROM ARRAY

METHODS, CIRCUITS AND SYSTEMS FOR READING NON-VOLATILE MEMORY CELLS

Reading array cell with matched reference cell

METHOD, CIRCUIT AND SYSTEM FOR SENSING A CELL IN A NON-VOLATILE MEM...

Non-volatile memory cell and non-volatile memory device using said...

Reduced power programming of non-volatile cells

Multiple use memory chip

Multiple use memory chip

Non-volatile memory cell and non-volatile memory device using said...

Non-volatile memory device and method for reading cells

Method for programming a reference cell

Non-volatile memory cell and non-volatile memory device using said...

Memory circuit arrangement and method for reading and/or verifying...

Dynamic matching of signal path and reference path for sensing

Accessing an NROM array

METHOD CIRCUIT AND SYSTEM FOR COMPENSATING FOR TEMPERATURE INDUCED...

APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY

Method for programming a reference cell

Multiple use memory chip

Method for reading non-volatile memory cells

Dynamic matching of signal path and reference path for sensing

Reduced power programming of non-volatile cells

MOS capacitor with reduced parasitic capacitance

Method for reading a memory array with neighbor effect cancellation

Multiple use memory chip

Method for operating a memory device

Stack element circuit

High speed and low noise output buffer