Gavin J. Harbison

Person

Marina del Rey, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Use of silicide block process to camouflage a false transistor
- Patent number 8,679,908
- Issue date Mar 25, 2014
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable connection and isolation of active regions in an integ...
- Patent number 8,564,073
- Issue date Oct 22, 2013
- HRL Laboratories, LLC
- William M. Clark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit modification using well implants
- Patent number 8,524,553
- Issue date Sep 3, 2013
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive channel pseudo block process and circuit to inhibit reve...
- Patent number 8,258,583
- Issue date Sep 4, 2012
- HRL Laboratories, LLC
- Lap-Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable connection and isolation of active regions in an integ...
- Patent number 8,168,487
- Issue date May 1, 2012
- HRL Laboratories, LLC
- William M. Clark, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Symmetric non-intrusive and covert technique to render a transistor...
- Patent number 8,049,281
- Issue date Nov 1, 2011
- HRL Laboratories, LLC
- Lap-Wai Chow
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Symmetric non-intrusive and covert technique to render a transistor...
- Patent number 7,935,603
- Issue date May 3, 2011
- HRL Laboratories, LLC
- Lap-Wai Chow
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Conductive channel pseudo block process and circuit to inhibit reve...
- Patent number 7,888,213
- Issue date Feb 15, 2011
- HRL Laboratories, LLC
- Lap-Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit modification using well implants
- Patent number 7,514,755
- Issue date Apr 7, 2009
- HRL Laboratories LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of silicon block process step to camouflage a false transistor
- Patent number 7,344,932
- Issue date Mar 18, 2008
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Symmetric non-intrusive and covert technique to render a transistor...
- Patent number 7,242,063
- Issue date Jul 10, 2007
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive channel pseudo block process and circuit to inhibit reve...
- Patent number 7,049,667
- Issue date May 23, 2006
- HRL Laboratories, LLC
- Lap-Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of silicon block process step to camouflage a false transistor
- Patent number 6,979,606
- Issue date Dec 27, 2005
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT MODIFICATION USING WELL IMPLANTS
- Publication number 20090170255
- Publication date Jul 2, 2009
- HRL LABORATORIES, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Programmable connection and isolation of active regions in an integ...
- Publication number 20080079082
- Publication date Apr 3, 2008
- HRL LABORATORIES, LLC
- William M. Clark
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Use of silicon block process step to camouflage a false transistor
- Publication number 20070243675
- Publication date Oct 18, 2007
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Conductive channel pseudo block process and circuit to inhibit reve...
- Publication number 20060157803
- Publication date Jul 20, 2006
- HRL Laboratories, LLC
- Lap-Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit modification using well implants
- Publication number 20040144998
- Publication date Jul 29, 2004
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Use of silicon block process step to camouflage a false transistor
- Publication number 20040099912
- Publication date May 27, 2004
- HRL Laboratories, LLC
- Lap-Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Conductive channel pseudo block process and circuit to inhibit reve...
- Publication number 20040061186
- Publication date Apr 1, 2004
- Lap-Wai Chow
- G06 - COMPUTING CALCULATING COUNTING

Gavin J. Harbison

Person

Patents Grantslast 30 patents

Use of silicide block process to camouflage a false transistor

Programmable connection and isolation of active regions in an integ...

Integrated circuit modification using well implants

Conductive channel pseudo block process and circuit to inhibit reve...

Programmable connection and isolation of active regions in an integ...

Symmetric non-intrusive and covert technique to render a transistor...

Symmetric non-intrusive and covert technique to render a transistor...

Conductive channel pseudo block process and circuit to inhibit reve...

Integrated circuit modification using well implants

Use of silicon block process step to camouflage a false transistor

Symmetric non-intrusive and covert technique to render a transistor...

Conductive channel pseudo block process and circuit to inhibit reve...

Use of silicon block process step to camouflage a false transistor

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT MODIFICATION USING WELL IMPLANTS

Programmable connection and isolation of active regions in an integ...

Use of silicon block process step to camouflage a false transistor

Conductive channel pseudo block process and circuit to inhibit reve...

Integrated circuit modification using well implants

Use of silicon block process step to camouflage a false transistor

Conductive channel pseudo block process and circuit to inhibit reve...