Hsingya Arthur Wang

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming transistors with ultra-short gate feature
- Patent number 8,946,003
- Issue date Feb 3, 2015
- SK hynix Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a non-volatile memory cell using off-set spacers
- Patent number 8,288,219
- Issue date Oct 16, 2012
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory device having poly spacers
- Patent number 7,250,341
- Issue date Jul 31, 2007
- Hynix Semiconductor Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming transistors with ultra-short gate feature
- Patent number 7,202,134
- Issue date Apr 10, 2007
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming polysilicon layers in non-volatile memory
- Patent number 7,160,774
- Issue date Jan 9, 2007
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Source side programming
- Patent number 7,154,141
- Issue date Dec 26, 2006
- Hyundai Electronics America
- Hsingya Arthur Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory device having poly spacers
- Patent number 6,911,370
- Issue date Jun 28, 2005
- Hynix Semiconductor, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory cell erase scheme using both source and channel regions
- Patent number 6,876,582
- Issue date Apr 5, 2005
- Hynix Semiconductor, Inc.
- Hsingya A. Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming transistors with ultra-short gate feature
- Patent number 6,849,489
- Issue date Feb 1, 2005
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Processes and structures for self-aligned contact non-volatile memo...
- Patent number 6,818,504
- Issue date Nov 16, 2004
- Hynix Semiconductor America, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polysilicon layers structure and method of forming same
- Patent number 6,812,515
- Issue date Nov 2, 2004
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory cells with selectively formed floating gate
- Patent number 6,777,741
- Issue date Aug 17, 2004
- Hynix Semiconductor America, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with ultra-short gate feature and method of fabricating...
- Patent number 6,746,906
- Issue date Jun 8, 2004
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory cells with selectively formed floating gate
- Patent number 6,559,008
- Issue date May 6, 2003
- Hynix Semiconductor America, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory cell fabrication sequence
- Patent number 6,509,237
- Issue date Jan 21, 2003
- Hynix Semiconductor America, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-convergence of post-erase threshold voltages in a flash memory...
- Patent number 6,169,693
- Issue date Jan 2, 2001
- Hyundai Electronics America, Inc.
- I-Chuin Peter Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Triple well flash memory fabrication process
- Patent number 6,043,123
- Issue date Mar 28, 2000
- Hyundai Electronics America, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-convergence of post-erase threshold voltages in a flash memory...
- Patent number 6,026,026
- Issue date Feb 15, 2000
- Hyundai Electronics America, Inc.
- I-Chuin Peter Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of fabricating topside structure of a semiconductor device
- Patent number 5,989,938
- Issue date Nov 23, 1999
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a silicon gate to produce silicon devices with im...
- Patent number 5,981,364
- Issue date Nov 9, 1999
- Advanced Micro Devices, Inc.
- Mark T. Ramsbey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for bulk preprogramming flash memory cells wit...
- Patent number 5,920,506
- Issue date Jul 6, 1999
- Hyundai Electronics America, Inc.
- Hsingya Arthur Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of forming low capacitance interconnect structures on semico...
- Patent number 5,908,318
- Issue date Jun 1, 1999
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming oxide isolation in a semiconductor device
- Patent number 5,899,726
- Issue date May 4, 1999
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduction of field oxide step height during semiconductor fabrication
- Patent number 5,882,985
- Issue date Mar 16, 1999
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of improving oxide isolation in a semiconductor device
- Patent number 5,866,467
- Issue date Feb 2, 1999
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of programming a memory cell to contain multiple values
- Patent number 5,831,901
- Issue date Nov 3, 1998
- Advanced Micro Devices, Inc.
- Yuan Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
E.sup.2 PROM device having erase gate in oxide isolation region in...
- Patent number 5,818,082
- Issue date Oct 6, 1998
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified process for fabricating flash eeprom cells
- Patent number 5,776,811
- Issue date Jul 7, 1998
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Block select transistor and method of fabrication
- Patent number 5,763,307
- Issue date Jun 9, 1998
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device including means for preventing tungsten silicide lifting, an...
- Patent number 5,747,882
- Issue date May 5, 1998
- Advanced Micro Devices, Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PHASE-CHANGE MATERIAL MEMORY CELL
- Publication number 20100096610
- Publication date Apr 22, 2010
- Hsingya A. Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming a Non-volatile Memory Cell Using Off-set Spacers
- Publication number 20080166844
- Publication date Jul 10, 2008
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming Transistors with Ultra-short Gate Feature
- Publication number 20070148873
- Publication date Jun 28, 2007
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming polysilicon layers in a transistor
- Publication number 20060252193
- Publication date Nov 9, 2006
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flash memory device having poly spacers
- Publication number 20050186739
- Publication date Aug 25, 2005
- Hynix Semiconductor Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming transistors with ultra-short gate feature
- Publication number 20050142717
- Publication date Jun 30, 2005
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming polysilicon layers
- Publication number 20040227179
- Publication date Nov 18, 2004
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming transistors with ultra-short gate feature
- Publication number 20040219755
- Publication date Nov 4, 2004
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile memory cell with non-uniform surface floating gate and...
- Publication number 20040152260
- Publication date Aug 5, 2004
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flash memory cell erase scheme using both source and channel regions
- Publication number 20030218912
- Publication date Nov 27, 2003
- Hynix Semiconductor Inc.
- Hsingya A. Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory device having poly spacers
- Publication number 20030218206
- Publication date Nov 27, 2003
- Hynix Semiconductor Inc.
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile memory cells with selectively formed floating gate
- Publication number 20030203571
- Publication date Oct 30, 2003
- Hynix Semiconductor America, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polysilicon layers structure and method of forming same
- Publication number 20030102503
- Publication date Jun 5, 2003
- Hynix Semiconductor, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY CELLS WITH SELECTIVELY FORMED FLOATING GATE
- Publication number 20030068860
- Publication date Apr 10, 2003
- Hynix Semiconductor America, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Processes and structures for self-aligned contact non-volatile memo...
- Publication number 20030032239
- Publication date Feb 13, 2003
- Hynix Semiconductor America, Inc.
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY CELL FABRICATION SEQUENCE
- Publication number 20020168824
- Publication date Nov 14, 2002
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor and memory cell with ultra-short gate feature and method...
- Publication number 20020123180
- Publication date Sep 5, 2002
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH ULTA-SHORT GATE FEATURE AND METHOD OF FABRICATING T...
- Publication number 20020123182
- Publication date Sep 5, 2002
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Source side programming
- Publication number 20020105036
- Publication date Aug 8, 2002
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Triple well flash memory cell and fabrication process
- Publication number 20020048192
- Publication date Apr 25, 2002
- Hsingya Arthur Wang
- H01 - BASIC ELECTRIC ELEMENTS

Hsingya Arthur Wang

Person

Patents Grantslast 30 patents

Method of forming transistors with ultra-short gate feature

Method of forming a non-volatile memory cell using off-set spacers

Flash memory device having poly spacers

Method of forming transistors with ultra-short gate feature

Method of forming polysilicon layers in non-volatile memory

Source side programming

Flash memory device having poly spacers

Flash memory cell erase scheme using both source and channel regions

Method for forming transistors with ultra-short gate feature

Processes and structures for self-aligned contact non-volatile memo...

Polysilicon layers structure and method of forming same

Non-volatile memory cells with selectively formed floating gate

Transistor with ultra-short gate feature and method of fabricating...

Non-volatile memory cells with selectively formed floating gate

Flash memory cell fabrication sequence

Self-convergence of post-erase threshold voltages in a flash memory...

Triple well flash memory fabrication process

Self-convergence of post-erase threshold voltages in a flash memory...

Method of fabricating topside structure of a semiconductor device

Method of forming a silicon gate to produce silicon devices with im...

Method and apparatus for bulk preprogramming flash memory cells wit...

Method of forming low capacitance interconnect structures on semico...

Method of forming oxide isolation in a semiconductor device

Reduction of field oxide step height during semiconductor fabrication

Method of improving oxide isolation in a semiconductor device

Method of programming a memory cell to contain multiple values

E.sup.2 PROM device having erase gate in oxide isolation region in...

Simplified process for fabricating flash eeprom cells

Block select transistor and method of fabrication

Device including means for preventing tungsten silicide lifting, an...

Patents Applicationslast 30 patents

PHASE-CHANGE MATERIAL MEMORY CELL

Method of Forming a Non-volatile Memory Cell Using Off-set Spacers

Method of Forming Transistors with Ultra-short Gate Feature

Method of forming polysilicon layers in a transistor

Flash memory device having poly spacers

Method of forming transistors with ultra-short gate feature

Method of forming polysilicon layers

Method for forming transistors with ultra-short gate feature

Non-volatile memory cell with non-uniform surface floating gate and...

Flash memory cell erase scheme using both source and channel regions

Flash memory device having poly spacers

Non-volatile memory cells with selectively formed floating gate

Polysilicon layers structure and method of forming same

NON-VOLATILE MEMORY CELLS WITH SELECTIVELY FORMED FLOATING GATE

Processes and structures for self-aligned contact non-volatile memo...

FLASH MEMORY CELL FABRICATION SEQUENCE

Transistor and memory cell with ultra-short gate feature and method...

TRANSISTOR WITH ULTA-SHORT GATE FEATURE AND METHOD OF FABRICATING T...

Source side programming

Triple well flash memory cell and fabrication process