Omer H. Dokumaci

Person

Poughkeepsie, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
High performance stress-enhanced MOSFETs using Si:C and SiGe epitax...
- Patent number 9,401,424
- Issue date Jul 26, 2016
- Samsung Electronics Co., Ltd.
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance stress-enhanced MOSFETs using Si:C and SiGe epitax...
- Patent number 9,023,698
- Issue date May 5, 2015
- Samsung Electronics Co., Ltd.
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance stress-enhanced MOSFETs using Si:C and SiGe epitax...
- Patent number 8,901,566
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon device on Si: C-oi and Sgoi and method of manufacture
- Patent number 8,633,071
- Issue date Jan 21, 2014
- International Business Machines Corporation
- Duresti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon device on Si:C-OI and SGOI and method of manufacture
- Patent number 8,232,153
- Issue date Jul 31, 2012
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance stress-enhanced MOSFETS using Si:C and SiGe epitax...
- Patent number 8,168,489
- Issue date May 1, 2012
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon device on Si:C SOI and SiGe and method of manufacture
- Patent number 8,119,472
- Issue date Feb 21, 2012
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra shallow junction formation by epitaxial interface limited dif...
- Patent number 8,067,805
- Issue date Nov 29, 2011
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded stressed nitride liners for CMOS performance improvement
- Patent number 8,013,397
- Issue date Sep 6, 2011
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFETs single-sided implant formation
- Patent number 7,994,612
- Issue date Aug 9, 2011
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained silicon on relaxed sige film with uniform misfit dislocati...
- Patent number 7,964,865
- Issue date Jun 21, 2011
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned planar double-gate transistor structure
- Patent number 7,960,790
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anti-halo compensation
- Patent number 7,952,149
- Issue date May 31, 2011
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Halo-first ultra-thin SOI FET for superior short channel control
- Patent number 7,859,061
- Issue date Dec 28, 2010
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra shallow junction formation by epitaxial interface limited dif...
- Patent number 7,816,237
- Issue date Oct 19, 2010
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Anti-halo compensation
- Patent number 7,754,569
- Issue date Jul 13, 2010
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method to improve channel mobility by gate electrode...
- Patent number 7,750,410
- Issue date Jul 6, 2010
- International Business Machines Corporation
- Michael P. Belyansky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOSFET performance improvement using deformation in SOI structure
- Patent number 7,745,277
- Issue date Jun 29, 2010
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor structure
- Patent number 7,732,288
- Issue date Jun 8, 2010
- International Business Machines Corporation
- Huilong Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall semiconductor transistors
- Patent number 7,696,025
- Issue date Apr 13, 2010
- International Business Machines Corporation
- Huilong Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor having high mobility channel and methods
- Patent number 7,682,887
- Issue date Mar 23, 2010
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded stressed nitride liners for CMOS performance improvement
- Patent number 7,615,454
- Issue date Nov 10, 2009
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Halo-first ultra-thin SOI FET for superior short channel control
- Patent number 7,595,247
- Issue date Sep 29, 2009
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained Si on multiple materials for bulk or SOI substrates
- Patent number 7,560,328
- Issue date Jul 14, 2009
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained dislocation-free channels for CMOS and method of manufacture
- Patent number 7,495,291
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to improve the SiGe heterojunction bipolar device performance
- Patent number 7,476,914
- Issue date Jan 13, 2009
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Backgated FinFET having different oxide thicknesses
- Patent number 7,476,946
- Issue date Jan 13, 2009
- International Business Machines Corporation
- Andres Bryant
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned planar double-gate transistor structure
- Patent number 7,453,123
- Issue date Nov 18, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reduced N+ diffusion in strained Si on SiGe substrate
- Patent number 7,410,846
- Issue date Aug 12, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra shallow junction formation by epitaxial interface limited dif...
- Patent number 7,402,870
- Issue date Jul 22, 2008
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...
- Publication number 20140322873
- Publication date Oct 30, 2014
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...
- Publication number 20120196412
- Publication date Aug 2, 2012
- International Business Machines Corporation
- Huajie CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON DEVICE ON SI: C-OI AND SGOI AND METHOD OF MANUFACTURE
- Publication number 20120052653
- Publication date Mar 1, 2012
- International Business Machines Corporation
- Duresetl CHIDAMBARRAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HALO-FIRST ULTRA-THIN SOI FET FOR SUPERIOR SHORT CHANNEL CONTROL
- Publication number 20090294854
- Publication date Dec 3, 2009
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFETs SINGLE-SIDED IMPLANT FORMATION
- Publication number 20090261425
- Publication date Oct 22, 2009
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE
- Publication number 20090142894
- Publication date Jun 4, 2009
- Huilong Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming Non-Amorphous, Ultra-Thin Semiconductor Devices...
- Publication number 20080311732
- Publication date Dec 18, 2008
- International Business Machines Corporation
- Omer Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HALO-FIRST ULTRA-THIN SOI FET FOR SUPERIOR SHORT CHANNEL CONTROL
- Publication number 20080290409
- Publication date Nov 27, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIDEWALL SEMICONDUCTOR TRANSISTORS
- Publication number 20080286909
- Publication date Nov 20, 2008
- Huilong Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE
- Publication number 20080246090
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIF...
- Publication number 20080233687
- Publication date Sep 25, 2008
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIF...
- Publication number 20080230840
- Publication date Sep 25, 2008
- International Business Machines Corporation
- Huajie Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED STRESSED NITRIDE LINERS FOR CMOS PERFORMANCE IMPROVEMENT
- Publication number 20080164532
- Publication date Jul 10, 2008
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO IMPROVE THE SiGe HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE
- Publication number 20080128861
- Publication date Jun 5, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTI-HALO COMPENSATION
- Publication number 20080070391
- Publication date Mar 20, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED STRESSED NITRIDE LINERS FOR CMOS PERFORMANCE IMPROVEMENT
- Publication number 20080044974
- Publication date Feb 21, 2008
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...
- Publication number 20070296038
- Publication date Dec 27, 2007
- International Business Machines Corporation
- Huajie CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...
- Publication number 20070264783
- Publication date Nov 15, 2007
- International Business Machines Corporation
- Huajie CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON DEVICE ON SI: C-OI AND SGOI AND METHOD OF MANUFACTURE
- Publication number 20070231979
- Publication date Oct 4, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON DEVICE ON SI: C-OI AND SGOI AND METHOD OF MANUFACTURE
- Publication number 20070228472
- Publication date Oct 4, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL STRESSED SOI SUBSTRATES
- Publication number 20070202639
- Publication date Aug 30, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOSFET WTH HIGH ANGLE SIDEWALL GATE AND CONTACTS FOR REDUCED MILLER...
- Publication number 20070184621
- Publication date Aug 9, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED Si ON MULTIPLE MATERIALS FOR BULK OR SOI SUBSTRATES
- Publication number 20070166897
- Publication date Jul 19, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED PLANAR DOUBLE-GATE PROCESS BY SELF-ALIGNED OXIDATION
- Publication number 20070138556
- Publication date Jun 21, 2007
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR HAVING HIGH MOBILITY CHANNEL AND METHODS
- Publication number 20070087540
- Publication date Apr 19, 2007
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE LOW AND HIGH K GATE OXIDES ON SINGLE GATE FOR LOWER MILLER...
- Publication number 20070063277
- Publication date Mar 22, 2007
- International Business Machines Corporation
- Michael P. Belyansky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOSFET WITH HIGH ANGLE SIDEWALL GATE AND CONTACTS FOR REDUCED MILLE...
- Publication number 20070057334
- Publication date Mar 15, 2007
- International Business Machines Corporation
- Dureseti Chidambarrao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR DYNAMIC CONTROL OF DOUBLE GATE DEVICES
- Publication number 20070035981
- Publication date Feb 15, 2007
- International Business Machines Corporation
- Alper Buyuktosunoglu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ANTI-HALO COMPENSATION
- Publication number 20060255375
- Publication date Nov 16, 2006
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO IMPROVE THE SIGE HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE
- Publication number 20060252216
- Publication date Nov 9, 2006
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS

Omer H. Dokumaci

Person

Patents Grantslast 30 patents

High performance stress-enhanced MOSFETs using Si:C and SiGe epitax...

High performance stress-enhanced MOSFETs using Si:C and SiGe epitax...

High performance stress-enhanced MOSFETs using Si:C and SiGe epitax...

Silicon device on Si: C-oi and Sgoi and method of manufacture

Silicon device on Si:C-OI and SGOI and method of manufacture

High performance stress-enhanced MOSFETS using Si:C and SiGe epitax...

Silicon device on Si:C SOI and SiGe and method of manufacture

Ultra shallow junction formation by epitaxial interface limited dif...

Embedded stressed nitride liners for CMOS performance improvement

FinFETs single-sided implant formation

Strained silicon on relaxed sige film with uniform misfit dislocati...

Self-aligned planar double-gate transistor structure

Anti-halo compensation

Halo-first ultra-thin SOI FET for superior short channel control

Ultra shallow junction formation by epitaxial interface limited dif...

Anti-halo compensation

Structure and method to improve channel mobility by gate electrode...

MOSFET performance improvement using deformation in SOI structure

Method for fabricating a semiconductor structure

Sidewall semiconductor transistors

Transistor having high mobility channel and methods

Embedded stressed nitride liners for CMOS performance improvement

Halo-first ultra-thin SOI FET for superior short channel control

Strained Si on multiple materials for bulk or SOI substrates

Strained dislocation-free channels for CMOS and method of manufacture

Methods to improve the SiGe heterojunction bipolar device performance

Backgated FinFET having different oxide thicknesses

Self-aligned planar double-gate transistor structure

Method for reduced N+ diffusion in strained Si on SiGe substrate

Ultra shallow junction formation by epitaxial interface limited dif...

Patents Applicationslast 30 patents

HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...

HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...

SILICON DEVICE ON SI: C-OI AND SGOI AND METHOD OF MANUFACTURE

HALO-FIRST ULTRA-THIN SOI FET FOR SUPERIOR SHORT CHANNEL CONTROL

FINFETs SINGLE-SIDED IMPLANT FORMATION

METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE

Method for Forming Non-Amorphous, Ultra-Thin Semiconductor Devices...

HALO-FIRST ULTRA-THIN SOI FET FOR SUPERIOR SHORT CHANNEL CONTROL

SIDEWALL SEMICONDUCTOR TRANSISTORS

SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE

ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIF...

ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIF...

EMBEDDED STRESSED NITRIDE LINERS FOR CMOS PERFORMANCE IMPROVEMENT

METHODS TO IMPROVE THE SiGe HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE

ANTI-HALO COMPENSATION

EMBEDDED STRESSED NITRIDE LINERS FOR CMOS PERFORMANCE IMPROVEMENT

HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...

HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAX...

SILICON DEVICE ON SI: C-OI AND SGOI AND METHOD OF MANUFACTURE

SILICON DEVICE ON SI: C-OI AND SGOI AND METHOD OF MANUFACTURE

DUAL STRESSED SOI SUBSTRATES

MOSFET WTH HIGH ANGLE SIDEWALL GATE AND CONTACTS FOR REDUCED MILLER...

STRAINED Si ON MULTIPLE MATERIALS FOR BULK OR SOI SUBSTRATES

SELF-ALIGNED PLANAR DOUBLE-GATE PROCESS BY SELF-ALIGNED OXIDATION

TRANSISTOR HAVING HIGH MOBILITY CHANNEL AND METHODS

MULTIPLE LOW AND HIGH K GATE OXIDES ON SINGLE GATE FOR LOWER MILLER...

MOSFET WITH HIGH ANGLE SIDEWALL GATE AND CONTACTS FOR REDUCED MILLE...

APPARATUS AND METHOD FOR DYNAMIC CONTROL OF DOUBLE GATE DEVICES

ANTI-HALO COMPENSATION

METHODS TO IMPROVE THE SIGE HETEROJUNCTION BIPOLAR DEVICE PERFORMANCE