Paul E. Gregory

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Advanced transistors with punch through suppression
- Patent number 10,325,986
- Issue date Jun 18, 2019
- Mie Fujitsu Semiconductor Limited
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 10,217,838
- Issue date Feb 26, 2019
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 10,014,387
- Issue date Jul 3, 2018
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 9,812,550
- Issue date Nov 7, 2017
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced transistors with punch through suppression
- Patent number 9,508,800
- Issue date Nov 29, 2016
- Mie Fujitsu Semiconductor Limited
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS structures and processes based on selective thinning
- Patent number 9,391,076
- Issue date Jul 12, 2016
- Mie Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 9,299,698
- Issue date Mar 29, 2016
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced transistors with punch through suppression
- Patent number 9,263,523
- Issue date Feb 16, 2016
- Mie Fujitsu Semiconductor Limited
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with improved channel stack and method for...
- Patent number 9,111,785
- Issue date Aug 18, 2015
- Mie Fujitsu Semiconductor Limited
- Paul E. Gregory
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Analog transistor
- Patent number 9,093,469
- Issue date Jul 28, 2015
- Mie Fujitsu Semiconductor Limited
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deeply depleted MOS transistors having a screening layer and method...
- Patent number 9,041,126
- Issue date May 26, 2015
- Mie Fujitsu Semiconductor Limited
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing an improved analog transistor
- Patent number 8,748,270
- Issue date Jun 10, 2014
- SuVolta, Inc.
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS structures and processes based on selective thinning
- Patent number 8,614,128
- Issue date Dec 24, 2013
- SuVolta, Inc.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with improved channel stack and method for...
- Patent number 8,525,271
- Issue date Sep 3, 2013
- SuVolta, Inc.
- Paul E. Gregory
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced transistors with punch through suppression
- Patent number 8,421,162
- Issue date Apr 16, 2013
- SuVolta, Inc.
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Structure With Multiple Transistors Having Various Th...
- Publication number 20180261683
- Publication date Sep 13, 2018
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure with Multiple Transistors Having Various Th...
- Publication number 20170141209
- Publication date May 18, 2017
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Advanced Transistors with Punch Through Suppression
- Publication number 20170040419
- Publication date Feb 9, 2017
- MIE Fujitsu Semiconductor Limited
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS Structures and Processes Based on Selective Thinning
- Publication number 20160307907
- Publication date Oct 20, 2016
- MIE Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Advanced Transistors with Punch Through Suppression
- Publication number 20160181370
- Publication date Jun 23, 2016
- MIE Fujitsu Semiconductor Limited
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure with Multiple Transistors Having Various Th...
- Publication number 20160163823
- Publication date Jun 9, 2016
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANALOG TRANSISTOR
- Publication number 20140248753
- Publication date Sep 4, 2014
- SUVOLTA, INC.
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION
- Publication number 20140167156
- Publication date Jun 19, 2014
- SuVolta, lnc.
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEPLY DEPLETED MOS TRANSISTORS HAVING A SCREENING LAYER AND METHOD...
- Publication number 20140084385
- Publication date Mar 27, 2014
- SUVOLTA, INC.
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH MULTIPLE TRANSISTORS HAVING VARIOUS TH...
- Publication number 20140001571
- Publication date Jan 2, 2014
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH IMPROVED CHANNEL STACK AND METHOD FOR...
- Publication number 20130313652
- Publication date Nov 28, 2013
- Paul E. Gregory
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION
- Publication number 20130181298
- Publication date Jul 18, 2013
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH IMPROVED CHANNEL STACK AND METHOD FOR...
- Publication number 20120223389
- Publication date Sep 6, 2012
- SUVOLTA, INC.
- Paul E. Gregory
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION
- Publication number 20110121404
- Publication date May 26, 2011
- Lucian Shifren
- H01 - BASIC ELECTRIC ELEMENTS

Paul E. Gregory

Person

Patents Grantslast 30 patents

Advanced transistors with punch through suppression

Semiconductor structure with multiple transistors having various th...

Semiconductor structure with multiple transistors having various th...

Semiconductor structure with multiple transistors having various th...

Advanced transistors with punch through suppression

CMOS structures and processes based on selective thinning

Semiconductor structure with multiple transistors having various th...

Advanced transistors with punch through suppression

Semiconductor structure with improved channel stack and method for...

Analog transistor

Deeply depleted MOS transistors having a screening layer and method...

Process for manufacturing an improved analog transistor

CMOS structures and processes based on selective thinning

Semiconductor structure with improved channel stack and method for...

Advanced transistors with punch through suppression

Patents Applicationslast 30 patents

Semiconductor Structure With Multiple Transistors Having Various Th...

Semiconductor Structure with Multiple Transistors Having Various Th...

Advanced Transistors with Punch Through Suppression

CMOS Structures and Processes Based on Selective Thinning

Advanced Transistors with Punch Through Suppression

Semiconductor Structure with Multiple Transistors Having Various Th...

ANALOG TRANSISTOR

ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION

DEEPLY DEPLETED MOS TRANSISTORS HAVING A SCREENING LAYER AND METHOD...

SEMICONDUCTOR STRUCTURE WITH MULTIPLE TRANSISTORS HAVING VARIOUS TH...

SEMICONDUCTOR STRUCTURE WITH IMPROVED CHANNEL STACK AND METHOD FOR...

ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION

SEMICONDUCTOR STRUCTURE WITH IMPROVED CHANNEL STACK AND METHOD FOR...

ADVANCED TRANSISTORS WITH PUNCH THROUGH SUPPRESSION