Rajendran Nair

Person

Gilbert, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated inductor structure and method of fabrication
- Patent number 9,153,547
- Issue date Oct 6, 2015
- Intel Corporation
- Ankur Mohan Crawford
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Flat wire shielded pair and cable
- Patent number 8,563,865
- Issue date Oct 22, 2013
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shielded flat pair cable architecture
- Patent number 7,449,639
- Issue date Nov 11, 2008
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoupled signal-power substrate architecture
- Patent number 7,405,364
- Issue date Jul 29, 2008
- Intel Corporation
- Rajendran Nair
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Voltage droop suppressing circuit
- Patent number 7,378,898
- Issue date May 27, 2008
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Push pull high-swing capable differential signaling circuits
- Patent number 7,348,810
- Issue date Mar 25, 2008
- Rajendran Nair
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Voltage droop suppressing active interposer
- Patent number 7,291,896
- Issue date Nov 6, 2007
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for driving low input impedance power transist...
- Patent number 7,126,387
- Issue date Oct 24, 2006
- Rajendran Nair
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
High capacitance package substrate
- Patent number 7,053,481
- Issue date May 30, 2006
- Intel Corporation
- Rajendran Nair
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Symmetric voltage follower buffer
- Patent number 6,958,632
- Issue date Oct 25, 2005
- Intel Corporation
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High capacitance package substrate
- Patent number 6,878,572
- Issue date Apr 12, 2005
- Intel Corporation
- Rajendran Nair
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and apparatus for weak inversion mode MOS decoupling capacitor
- Patent number 6,849,909
- Issue date Feb 1, 2005
- Intel Corporation
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoupling capacitors for thin gate oxides
- Patent number 6,828,638
- Issue date Dec 7, 2004
- Intel Corporation
- Ali Keshavarzi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Phase lock loop apparatus
- Patent number 6,812,757
- Issue date Nov 2, 2004
- Intel Corporation
- Michael Pang-Cheng Hsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low jitter external clocking
- Patent number 6,798,265
- Issue date Sep 28, 2004
- Intel Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Symmetric voltage follower buffer
- Patent number 6,717,445
- Issue date Apr 6, 2004
- Intel Corporation
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for automatic duty cycle control using adaptive body bias co...
- Patent number 6,664,834
- Issue date Dec 16, 2003
- Intel Corporation
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ferroelectric memory and method for reading the same
- Patent number 6,611,448
- Issue date Aug 26, 2003
- Intel Corporation
- Rajendran Nair
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage dependent capacitor configuration for higher soft error rat...
- Patent number 6,552,887
- Issue date Apr 22, 2003
- Intel Corporation
- Tanay Karnik
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth switched capacitor input receiver
- Patent number 6,538,502
- Issue date Mar 25, 2003
- Intel Corporation
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ferroelectric memory and method for reading the same
- Patent number 6,529,398
- Issue date Mar 4, 2003
- Intel Corporation
- Rajendran Nair
- G11 - INFORMATION STORAGE
Information Patent Grant
Ferroelectric memory and method for reading the same
- Patent number 6,522,568
- Issue date Feb 18, 2003
- Intel Corporation
- Rajendran Nair
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for increasing signal to sneak ratio in polari...
- Patent number 6,466,473
- Issue date Oct 15, 2002
- Intel Corporation
- Rajendran Nair
- G11 - INFORMATION STORAGE
Information Patent Grant
Duty cycle control loop
- Patent number 6,456,133
- Issue date Sep 24, 2002
- Intel Corporation
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive body biasing circuit and method
- Patent number 6,448,840
- Issue date Sep 10, 2002
- Intel Corporation
- James T. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage to current converter
- Patent number 6,420,912
- Issue date Jul 16, 2002
- Intel Corporation
- Michael Pang-Cheng Hsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low jitter external clocking
- Patent number 6,411,151
- Issue date Jun 25, 2002
- Inter Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low jitter differential amplifier with negative hysteresis
- Patent number 6,377,108
- Issue date Apr 23, 2002
- Intel Corporation
- Joseph T. Kennedy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed readout architecture for analog storage arrays
- Patent number 6,366,320
- Issue date Apr 2, 2002
- Intel Corporation
- Rajendran Nair
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Differential delay cell with common delay control and power supply
- Patent number 6,351,191
- Issue date Feb 26, 2002
- Intel Corporation
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Flat wire shielded pair and cable
- Publication number 20120043107
- Publication date Feb 23, 2012
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED INDUCTOR STRUCTURE AND METHOD OF FABRICATION
- Publication number 20090201113
- Publication date Aug 13, 2009
- Ankur Mohan Crawford
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Swizzled twisted pair cable for simultaneous skew and crosstalk min...
- Publication number 20080308294
- Publication date Dec 18, 2008
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shielded flat pair cable with integrated resonant filter compensation
- Publication number 20080173464
- Publication date Jul 24, 2008
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shielded flat pair cable architecture
- Publication number 20080173465
- Publication date Jul 24, 2008
- Rajendran Nair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wideband dual-loop data recovery DLL architecture
- Publication number 20080116949
- Publication date May 22, 2008
- Rajendran Nair
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Source-coupled differential low-swing driver circuits
- Publication number 20080116935
- Publication date May 22, 2008
- Rajendran Nair
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
True-differential DVI/HDMI line driver
- Publication number 20080116943
- Publication date May 22, 2008
- Rajendran Nair
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Regulated supply phase locked loop
- Publication number 20080111646
- Publication date May 15, 2008
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Wideband dual-loop data recovery DLL architecture
- Publication number 20080111599
- Publication date May 15, 2008
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED INDUCTOR STRUCTURE AND METHOD OF FABRICATION
- Publication number 20070069333
- Publication date Mar 29, 2007
- Ankur Mohan Crawford
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Active noise regulator
- Publication number 20060186937
- Publication date Aug 24, 2006
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Integrated inductor and method of fabrication
- Publication number 20060088971
- Publication date Apr 27, 2006
- Ankur Mohan Crawford
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Voltage droop suppressing circuit
- Publication number 20060022733
- Publication date Feb 2, 2006
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage droop suppressing active interposer
- Publication number 20050285252
- Publication date Dec 29, 2005
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method & apparatus for transient suppressing high-bandwidth voltage...
- Publication number 20050168890
- Publication date Aug 4, 2005
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method & apparatus for charging, discharging and protection of elec...
- Publication number 20050040792
- Publication date Feb 24, 2005
- Rajendran Nair
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Low jitter external clocking
- Publication number 20050007163
- Publication date Jan 13, 2005
- Intel Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method & apparatus for driving low input impedance power transistor...
- Publication number 20040196075
- Publication date Oct 7, 2004
- Rajendran Nair
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Circuit package apparatus, systems, and methods
- Publication number 20040188811
- Publication date Sep 30, 2004
- Intel Corporation
- Gilroy J. Vandentop
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Phase indication apparatus
- Publication number 20040169536
- Publication date Sep 2, 2004
- Intel Corporation
- Michael Pang-Cheng Hsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Decoupled signal-power substrate architecture
- Publication number 20040124004
- Publication date Jul 1, 2004
- Rajendran Nair
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
High capacitance package substrate
- Publication number 20040095734
- Publication date May 20, 2004
- Rajendran Nair
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Symmetric voltage follower buffer
- Publication number 20040061535
- Publication date Apr 1, 2004
- Rajendran Nair
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High capacitance package substrate
- Publication number 20030222314
- Publication date Dec 4, 2003
- Rajendran Nair
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DEVICE AND METHOD FOR CONTROLLING VOLTAGE VARIATION
- Publication number 20030058022
- Publication date Mar 27, 2003
- RAJENDRAN NAIR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Ferroelectric memory and method for reading the same
- Publication number 20030026122
- Publication date Feb 6, 2003
- Rajendran Nair
- G11 - INFORMATION STORAGE
Information Patent Application
FERROELECTRIC MEMORY AND METHOD FOR READING THE SAME
- Publication number 20030021143
- Publication date Jan 30, 2003
- Intel Corporation
- Rajendran Nair
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage to current converter
- Publication number 20020149432
- Publication date Oct 17, 2002
- Intel Corporation
- Michael Pang-Cheng Hsu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR INCREASING SIGNAL TO SNEAK RATIO IN POLARI...
- Publication number 20020141222
- Publication date Oct 3, 2002
- Rajendran Nair
- G11 - INFORMATION STORAGE

Rajendran Nair

Person

Patents Grantslast 30 patents

Integrated inductor structure and method of fabrication

Flat wire shielded pair and cable

Shielded flat pair cable architecture

Decoupled signal-power substrate architecture

Voltage droop suppressing circuit

Push pull high-swing capable differential signaling circuits

Voltage droop suppressing active interposer

Method and apparatus for driving low input impedance power transist...

High capacitance package substrate

Symmetric voltage follower buffer

High capacitance package substrate

Method and apparatus for weak inversion mode MOS decoupling capacitor

Decoupling capacitors for thin gate oxides

Phase lock loop apparatus

Low jitter external clocking

Symmetric voltage follower buffer

Method for automatic duty cycle control using adaptive body bias co...

Ferroelectric memory and method for reading the same

Voltage dependent capacitor configuration for higher soft error rat...

High bandwidth switched capacitor input receiver

Ferroelectric memory and method for reading the same

Ferroelectric memory and method for reading the same

Method and apparatus for increasing signal to sneak ratio in polari...

Duty cycle control loop

Adaptive body biasing circuit and method

Voltage to current converter

Low jitter external clocking

Low jitter differential amplifier with negative hysteresis

High speed readout architecture for analog storage arrays

Differential delay cell with common delay control and power supply

Patents Applicationslast 30 patents

Flat wire shielded pair and cable

INTEGRATED INDUCTOR STRUCTURE AND METHOD OF FABRICATION

Swizzled twisted pair cable for simultaneous skew and crosstalk min...

Shielded flat pair cable with integrated resonant filter compensation

Shielded flat pair cable architecture

Wideband dual-loop data recovery DLL architecture

Source-coupled differential low-swing driver circuits

True-differential DVI/HDMI line driver

Regulated supply phase locked loop

Wideband dual-loop data recovery DLL architecture

INTEGRATED INDUCTOR STRUCTURE AND METHOD OF FABRICATION

Active noise regulator

Integrated inductor and method of fabrication

Voltage droop suppressing circuit

Voltage droop suppressing active interposer

Method & apparatus for transient suppressing high-bandwidth voltage...

Method & apparatus for charging, discharging and protection of elec...

Low jitter external clocking

Method & apparatus for driving low input impedance power transistor...

Circuit package apparatus, systems, and methods

Phase indication apparatus

Decoupled signal-power substrate architecture

High capacitance package substrate

Symmetric voltage follower buffer

High capacitance package substrate

DEVICE AND METHOD FOR CONTROLLING VOLTAGE VARIATION

Ferroelectric memory and method for reading the same

FERROELECTRIC MEMORY AND METHOD FOR READING THE SAME

Voltage to current converter

METHOD AND APPARATUS FOR INCREASING SIGNAL TO SNEAK RATIO IN POLARI...