Saravuth Sirinorakul

Person

Bangkok, TH

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor packages with integrated shielding
- Patent number 11,901,308
- Issue date Feb 13, 2024
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming protective layer around...
- Patent number 11,804,416
- Issue date Oct 31, 2023
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked dies electrically connected to a package substrate by lead...
- Patent number 11,227,818
- Issue date Jan 18, 2022
- UTAC HEADQUARTERS PTE. LTD.
- Wing Keung Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cavity wall structure for semiconductor packaging
- Patent number 11,139,233
- Issue date Oct 5, 2021
- UTAC HEADQUARTERS PTE. LTD.
- Hua Hong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 10,734,247
- Issue date Aug 4, 2020
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cavity wall structure for semiconductor packaging
- Patent number 10,707,161
- Issue date Jul 7, 2020
- UTAC HEADQUARTERS PTE. LTD.
- Hua Hong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with a heat spreader and method of manufactur...
- Patent number 10,658,277
- Issue date May 19, 2020
- UTAC HEADQUARTERS PTE. LTD.
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with plated metal shielding and a method thereof
- Patent number 10,600,741
- Issue date Mar 24, 2020
- UTAC HEADQUARTERS PTE. LTD.
- Suebphong Yenrudee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive shield for semiconductor package
- Patent number 10,586,771
- Issue date Mar 10, 2020
- UTAC HEADQUARTERS PTE, LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with partial plating on contact side surfaces
- Patent number 10,515,878
- Issue date Dec 24, 2019
- UTAC HEADQUARTERS PTE. LTD.
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple stacked leadframes and a method...
- Patent number 10,361,146
- Issue date Jul 23, 2019
- UTAC HEADQUARTERS PTE, LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 10,325,782
- Issue date Jun 18, 2019
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple stacked leadframes and a method...
- Patent number 10,276,477
- Issue date Apr 30, 2019
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of improving adhesion between molding compounds and an appar...
- Patent number 10,269,686
- Issue date Apr 23, 2019
- UTAC HEADQUARTERS PTE, LTD.
- Suebphong Yenrudee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with plated metal shielding and a method thereof
- Patent number 10,242,953
- Issue date Mar 26, 2019
- UTAC HEADQUARTERS PTE. LTD.
- Suebphong Yenrudee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with full plating on contact side surfaces an...
- Patent number 10,242,934
- Issue date Mar 26, 2019
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with partial plating on contact side surfaces
- Patent number 10,204,850
- Issue date Feb 12, 2019
- UTAC HEADQUARTERS PTE, LTD.
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 10,163,658
- Issue date Dec 25, 2018
- UTAC HEADQUARTERS PTE, LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 10,096,490
- Issue date Oct 9, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 10,032,645
- Issue date Jul 24, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plated terminals with routing interconnections semiconductor device
- Patent number 9,972,563
- Issue date May 15, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip cavity package
- Patent number 9,947,605
- Issue date Apr 17, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plated terminals with routing interconnections semiconductor device
- Patent number 9,922,913
- Issue date Mar 20, 2018
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plated terminals with routing interconnections semiconductor device
- Patent number 9,922,914
- Issue date Mar 20, 2018
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 9,922,843
- Issue date Mar 20, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 9,917,038
- Issue date Mar 13, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Molded leadframe substrate semiconductor package
- Patent number 9,899,208
- Issue date Feb 20, 2018
- UTAC Thai Limited
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Singulation method for semiconductor package with plating on side o...
- Patent number 9,818,676
- Issue date Nov 14, 2017
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with multiple molding routing layers and a me...
- Patent number 9,805,955
- Issue date Oct 31, 2017
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package with partial plating on contact side surfaces
- Patent number 9,773,722
- Issue date Sep 26, 2017
- UTAC HEADQUARTERS PTE. LTD.
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FLIP CHIP SEMICONDUCTOR PACKAGE WITH A LEADFRAME TO ENHANCE PACKAGE...
- Publication number 20220270942
- Publication date Aug 25, 2022
- UTAC Headquarters Pte. Ltd.
- Nataporn Charusabha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Protective Layer Around...
- Publication number 20220077019
- Publication date Mar 10, 2022
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES WITH INTEGRATED SHIELDING
- Publication number 20220028798
- Publication date Jan 27, 2022
- UTAC Headquarters Pte. Ltd.
- Saravuth SIRINORAKUL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20210035891
- Publication date Feb 4, 2021
- UTAC Headquarters Pte. Ltd.
- Wing Keung LAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING
- Publication number 20200321273
- Publication date Oct 8, 2020
- UTAC Headquarters Pte. Ltd.
- Hua Hong TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH MULTIPLE STACKED LEADFRAMES AND A METHOD...
- Publication number 20190181077
- Publication date Jun 13, 2019
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THERMALLY ENHANCED LEADLESS SEMICONDUCTOR PACKAGE AND METHOD OF MAN...
- Publication number 20190051585
- Publication date Feb 14, 2019
- UTAC Headquarters Pte. Ltd.
- Antonio Bambalan DIMAANO JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING
- Publication number 20190043797
- Publication date Feb 7, 2019
- UTAC Headquarters Pte. Ltd.
- Hua Hong TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...
- Publication number 20180061667
- Publication date Mar 1, 2018
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...
- Publication number 20170352554
- Publication date Dec 7, 2017
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...
- Publication number 20170352555
- Publication date Dec 7, 2017
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...
- Publication number 20170352610
- Publication date Dec 7, 2017
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE
- Publication number 20160300783
- Publication date Oct 13, 2016
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE
- Publication number 20160300786
- Publication date Oct 13, 2016
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE
- Publication number 20160293533
- Publication date Oct 6, 2016
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGULATION METHOD FOR SEMICONDUCTOR PACKAGE WITH PLATING ON SIDE O...
- Publication number 20160240460
- Publication date Aug 18, 2016
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POST-MOLD FOR SEMICONDUCTOR PACKAGE HAVING EXPOSED TRACES
- Publication number 20160172282
- Publication date Jun 16, 2016
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE HAVING ROUTING TRACES THEREIN
- Publication number 20160064310
- Publication date Mar 3, 2016
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE SHIELD FOR SEMICONDUCTOR PACKAGE
- Publication number 20150171022
- Publication date Jun 18, 2015
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERY EXTREMELY THIN SEMICONDUCTOR PACKAGE
- Publication number 20140015117
- Publication date Jan 16, 2014
- UTAC Thai Limited
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THERMAL LEADLESS ARRAY PACKAGE WITH DIE ATTACH PAD LOCKING FEATURE
- Publication number 20140008777
- Publication date Jan 9, 2014
- UTAC DONGGUAN LTD
- Albert LOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEAD FRAME LAND GRID ARRAY WITH ROUTING CONNECTOR TRACE UNDER UNIT
- Publication number 20130337609
- Publication date Dec 19, 2013
- UTAC Thai Limited
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING TERMINALS...
- Publication number 20130302944
- Publication date Nov 14, 2013
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE
- Publication number 20130299979
- Publication date Nov 14, 2013
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROTRUDING TERMINALS WITH INTERNAL ROUTING INTERCONNECTIONS SEMICON...
- Publication number 20130299980
- Publication date Nov 14, 2013
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEAD FRAME BALL GRID ARRAY WITH TRACES UNDER DIE
- Publication number 20130280866
- Publication date Oct 24, 2013
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOLDED LEADFRAME SUBSTRATE SEMICONDUCTOR PACKAGE
- Publication number 20130243893
- Publication date Sep 19, 2013
- UTAC Thai Limited
- Somchai Nondhasitthichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEAD FRAME LAND GRID ARRAY
- Publication number 20130234307
- Publication date Sep 12, 2013
- UTAC Thai Limited
- Somchai Nondhasittichai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEADFRAME BASED MULTI TERMINAL IC PACKAGE
- Publication number 20130210197
- Publication date Aug 15, 2013
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS FOR AND METHODS OF ATTACHING HEAT SLUGS TO PACKAGE TOPS
- Publication number 20120094438
- Publication date Apr 19, 2012
- UTAC Thai Limited
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS

Saravuth Sirinorakul

Person

Patents Grantslast 30 patents

Semiconductor packages with integrated shielding

Semiconductor device and method of forming protective layer around...

Stacked dies electrically connected to a package substrate by lead...

Cavity wall structure for semiconductor packaging

Semiconductor package with multiple molding routing layers and a me...

Cavity wall structure for semiconductor packaging

Semiconductor package with a heat spreader and method of manufactur...

Semiconductor package with plated metal shielding and a method thereof

Conductive shield for semiconductor package

Semiconductor package with partial plating on contact side surfaces

Semiconductor package with multiple stacked leadframes and a method...

Semiconductor package with multiple molding routing layers and a me...

Semiconductor package with multiple stacked leadframes and a method...

Method of improving adhesion between molding compounds and an appar...

Semiconductor package with plated metal shielding and a method thereof

Semiconductor package with full plating on contact side surfaces an...

Semiconductor package with partial plating on contact side surfaces

Semiconductor package with multiple molding routing layers and a me...

Semiconductor package with multiple molding routing layers and a me...

Semiconductor package with multiple molding routing layers and a me...

Plated terminals with routing interconnections semiconductor device

Flip chip cavity package

Plated terminals with routing interconnections semiconductor device

Plated terminals with routing interconnections semiconductor device

Semiconductor package with multiple molding routing layers and a me...

Semiconductor package with multiple molding routing layers and a me...

Molded leadframe substrate semiconductor package

Singulation method for semiconductor package with plating on side o...

Semiconductor package with multiple molding routing layers and a me...

Semiconductor package with partial plating on contact side surfaces

Patents Applicationslast 30 patents

FLIP CHIP SEMICONDUCTOR PACKAGE WITH A LEADFRAME TO ENHANCE PACKAGE...

Semiconductor Device and Method of Forming Protective Layer Around...

SEMICONDUCTOR PACKAGES WITH INTEGRATED SHIELDING

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING

SEMICONDUCTOR PACKAGE WITH MULTIPLE STACKED LEADFRAMES AND A METHOD...

THERMALLY ENHANCED LEADLESS SEMICONDUCTOR PACKAGE AND METHOD OF MAN...

CAVITY WALL STRUCTURE FOR SEMICONDUCTOR PACKAGING

SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...

SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...

SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...

SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A ME...

PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE

PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE

PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE

SINGULATION METHOD FOR SEMICONDUCTOR PACKAGE WITH PLATING ON SIDE O...

POST-MOLD FOR SEMICONDUCTOR PACKAGE HAVING EXPOSED TRACES

SEMICONDUCTOR PACKAGE HAVING ROUTING TRACES THEREIN

CONDUCTIVE SHIELD FOR SEMICONDUCTOR PACKAGE

VERY EXTREMELY THIN SEMICONDUCTOR PACKAGE

THERMAL LEADLESS ARRAY PACKAGE WITH DIE ATTACH PAD LOCKING FEATURE

LEAD FRAME LAND GRID ARRAY WITH ROUTING CONNECTOR TRACE UNDER UNIT

METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING TERMINALS...

PLATED TERMINALS WITH ROUTING INTERCONNECTIONS SEMICONDUCTOR DEVICE

PROTRUDING TERMINALS WITH INTERNAL ROUTING INTERCONNECTIONS SEMICON...

LEAD FRAME BALL GRID ARRAY WITH TRACES UNDER DIE

MOLDED LEADFRAME SUBSTRATE SEMICONDUCTOR PACKAGE

LEAD FRAME LAND GRID ARRAY

LEADFRAME BASED MULTI TERMINAL IC PACKAGE

APPARATUS FOR AND METHODS OF ATTACHING HEAT SLUGS TO PACKAGE TOPS