Soh Yun SIAH

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device with dielectric blocking layer for improving interpol...
- Patent number 11,158,646
- Issue date Oct 26, 2021
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Soh Yun Siah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Neuromorphic memories with split gate flash multi-level cell and me...
- Patent number 11,119,917
- Issue date Sep 14, 2021
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Danny Pak-Chum Shum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated two-terminal device with logic device for embedded appli...
- Patent number 10,608,046
- Issue date Mar 31, 2020
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wanbing Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated two-terminal device with logic device for embedded appli...
- Patent number 10,446,607
- Issue date Oct 15, 2019
- GLOBALFOUNDARIES SINGAPORE PTE. LTD.
- Wanbing Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shielded MRAM cell
- Patent number 10,439,129
- Issue date Oct 8, 2019
- GLOBALFOUNDRIES Inc.
- Dimitri Houssameddine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cost-effective method to form a reliable memory device with selecti...
- Patent number 10,224,338
- Issue date Mar 5, 2019
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Soh Yun Siah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits including a dummy metal feature and methods of...
- Patent number 10,062,641
- Issue date Aug 28, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Haifeng Sheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing integrated circuit memory cells with less dedi...
- Patent number 9,929,165
- Issue date Mar 27, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Laiqiang Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Top electrode dome formation
- Patent number 9,905,282
- Issue date Feb 27, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wanbing Yi
- G11 - INFORMATION STORAGE
Information Patent Grant
Plasma discharge path
- Patent number 9,793,208
- Issue date Oct 17, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Haifeng Sheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming split-gate cell for non-volative memory devices
- Patent number 9,236,391
- Issue date Jan 12, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yu Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming split-gate cell for non-volative memory devices
- Patent number 9,111,866
- Issue date Aug 18, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yu Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric posts in metal layers
- Patent number 8,957,523
- Issue date Feb 17, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Fan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back-side MOM/MIM devices
- Patent number 8,759,947
- Issue date Jun 24, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Juan Boon Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device with integrated power supply
- Patent number 8,716,856
- Issue date May 6, 2014
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Juan Boon Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of protecting elevated polysilicon structures during etchin...
- Patent number 8,569,173
- Issue date Oct 29, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a high performance and low cost CMOS device
- Patent number 6,762,085
- Issue date Jul 13, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a shallow trench isolation structure featuring a...
- Patent number 6,734,082
- Issue date May 11, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming shallow trench isolation regions with improved co...
- Patent number 6,586,314
- Issue date Jul 1, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Soh Yun Siah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon nitride capped shallow trench isolation method for fabricat...
- Patent number 6,350,661
- Issue date Feb 26, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon nitride capped shallow trench isolation method for fabricat...
- Patent number 6,297,126
- Issue date Oct 2, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optimized Co/Ti-salicide scheme for shallow junction deep sub-micro...
- Patent number 6,271,133
- Issue date Aug 7, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Partially recessed shallow trench isolation method for fabricating...
- Patent number 6,265,302
- Issue date Jul 24, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form shallow trench isolations with rounded corners and r...
- Patent number 6,228,727
- Issue date May 8, 2001
- Chartered Semiconductor Manufacturing, Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making low-leakage architecture for sub-0.18 .mu.m salici...
- Patent number 6,165,871
- Issue date Dec 26, 2000
- Chartered Semiconductor Manufacturing Ltd.
- Eng Hua Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Salicide formation on narrow poly lines by pulling back of spacer
- Patent number 6,153,485
- Issue date Nov 28, 2000
- Chartered Semiconductor Manufacturing Ltd.
- Kin-Leong Pey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra-low sheet resistance metal/poly-si gate for deep sub-micron C...
- Patent number 6,093,628
- Issue date Jul 25, 2000
- Chartered Semiconductor Manufacturing, Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon nitride--TEOS oxide, salicide blocking layer for deep sub-m...
- Patent number 6,025,267
- Issue date Feb 15, 2000
- Chartered Semiconductor Manufacturing, Ltd.
- Kin-Leong Pey
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MAGNETIC-TUNNEL-JUNCTION DEVICES FOR A MAGNETIC-FIELD SENSOR
- Publication number 20240389467
- Publication date Nov 21, 2024
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Eng-Huat Toh
Information Patent Application
NEUROMORPHIC MEMORIES WITH SPLIT GATE FLASH MULTI-LEVEL CELL AND ME...
- Publication number 20200019500
- Publication date Jan 16, 2020
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Danny Pak-Chum SHUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED TWO-TERMINAL DEVICE WITH LOGIC DEVICE FOR EMBEDDED APPLI...
- Publication number 20190326352
- Publication date Oct 24, 2019
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Wanbing YI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHIELDED MRAM CELL
- Publication number 20190221732
- Publication date Jul 18, 2019
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Dimitri Houssameddine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COST-EFFECTIVE METHOD TO FORM A RELIABLE MEMORY DEVICE WITH SELECTI...
- Publication number 20190148395
- Publication date May 16, 2019
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Soh Yun SIAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COST-EFFECTIVE METHOD TO FORM A RELIABLE MEMORY DEVICE WITH SELECTI...
- Publication number 20180301464
- Publication date Oct 18, 2018
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Soh Yun SIAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED TWO-TERMINAL DEVICE WITH LOGIC DEVICE FOR EMBEDDED APPLI...
- Publication number 20180182810
- Publication date Jun 28, 2018
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Wanbing YI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing integrated circuit memory cells with less dedi...
- Publication number 20180090505
- Publication date Mar 29, 2018
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Laiqiang Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS INCLUDING A DUMMY METAL FEATURE AND METHODS OF...
- Publication number 20180076128
- Publication date Mar 15, 2018
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Haifeng Sheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLASMA DISCHARGE PATH
- Publication number 20170092584
- Publication date Mar 30, 2017
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Haifeng SHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SPLIT-GATE CELL FOR NON-VOLATIVE MEMORY DEVICES
- Publication number 20150270274
- Publication date Sep 24, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yu Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PAD SOLUTIONS FOR RELIABLE BONDS
- Publication number 20150061156
- Publication date Mar 5, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yi JIANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE WITH INTEGRATED PASSIVE COMPONENT
- Publication number 20140264733
- Publication date Sep 18, 2014
- GLOBALFOUNDERS Singapore Pte. Ltd.
- Shaoning YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING SPLIT-GATE CELL FOR NON-VOLATIVE MEMORY DEVICES
- Publication number 20140252445
- Publication date Sep 11, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yu Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC POSTS IN METAL LAYERS
- Publication number 20140191407
- Publication date Jul 10, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Fan ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE WITH INTEGRATED POWER SUPPLY
- Publication number 20140035155
- Publication date Feb 6, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Juan Boon TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING HEAT SINK WITH THROUGH SILICON VIAS
- Publication number 20130277810
- Publication date Oct 24, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Juan Boon Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK-SIDE MOM/MIM DEVICES
- Publication number 20130256834
- Publication date Oct 3, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Juan Boon TAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Protecting Elevated Polysilicon Structures During Etchin...
- Publication number 20130149851
- Publication date Jun 13, 2013
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Liang Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a high performance and low cost CMOS device
- Publication number 20040063264
- Publication date Apr 1, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming gate insulating layer having multiple dielectric...
- Publication number 20040029321
- Publication date Feb 12, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Chew Hoe Ang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a shallow trench isolation structure featuring a...
- Publication number 20040029353
- Publication date Feb 12, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Silicon nitride capped shallow trench isolation method for fabricat...
- Publication number 20010031540
- Publication date Oct 18, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS

Soh Yun SIAH

Person

Patents Grantslast 30 patents

Memory device with dielectric blocking layer for improving interpol...

Neuromorphic memories with split gate flash multi-level cell and me...

Integrated two-terminal device with logic device for embedded appli...

Integrated two-terminal device with logic device for embedded appli...

Shielded MRAM cell

Cost-effective method to form a reliable memory device with selecti...

Integrated circuits including a dummy metal feature and methods of...

Method for producing integrated circuit memory cells with less dedi...

Top electrode dome formation

Plasma discharge path

Method of forming split-gate cell for non-volative memory devices

Method of forming split-gate cell for non-volative memory devices

Dielectric posts in metal layers

Back-side MOM/MIM devices

Device with integrated power supply

Methods of protecting elevated polysilicon structures during etchin...

Method of forming a high performance and low cost CMOS device

Method of forming a shallow trench isolation structure featuring a...

Method of forming shallow trench isolation regions with improved co...

Silicon nitride capped shallow trench isolation method for fabricat...

Silicon nitride capped shallow trench isolation method for fabricat...

Optimized Co/Ti-salicide scheme for shallow junction deep sub-micro...

Partially recessed shallow trench isolation method for fabricating...

Method to form shallow trench isolations with rounded corners and r...

Method of making low-leakage architecture for sub-0.18 .mu.m salici...

Salicide formation on narrow poly lines by pulling back of spacer

Ultra-low sheet resistance metal/poly-si gate for deep sub-micron C...

Silicon nitride--TEOS oxide, salicide blocking layer for deep sub-m...

Patents Applicationslast 30 patents

MAGNETIC-TUNNEL-JUNCTION DEVICES FOR A MAGNETIC-FIELD SENSOR

NEUROMORPHIC MEMORIES WITH SPLIT GATE FLASH MULTI-LEVEL CELL AND ME...

INTEGRATED TWO-TERMINAL DEVICE WITH LOGIC DEVICE FOR EMBEDDED APPLI...

SHIELDED MRAM CELL

COST-EFFECTIVE METHOD TO FORM A RELIABLE MEMORY DEVICE WITH SELECTI...

COST-EFFECTIVE METHOD TO FORM A RELIABLE MEMORY DEVICE WITH SELECTI...

INTEGRATED TWO-TERMINAL DEVICE WITH LOGIC DEVICE FOR EMBEDDED APPLI...

Method for producing integrated circuit memory cells with less dedi...

INTEGRATED CIRCUITS INCLUDING A DUMMY METAL FEATURE AND METHODS OF...

PLASMA DISCHARGE PATH

METHOD OF FORMING SPLIT-GATE CELL FOR NON-VOLATIVE MEMORY DEVICES

PAD SOLUTIONS FOR RELIABLE BONDS

DEVICE WITH INTEGRATED PASSIVE COMPONENT

METHOD OF FORMING SPLIT-GATE CELL FOR NON-VOLATIVE MEMORY DEVICES

DIELECTRIC POSTS IN METAL LAYERS

DEVICE WITH INTEGRATED POWER SUPPLY

METHOD FOR FORMING HEAT SINK WITH THROUGH SILICON VIAS

BACK-SIDE MOM/MIM DEVICES

Methods of Protecting Elevated Polysilicon Structures During Etchin...

Method of forming a high performance and low cost CMOS device

Method for forming gate insulating layer having multiple dielectric...

Method of forming a shallow trench isolation structure featuring a...

Silicon nitride capped shallow trench isolation method for fabricat...