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Vivek Jain
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Milpitas, CA, US
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last 30 patents
Information
Patent Grant
Device reliability of MOS devices using silicon rich plasma oxide f...
Patent number
5,763,937
Issue date
Jun 9, 1998
VLSI Technology, Inc.
Vivek Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for forming reliable MOS devices using silicon rich plasma o...
Patent number
5,602,056
Issue date
Feb 11, 1997
VLSI Technology, Inc.
Vivek Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for leak detection in etching chambers
Patent number
5,522,957
Issue date
Jun 4, 1996
VLSI Technology, Inc.
Milind Weling
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method improving integrated circuit planarization during etchback
Patent number
5,496,774
Issue date
Mar 5, 1996
VLSI Technology, Inc.
Dipankar Pramanik
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of making structure for suppression of field inversion cause...
Patent number
5,492,865
Issue date
Feb 20, 1996
VLSI Technology, Inc.
Subhash R. Nariani
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method and structure for suppressing stress-induced defects in inte...
Patent number
5,436,410
Issue date
Jul 25, 1995
VLSI Technology, Inc.
Vivek Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method enhancing planarization etchback margin, reliability, and st...
Patent number
5,403,780
Issue date
Apr 4, 1995
Vivek Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method improving integrated circuit planarization during etchback
Patent number
5,399,533
Issue date
Mar 21, 1995
VLSI Technology, Inc.
Dipankar Pramanik
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Planarization
Patent number
5,378,318
Issue date
Jan 3, 1995
VLSI Technology, Inc.
Milind Weling
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Structure for suppression of field inversion caused by charge build...
Patent number
5,374,833
Issue date
Dec 20, 1994
VLSI Technology, Inc.
Subhash R. Nariani
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method and structure for suppressing stress-induced defects in inte...
Patent number
5,332,868
Issue date
Jul 26, 1994
VLSI Technology, Inc.
Vivek Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for making cusp-free anti-fuse structures
Patent number
5,328,865
Issue date
Jul 12, 1994
VLSI Technology, Inc.
William J. Boardman
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for making anti-fuse structures
Patent number
5,290,734
Issue date
Mar 1, 1994
VLSI Technology, Inc.
William J. Boardman
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for suppressing charge loss in EEPROMs/EPROMS and instabilit...
Patent number
5,290,727
Issue date
Mar 1, 1994
VLSI Technology, Inc.
Vivek Jain
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Anti-fuse structures and methods for making same
Patent number
5,120,679
Issue date
Jun 9, 1992
VLSI Technology, Inc.
William J. Boardman
H01 - BASIC ELECTRIC ELEMENTS