Wael Zohni

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Wire bond wires for interference shielding
- Patent number 11,810,867
- Issue date Nov 7, 2023
- Invensas LLC
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire bond wires for interference shielding
- Patent number 11,462,483
- Issue date Oct 4, 2022
- Invensas LLC
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pressing of wire bond wire tips to provide bent-over tips
- Patent number 10,806,036
- Issue date Oct 13, 2020
- Invensas Corporation
- Reynaldo Co
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package including microelectronic elements having s...
- Patent number 10,692,842
- Issue date Jun 23, 2020
- Invensas Corporation
- Richard Dewitt Crisp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microelectronic package having stub minimization using symmetricall...
- Patent number 10,643,977
- Issue date May 5, 2020
- Invensas Corporation
- Richard Dewitt Crisp
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked chip-on-board module with edge connector
- Patent number 10,622,289
- Issue date Apr 14, 2020
- Tessera, Inc.
- Wael Zohni
- G11 - INFORMATION STORAGE
Information Patent Grant
Wire bond wires for interference shielding
- Patent number 10,559,537
- Issue date Feb 11, 2020
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded wire bond wires
- Patent number 10,490,528
- Issue date Nov 26, 2019
- Invensas Corporation
- Ashok S. Prabhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dies-on-package devices and methods therefor
- Patent number 10,354,976
- Issue date Jul 16, 2019
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assembly with redistribution structure formed on ca...
- Patent number 10,211,160
- Issue date Feb 19, 2019
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire bond wires for interference shielding
- Patent number 10,115,678
- Issue date Oct 30, 2018
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic package including microelectronic elements having s...
- Patent number 10,090,280
- Issue date Oct 2, 2018
- Invensas Corporation
- Richard Dewitt Crisp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microelectronic package having stub minimization using symmetricall...
- Patent number 10,032,752
- Issue date Jul 24, 2018
- Invensas Corporation
- Richard Dewitt Crisp
- G11 - INFORMATION STORAGE
Information Patent Grant
Microelectronic element with bond elements to encapsulation surface
- Patent number 10,008,477
- Issue date Jun 26, 2018
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package devices with same level WLP components and metho...
- Patent number 9,991,233
- Issue date Jun 5, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package on-package devices with upper RDL of WLPS and methods therefor
- Patent number 9,991,235
- Issue date Jun 5, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package on-package devices with multiple levels and methods therefor
- Patent number 9,985,007
- Issue date May 29, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level packaged components and methods therefor
- Patent number 9,972,573
- Issue date May 15, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-on-package devices with WLP components with dual RDLs for s...
- Patent number 9,972,609
- Issue date May 15, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire bond support structure and microelectronic package including w...
- Patent number 9,947,641
- Issue date Apr 17, 2018
- Invensas Corporation
- Reynaldo Co
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
TFD I/O partition for high-speed, high-density applications
- Patent number 9,928,883
- Issue date Mar 27, 2018
- Invensas Corporation
- Zhuowen Sun
- G11 - INFORMATION STORAGE
Information Patent Grant
Sintered conductive matrix material on wire bond
- Patent number 9,905,502
- Issue date Feb 27, 2018
- Tessera, Inc.
- Wael Zohni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Off substrate kinking of bond wire
- Patent number 9,893,033
- Issue date Feb 13, 2018
- Invensas Corporation
- Belgacem Haba
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Pressing of wire bond wire tips to provide bent-over tips
- Patent number 9,888,579
- Issue date Feb 6, 2018
- Invensas Corporation
- Reynaldo Co
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Grant
Wire bond wires for interference shielding
- Patent number 9,812,402
- Issue date Nov 7, 2017
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip-chip, face-up and face-down centerbond memory wirebond assemblies
- Patent number 9,806,017
- Issue date Oct 31, 2017
- Tessera, Inc.
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ball bonding metal wire bond wires to metal pads
- Patent number 9,761,554
- Issue date Sep 12, 2017
- Invensas Corporation
- Willmar Subido
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bond via array for thermal conductivity
- Patent number 9,735,084
- Issue date Aug 15, 2017
- Invensas Corporation
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked chip-on-board module with edge connector
- Patent number 9,735,093
- Issue date Aug 15, 2017
- Tessera, Inc.
- Wael Zohni
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurable PoP
- Patent number 9,728,495
- Issue date Aug 8, 2017
- Invensas Corporation
- Belgacem Haba
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
- Publication number 20240047376
- Publication date Feb 8, 2024
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
- Publication number 20230059375
- Publication date Feb 23, 2023
- Invensas LLC
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
- Publication number 20200118939
- Publication date Apr 16, 2020
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Microelectronic Package Including Microelectronic Elements Having S...
- Publication number 20190035769
- Publication date Jan 31, 2019
- Invensas Corporation
- Richard Dewitt Crisp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
- Publication number 20190027444
- Publication date Jan 24, 2019
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Microelectronic Package Having Stub Minimization Using Symmetricall...
- Publication number 20180331074
- Publication date Nov 15, 2018
- Invensas Corporation
- Richard Dewitt Crisp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pressing of Wire Bond Wire Tips to Provide Bent-Over Tips
- Publication number 20180146557
- Publication date May 24, 2018
- Invensas Corporation
- Reynaldo CO
- B29 - WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL
Information Patent Application
Wire Bond Wires for Interference Shielding
- Publication number 20180061774
- Publication date Mar 1, 2018
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Vertical Memory Module Enabled by Fan-Out Redistribution Layer
- Publication number 20180040587
- Publication date Feb 8, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP-CHIP, FACE-UP AND FACE-DOWN CENTERBOND MEMORY WIREBOND ASSEMBLIES
- Publication number 20180025967
- Publication date Jan 25, 2018
- Tessera, Inc.
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-on-Package Devices with Multiple Levels and Methods Therefor
- Publication number 20180026018
- Publication date Jan 25, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-Level Packaged Components and Methods Therefor
- Publication number 20180025987
- Publication date Jan 25, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-on-Package Devices with Same Level WLP Components and Metho...
- Publication number 20180026011
- Publication date Jan 25, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-on-Package Devices with Upper RDL of WLPS and Methods Therefor
- Publication number 20180026016
- Publication date Jan 25, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dies-on-Package Devices and Methods Therefor
- Publication number 20180026017
- Publication date Jan 25, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package-on-Package Devices with WLP Components with Dual RDLS for S...
- Publication number 20180026019
- Publication date Jan 25, 2018
- Invensas Corporation
- Min Tao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TFD I/O Partition for High-Speed, High-Density Applications
- Publication number 20170323667
- Publication date Nov 9, 2017
- Invensas Corporation
- Zhuowen Sun
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED CHIP-ON-BOARD MODULE WITH EDGE CONNECTOR
- Publication number 20170263540
- Publication date Sep 14, 2017
- Tessera, Inc.
- Wael Zohni
- G11 - INFORMATION STORAGE
Information Patent Application
STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS
- Publication number 20170256519
- Publication date Sep 7, 2017
- Invensas Corporation
- Richard Dewitt Crisp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIRE BOND WIRES FOR INTERFERENCE SHIELDING
- Publication number 20170117231
- Publication date Apr 27, 2017
- Invensas Corporation
- Abiola Awujoola
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Embedded wire bond wires
- Publication number 20170103968
- Publication date Apr 13, 2017
- Invensas Corporation
- Ashok S. PRABHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STUB MINIMIZATION USING DUPLICATE SETS OF SIGNAL TERMINALS IN ASSEM...
- Publication number 20170084584
- Publication date Mar 23, 2017
- Invensas Corporation
- Richard Dewitt Crisp
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLY WITH REDISTRIBUTION STRUCTURE FORMED ON CA...
- Publication number 20170069575
- Publication date Mar 9, 2017
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip chip assembly and process with sintering material on metal bumps
- Publication number 20170062318
- Publication date Mar 2, 2017
- Tessera, Inc.
- Wael ZOHNI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND AS...
- Publication number 20170062389
- Publication date Mar 2, 2017
- Invensas Corporation
- Richard Dewitt Crisp
- G11 - INFORMATION STORAGE
Information Patent Application
MICROELECTRONIC ELEMENT WITH BOND ELEMENTS TO ENCAPSULATION SURFACE
- Publication number 20170025390
- Publication date Jan 26, 2017
- Invensas Corporation
- Belgacem Haba
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BALL BONDING METAL WIRE BOND WIRES TO METAL PADS
- Publication number 20160329294
- Publication date Nov 10, 2016
- Invensas Corporation
- Willmar SUBIDO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE BOND SUPPORT STRUCTURE AND MICROELECTRONIC PACKAGE INCLUDING W...
- Publication number 20160329308
- Publication date Nov 10, 2016
- Invensas Corporation
- Reynaldo Co
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COUPLING OF SIDE SURFACE CONTACTS TO A CIRCUIT PLATFORM
- Publication number 20160322325
- Publication date Nov 3, 2016
- Invensas Corporation
- Reynaldo CO
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS
- Publication number 20160276316
- Publication date Sep 22, 2016
- Invensas Corporation
- Richard Dewitt Crisp
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Wire bond wires for interference shielding

Wire bond wires for interference shielding

Pressing of wire bond wire tips to provide bent-over tips

Microelectronic package including microelectronic elements having s...

Microelectronic package having stub minimization using symmetricall...

Stacked chip-on-board module with edge connector

Wire bond wires for interference shielding

Embedded wire bond wires

Dies-on-package devices and methods therefor

Microelectronic assembly with redistribution structure formed on ca...

Wire bond wires for interference shielding

Microelectronic package including microelectronic elements having s...

Microelectronic package having stub minimization using symmetricall...

Microelectronic element with bond elements to encapsulation surface

Package-on-package devices with same level WLP components and metho...

Package on-package devices with upper RDL of WLPS and methods therefor

Package on-package devices with multiple levels and methods therefor

Wafer-level packaged components and methods therefor

Package-on-package devices with WLP components with dual RDLs for s...

Wire bond support structure and microelectronic package including w...

TFD I/O partition for high-speed, high-density applications

Sintered conductive matrix material on wire bond

Off substrate kinking of bond wire

Pressing of wire bond wire tips to provide bent-over tips

Wire bond wires for interference shielding

Flip-chip, face-up and face-down centerbond memory wirebond assemblies

Ball bonding metal wire bond wires to metal pads

Bond via array for thermal conductivity

Stacked chip-on-board module with edge connector

Reconfigurable PoP

Patents Applicationslast 30 patents

WIRE BOND WIRES FOR INTERFERENCE SHIELDING

WIRE BOND WIRES FOR INTERFERENCE SHIELDING

WIRE BOND WIRES FOR INTERFERENCE SHIELDING

Microelectronic Package Including Microelectronic Elements Having S...

WIRE BOND WIRES FOR INTERFERENCE SHIELDING

Microelectronic Package Having Stub Minimization Using Symmetricall...

Pressing of Wire Bond Wire Tips to Provide Bent-Over Tips

Wire Bond Wires for Interference Shielding

Vertical Memory Module Enabled by Fan-Out Redistribution Layer

FLIP-CHIP, FACE-UP AND FACE-DOWN CENTERBOND MEMORY WIREBOND ASSEMBLIES

Package-on-Package Devices with Multiple Levels and Methods Therefor

Wafer-Level Packaged Components and Methods Therefor

Package-on-Package Devices with Same Level WLP Components and Metho...

Package-on-Package Devices with Upper RDL of WLPS and Methods Therefor

Dies-on-Package Devices and Methods Therefor

Package-on-Package Devices with WLP Components with Dual RDLS for S...

TFD I/O Partition for High-Speed, High-Density Applications

STACKED CHIP-ON-BOARD MODULE WITH EDGE CONNECTOR

STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS

WIRE BOND WIRES FOR INTERFERENCE SHIELDING

Embedded wire bond wires

STUB MINIMIZATION USING DUPLICATE SETS OF SIGNAL TERMINALS IN ASSEM...

MICROELECTRONIC ASSEMBLY WITH REDISTRIBUTION STRUCTURE FORMED ON CA...

Flip chip assembly and process with sintering material on metal bumps

STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND AS...

MICROELECTRONIC ELEMENT WITH BOND ELEMENTS TO ENCAPSULATION SURFACE

BALL BONDING METAL WIRE BOND WIRES TO METAL PADS

WIRE BOND SUPPORT STRUCTURE AND MICROELECTRONIC PACKAGE INCLUDING W...

COUPLING OF SIDE SURFACE CONTACTS TO A CIRCUIT PLATFORM

STUB MINIMIZATION FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS