WILLIAM GEORGE EN

Person

SUNNYVALE, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming a semiconductor device
- Patent number 7,456,062
- Issue date Nov 25, 2008
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device
- Patent number 7,402,485
- Issue date Jul 22, 2008
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for controlling the thickness of a selective e...
- Patent number 7,402,207
- Issue date Jul 22, 2008
- Advanced Micro Devices, Inc.
- Paul R. Besser
- G01 - MEASURING TESTING
Information Patent Grant
Cleaving process to fabricate multilayered substrates using low imp...
- Patent number 7,378,330
- Issue date May 27, 2008
- Silicon Genesis Corporation
- Francois J. Henley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow junction semiconductor
- Patent number 7,298,012
- Issue date Nov 20, 2007
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for post offset spacer clean for improved selective epitaxy...
- Patent number 7,241,700
- Issue date Jul 10, 2007
- Advanced Micro Devices, Inc.
- William George En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and structure for controlling floating body effects
- Patent number 7,211,473
- Issue date May 1, 2007
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual purpose test structure for gate-body current measurement in PD...
- Patent number 7,132,683
- Issue date Nov 7, 2006
- Advanced Micro Devices, Inc.
- Srinath Krishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI device with structure for enhancing carrier recombination and m...
- Patent number 7,122,863
- Issue date Oct 17, 2006
- Advanced Micro Devices, Inc.
- Dong-Hyuk Ju
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a test structure for gate-body current and direct...
- Patent number 7,071,044
- Issue date Jul 4, 2006
- Advanced Micro Devices, Inc.
- Srinath Krishnan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cleaving process to fabricate multilayered substrates using low imp...
- Patent number 7,056,808
- Issue date Jun 6, 2006
- Silicon Genesis Corporation
- Francois J. Henley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow junction semiconductor and method for the fabrication thereof
- Patent number 7,033,916
- Issue date Apr 25, 2006
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array of gate dielectric structures to measure gate dielectric thic...
- Patent number 6,964,875
- Issue date Nov 15, 2005
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor solid phase epitaxy damage control method and integra...
- Patent number 6,933,579
- Issue date Aug 23, 2005
- Advanced Micro Devices, Inc.
- William George En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Treatment of dielectric material to enhance etch rate
- Patent number 6,905,971
- Issue date Jun 14, 2005
- Advanced Micro Devices, Inc.
- Cyrus Tabery
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced silicidation of polysilicon gate electrodes
- Patent number 6,867,130
- Issue date Mar 15, 2005
- Advanced Micro Devices, Inc.
- Olov B. Karlsson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array of gate dielectric structures to measure gate dielectric thic...
- Patent number 6,841,832
- Issue date Jan 11, 2005
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with a silicon-on-void structure and method of...
- Patent number 6,830,987
- Issue date Dec 14, 2004
- Advanced Micro Devices, Inc.
- Mario P. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer pattern variation of integrated circuit fabrication
- Patent number 6,812,550
- Issue date Nov 2, 2004
- Advanced Micro Devices, Inc.
- William George En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitride offset spacer to minimize silicon recess by using poly reox...
- Patent number 6,780,776
- Issue date Aug 24, 2004
- Advanced Micro Devices, Inc.
- Wen-Jie Qi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacers with a graded dielectric constant for semiconductor devices...
- Patent number 6,764,966
- Issue date Jul 20, 2004
- Advanced Micro Devices, Inc.
- William George En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implantation into high-K dielectric material after gate etch to fac...
- Patent number 6,764,898
- Issue date Jul 20, 2004
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI device with different silicon thicknesses
- Patent number 6,764,917
- Issue date Jul 20, 2004
- Advanced Micro Devices, Inc.
- Darin A. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active l...
- Patent number 6,765,227
- Issue date Jul 20, 2004
- Advanced Micro Devices, Inc.
- Bin Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing gate oxide surface irregularities
- Patent number 6,723,666
- Issue date Apr 20, 2004
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leaky, thermally conductive insulator material (LTCIM) in semicondu...
- Patent number 6,717,212
- Issue date Apr 6, 2004
- Advanced Micro Devices, Inc.
- Dong-Hyuk Ju
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI MOSFET having amorphized source drain and method of fabrication
- Patent number 6,713,819
- Issue date Mar 30, 2004
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce parasitic capacitance of MOS transistors
- Patent number 6,713,357
- Issue date Mar 30, 2004
- Advanced Micro Devices, Inc.
- Hai Hong Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interfacial barrier layer in semiconductor devices with high-K gate...
- Patent number 6,693,004
- Issue date Feb 17, 2004
- Advanced Micro Devices, Inc.
- Arvind Halliyal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor with self alligned double gate and method o...
- Patent number 6,611,023
- Issue date Aug 26, 2003
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DIE PAIR DEVICE PARTITIONING
- Publication number 20240324247
- Publication date Sep 26, 2024
- ADVANCED MICRO DEVICES, INC.
- Samuel Naffziger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK END OF LINE OPTIMIZED TO FUNCTION IN A 3D STACK CONFIGURATION
- Publication number 20240321706
- Publication date Sep 26, 2024
- ADVANCED MICRO DEVICES, INC.
- William George En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT WITH BACKSIDE PASSIVE VARIABLE RESISTANCE MEMORY...
- Publication number 20130051115
- Publication date Feb 28, 2013
- Advanced Micro Devices, Inc.
- William G. En
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH VERTICALLY INTEGRATED PASSIVE VARIABLE RESI...
- Publication number 20130051117
- Publication date Feb 28, 2013
- Advanced Micro Devices, Inc.
- William G. En
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH FACE-TO-FACE BONDED PASSIVE VARIABLE RESIST...
- Publication number 20130051116
- Publication date Feb 28, 2013
- Advanced Micro Devices, Inc.
- William G. En
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20090032888
- Publication date Feb 5, 2009
- Advanced Micro Devices, Inc.
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cleaving process to fabricate multilayered substrates using low imp...
- Publication number 20080206963
- Publication date Aug 28, 2008
- Silicon Genesis Corporation
- Francois J. Henley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a semiconductor device having an epitaxial layer...
- Publication number 20060281271
- Publication date Dec 14, 2006
- Advanced Micro Devices, Inc.
- David E. Brown
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHALLOW JUNCTION SEMICONDUCTOR
- Publication number 20060180873
- Publication date Aug 17, 2006
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cleaving process to fabricate multilayered substrates using low imp...
- Publication number 20060166472
- Publication date Jul 27, 2006
- Silicon Genesis Corporation
- Francois J. Henley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cleaving process to fabricate multilayered substrates using low imp...
- Publication number 20030124815
- Publication date Jul 3, 2003
- Silicon Genesis Corporation
- Francois J. Henley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING MULTI-LAYERED SUBSTRATES
- Publication number 20030008475
- Publication date Jan 9, 2003
- NATHAN W. CHEUNG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Leaky, thermally conductive insulator material (LTCIM) in semicondu...
- Publication number 20020185685
- Publication date Dec 12, 2002
- Dong-Hyuk Ju
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-thickness silicide device formed by disposable spacers
- Publication number 20020142524
- Publication date Oct 3, 2002
- William G. En
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND SYSTEM FOR PROVIDING ELECTRICAL INSULATION FOR LOCAL INT...
- Publication number 20010014527
- Publication date Aug 16, 2001
- WILLIAM GEORGE EN
- H01 - BASIC ELECTRIC ELEMENTS

WILLIAM GEORGE EN

Person

Patents Grantslast 30 patents

Method of forming a semiconductor device

Method of forming a semiconductor device

Method and apparatus for controlling the thickness of a selective e...

Cleaving process to fabricate multilayered substrates using low imp...

Shallow junction semiconductor

Methods for post offset spacer clean for improved selective epitaxy...

Method and structure for controlling floating body effects

Dual purpose test structure for gate-body current measurement in PD...

SOI device with structure for enhancing carrier recombination and m...

Method of making a test structure for gate-body current and direct...

Cleaving process to fabricate multilayered substrates using low imp...

Shallow junction semiconductor and method for the fabrication thereof

Array of gate dielectric structures to measure gate dielectric thic...

Semiconductor solid phase epitaxy damage control method and integra...

Treatment of dielectric material to enhance etch rate

Enhanced silicidation of polysilicon gate electrodes

Array of gate dielectric structures to measure gate dielectric thic...

Semiconductor device with a silicon-on-void structure and method of...

Wafer pattern variation of integrated circuit fabrication

Nitride offset spacer to minimize silicon recess by using poly reox...

Spacers with a graded dielectric constant for semiconductor devices...

Implantation into high-K dielectric material after gate etch to fac...

SOI device with different silicon thicknesses

Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active l...

Method for reducing gate oxide surface irregularities

Leaky, thermally conductive insulator material (LTCIM) in semicondu...

SOI MOSFET having amorphized source drain and method of fabrication

Method to reduce parasitic capacitance of MOS transistors

Interfacial barrier layer in semiconductor devices with high-K gate...

Field effect transistor with self alligned double gate and method o...

Patents Applicationslast 30 patents

DIE PAIR DEVICE PARTITIONING

BACK END OF LINE OPTIMIZED TO FUNCTION IN A 3D STACK CONFIGURATION

INTEGRATED CIRCUIT WITH BACKSIDE PASSIVE VARIABLE RESISTANCE MEMORY...

INTEGRATED CIRCUIT WITH VERTICALLY INTEGRATED PASSIVE VARIABLE RESI...

INTEGRATED CIRCUIT WITH FACE-TO-FACE BONDED PASSIVE VARIABLE RESIST...

SEMICONDUCTOR DEVICE

Cleaving process to fabricate multilayered substrates using low imp...

Method of forming a semiconductor device having an epitaxial layer...

SHALLOW JUNCTION SEMICONDUCTOR

Cleaving process to fabricate multilayered substrates using low imp...

Cleaving process to fabricate multilayered substrates using low imp...

METHOD FOR FABRICATING MULTI-LAYERED SUBSTRATES

Leaky, thermally conductive insulator material (LTCIM) in semicondu...

Multi-thickness silicide device formed by disposable spacers

METHOD AND SYSTEM FOR PROVIDING ELECTRICAL INSULATION FOR LOCAL INT...