Reflow oxides and glasses

Industry

CPC
Y10S148/133

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S148/00Metal treatment

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Y10S148/133Reflow oxides and glasses

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Patents Grantslast 30 patents

Information Patent Grant
Method of forming a via hole filled with a conducting material, and...
- Patent number 5,985,745
- Issue date Nov 16, 1999
- Sony Corporation
- Atsuo Kurokawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure using local planarization with self-aligned...
- Patent number 5,477,074
- Issue date Dec 19, 1995
- Paradigm Technology, Inc.
- Ting-Pwu Yen
- C03 - GLASS MINERAL OR SLAG WOOL
Information Patent Grant
High temperature interconnect system for an integrated circuit
- Patent number 5,414,301
- Issue date May 9, 1995
- National Semiconductor Corporation
- Michael E. Thomas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for optimizing thermal budgets in fabricating semiconductors
- Patent number 5,409,858
- Issue date Apr 25, 1995
- Micron Semiconductor, Inc.
- Randir P. S. Thakur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a planarized insulation layer
- Patent number 5,384,288
- Issue date Jan 24, 1995
- Texas Instruments Incorporated
- Peter S. Ying
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming contact windows in semiconductor devices
- Patent number 5,356,834
- Issue date Oct 18, 1994
- Kabushiki Kaisha Toshiba
- Shigeki Sugimoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor fabrication technique using local planarization with...
- Patent number 5,340,774
- Issue date Aug 23, 1994
- Paradigm Technology, Inc.
- Ting-Pwu Yen
- C03 - GLASS MINERAL OR SLAG WOOL
Information Patent Grant
Method for manufacturing a semiconductor device using a heat treatm...
- Patent number 5,314,848
- Issue date May 24, 1994
- Matsushita Electric Industrial Co., Ltd.
- Takatoshi Yasui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a planarized insulation layer
- Patent number 5,285,102
- Issue date Feb 8, 1994
- Texas Instruments Incorporated
- Peter S. Ying
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preventing the exposure of borophosphosilicate glass to...
- Patent number 5,284,800
- Issue date Feb 8, 1994
- Integrated Device Technology, Inc.
- Chuen-Der Lien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for contacts in CMOS devices
- Patent number 5,285,103
- Issue date Feb 8, 1994
- SGS-Thomson Microelectronics, Inc.
- Fusen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contact process for complementary field-effect integra...
- Patent number 5,283,203
- Issue date Feb 1, 1994
- Texas Instruments Incorporated
- Manzur Gill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reflowing a semiconductor device
- Patent number 5,268,333
- Issue date Dec 7, 1993
- Samsung Electronics Co., Ltd.
- Sung-Min Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of preventing visual access to a semiconductor device by ap...
- Patent number 5,258,334
- Issue date Nov 2, 1993
- The U.S. Government as represented by the Director, National Security Agency
- Leon Lantz
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for planarizing an integrated circuit structure using low me...
- Patent number 5,244,841
- Issue date Sep 14, 1993
- Applied Materials, Inc.
- Jeffrey Marks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sloped spacer for MOS field effect devices comprising reflowable gl...
- Patent number 5,234,852
- Issue date Aug 10, 1993
- SGS-Thomson Microelectronics, Inc.
- Fu-Tai Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for planarizing an integrated circuit structure using low me...
- Patent number 5,204,288
- Issue date Apr 20, 1993
- Applied Materials, Inc.
- Jeffrey Marks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor device
- Patent number 5,169,801
- Issue date Dec 8, 1992
- NEC Corporation
- Natsuki Sato
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for contacts in CMOS devices
- Patent number 5,164,340
- Issue date Nov 17, 1992
- SGS-Thomson Microelectronics, Inc.
- Fusen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device by doping with arsenic, of...
- Patent number 5,120,677
- Issue date Jun 9, 1992
- Oki Electric Industry Co., Ltd.
- Hidetoshi Wakamatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for planarizing an integrated circuit structure using low me...
- Patent number 5,112,776
- Issue date May 12, 1992
- Applied Materials, Inc.
- Jeffrey Marks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of fabricating multi-level wiring structure, incorporated i...
- Patent number 5,110,763
- Issue date May 5, 1992
- Yamaha Corporation
- Yasuhiko Matsumoto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simultaneous glass deposition and viscoelastic flow process
- Patent number 5,104,482
- Issue date Apr 14, 1992
- Lam Research Corporation
- Joseph R. Monkowski
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Field effect transistor having Schottky contact and a high frequenc...
- Patent number 5,105,242
- Issue date Apr 14, 1992
- Sumitomo Electric Industries, Ltd.
- Mitsuaki Fujihira
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Suppression of water vapor absorption in glass encapsulation
- Patent number 5,094,984
- Issue date Mar 10, 1992
- Hewlett-Packard Company
- Charles C. Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor device with a planar interl...
- Patent number 5,077,238
- Issue date Dec 31, 1991
- Mitsubishi Denki Kabushiki Kaisha
- Atsuhiro Fujii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of bonding together two bodies with silicon oxide and practi...
- Patent number 5,054,683
- Issue date Oct 8, 1991
- U.S. Philips Corporation
- Jan Haisma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of semiconductor devices using phosphosilicate glasses
- Patent number 5,047,369
- Issue date Sep 10, 1991
- AT&T Bell Laboratories
- Debra A. Fleming
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked capacitor doping technique making use of rugged polysilicon
- Patent number 5,037,773
- Issue date Aug 6, 1991
- Micron Technology, Inc.
- Ruojia Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a multi-layer semiconductor device using selecti...
- Patent number 5,037,777
- Issue date Aug 6, 1991
- Motorola Inc.
- Thomas C. Mele
- H01 - BASIC ELECTRIC ELEMENTS

Reflow oxides and glasses

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method of forming a via hole filled with a conducting material, and...

Semiconductor structure using local planarization with self-aligned...

High temperature interconnect system for an integrated circuit

Method for optimizing thermal budgets in fabricating semiconductors

Method of forming a planarized insulation layer

Method of forming contact windows in semiconductor devices

Semiconductor fabrication technique using local planarization with...

Method for manufacturing a semiconductor device using a heat treatm...

Method of forming a planarized insulation layer

Method for preventing the exposure of borophosphosilicate glass to...

Structure and method for contacts in CMOS devices

Self-aligned contact process for complementary field-effect integra...

Method of reflowing a semiconductor device

Process of preventing visual access to a semiconductor device by ap...

Method for planarizing an integrated circuit structure using low me...

Sloped spacer for MOS field effect devices comprising reflowable gl...

Method for planarizing an integrated circuit structure using low me...

Method for fabricating a semiconductor device

Structure and method for contacts in CMOS devices

Method for making a semiconductor device by doping with arsenic, of...

Method for planarizing an integrated circuit structure using low me...

Process of fabricating multi-level wiring structure, incorporated i...

Simultaneous glass deposition and viscoelastic flow process

Field effect transistor having Schottky contact and a high frequenc...

Suppression of water vapor absorption in glass encapsulation

Method of manufacturing a semiconductor device with a planar interl...

Method of bonding together two bodies with silicon oxide and practi...

Fabrication of semiconductor devices using phosphosilicate glasses

Stacked capacitor doping technique making use of rugged polysilicon

Method for forming a multi-layer semiconductor device using selecti...

Patents Applicationslast 30 patents