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H01L2224/03334

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device package including embedded conductive elements
- Patent number 11,282,817
- Issue date Mar 22, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Feng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through-substrate conductor support
- Patent number 11,084,717
- Issue date Aug 10, 2021
- Texas Instruments Incorporated
- Virgil Cotoco Ararao
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method of manufacturing multi-chip package
- Patent number 10,679,972
- Issue date Jun 9, 2020
- Samsung Electronics Co., Ltd.
- Won-Gil Han
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of fabricating 3D package with shor...
- Patent number 10,629,531
- Issue date Apr 21, 2020
- STATS ChipPAC Pte. Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing optoelectronic component with integrated protec...
- Patent number 10,586,788
- Issue date Mar 10, 2020
- OSRAM OLED GmbH
- Jürgen Moosburger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mechanisms of forming connectors for package on package
- Patent number 10,553,561
- Issue date Feb 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Feng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level packaging for enhanced performance
- Patent number 10,490,471
- Issue date Nov 26, 2019
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level packaging for enhanced performance
- Patent number 10,453,765
- Issue date Oct 22, 2019
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level packaging for enhanced performance
- Patent number 10,418,297
- Issue date Sep 17, 2019
- Qorvo US, Inc.
- Julio C. Costa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and manufacturing method thereof
- Patent number 10,319,692
- Issue date Jun 11, 2019
- Taiwan Semiconductor Manufacturing Company Ltd.
- Yung-Ping Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transfer substrate for forming metal wiring and method for forming...
- Patent number 10,256,113
- Issue date Apr 9, 2019
- Tanaka Kikinzoku Kogyo K.K.
- Toshinori Ogashiwa
- B22 - CASTING POWDER METALLURGY
Information Patent Grant
Conductive connections, structures with such connections, and metho...
- Patent number 10,090,231
- Issue date Oct 2, 2018
- Invensas Corporation
- Cyprian Emeka Uzoh
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and method of fabricating 3D package with shor...
- Patent number 9,941,207
- Issue date Apr 10, 2018
- STATS ChipPAC Pte. Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device with periphery contact pads surrounding central c...
- Patent number 9,859,196
- Issue date Jan 2, 2018
- STMicroelectronics (Shenzhen) R&D Co., Ltd.
- Jing-En Luan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced board level reliability for wafer level packages
- Patent number 9,837,368
- Issue date Dec 5, 2017
- Maxim Integrated Products, Inc.
- Peter R. Harper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Environmental hardened packaged integrated circuit
- Patent number 9,711,480
- Issue date Jul 18, 2017
- Global Circuit Innovations Incorporated
- Erick Merle Spory
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flip chip package structure and fabrication process thereof
- Patent number 9,653,355
- Issue date May 16, 2017
- Silergy Semiconductor Technology (Hangzhou) Ltd.
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optoelectronic component with integrated protection diode and metho...
- Patent number 9,653,440
- Issue date May 16, 2017
- Osram Opto Semiconductors GmbH
- Jürgen Moosburger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with oval shaped conductor
- Patent number 9,543,259
- Issue date Jan 10, 2017
- Taiwan Semiconductor Manufacturing Company Ltd.
- Yung-Ping Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device with first and second contact pads and related me...
- Patent number 9,466,557
- Issue date Oct 11, 2016
- STMicroelectronics (Shenzhen) R&D Co. Ltd.
- Jing-En Luan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mechanisms for forming connectors with a molding compound for packa...
- Patent number 9,418,947
- Issue date Aug 16, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Feng Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Submount, encapsulated semiconductor element, and methods of manufa...
- Patent number 9,263,411
- Issue date Feb 16, 2016
- Advanced Photonics, Inc.
- Xueliang Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electronic device packages having bumps and methods of manufacturin...
- Patent number 9,209,146
- Issue date Dec 8, 2015
- SK Hynix Inc.
- Seung Jee Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor device
- Patent number 9,159,680
- Issue date Oct 13, 2015
- Samsung Electronics Co., Ltd.
- Sang-Wook Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging low-K chip
- Patent number 8,987,055
- Issue date Mar 24, 2015
- Jiangyin Changdian Advanced Packaging Co., Ltd
- Li Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transfer substrate for forming metal wiring and method for forming...
- Patent number 8,912,088
- Issue date Dec 16, 2014
- Tanaka Kikinzoku Kogyo K.K.
- Toshinori Ogashiwa
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electronic device packages having bumps and methods of manufacturin...
- Patent number 8,907,487
- Issue date Dec 9, 2014
- SK Hynix Inc.
- Seung Jee Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with through silicon via and me...
- Patent number 8,723,309
- Issue date May 13, 2014
- Stats Chippac Ltd.
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wire-based methodology of widening the pitch of semiconductor chip...
- Patent number 8,674,504
- Issue date Mar 18, 2014
- Texas Systems Incorporated
- Charles Anthony Odegard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming bond wires between semic...
- Patent number 8,525,344
- Issue date Sep 3, 2013
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD OF MANUFA...
- Publication number 20240234348
- Publication date Jul 11, 2024
- Mitsubishi Electric Corporation
- Yasunari HINO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD OF MANUFA...
- Publication number 20240136309
- Publication date Apr 25, 2024
- Mitsubishi Electric Corporation
- Yasunari HINO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ASSEMBLY INCLUDING MULTIPLE SOLDER MASKS
- Publication number 20240038703
- Publication date Feb 1, 2024
- ATI Technologies ULC
- JIANGUO LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-SUBSTRATE CONDUCTOR SUPPORT
- Publication number 20210323816
- Publication date Oct 21, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Virgil Cotoco Ararao
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
METHOD OF MANUFACTURING MULTI-CHIP PACKAGE
- Publication number 20190103381
- Publication date Apr 4, 2019
- Samsung Electronics Co., Ltd.
- Won-Gil HAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Fabricating 3D Package with Shor...
- Publication number 20180190581
- Publication date Jul 5, 2018
- STATS ChipPAC Pte Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...
- Publication number 20180019191
- Publication date Jan 18, 2018
- Invensas Corporation
- Cyprian Emeka UZOH
- B32 - LAYERED PRODUCTS
Information Patent Application
GRAPHENE-BASED METAL DIFFUSION BARRIER
- Publication number 20140339700
- Publication date Nov 20, 2014
- Fan Ren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING CHIP PACKAGE STRUCTURE
- Publication number 20140322869
- Publication date Oct 30, 2014
- CHIPMOS TECHNOLOGIES INC.
- Chien-Hao Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSFER SUBSTRATE FOR FORMING METAL WIRING LINE AND METHOD FOR FOR...
- Publication number 20140262003
- Publication date Sep 18, 2014
- Tanaka Kikinzoku Kogyo K.K.
- Toshinori Ogashiwa
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
LOW-K CHIP PACKAGING STRUCTURE
- Publication number 20140191379
- Publication date Jul 10, 2014
- JIANGYIN CHANGDIAN ADVANCED PACKAGING CO., LTD
- Li Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLIP CHIP PACKAGE STRUCTURE AND FABRICATION PROCESS THEREOF
- Publication number 20140167256
- Publication date Jun 19, 2014
- SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTD
- Xiaochun Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING LOW-K CHIP
- Publication number 20140162404
- Publication date Jun 12, 2014
- JIANGYIN CHANGDIAN ADVANCED PACKAGING CO., LTD
- Li Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20140145343
- Publication date May 29, 2014
- SK HYNIX INC.
- Jong Hoon KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC DEVICE PACKAGES HAVING BUMPS AND METHODS OF MANUFACTURIN...
- Publication number 20130334683
- Publication date Dec 19, 2013
- SK HYNIX INC.
- Seung Jee KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH SILICON VIA AND ME...
- Publication number 20130334697
- Publication date Dec 19, 2013
- HanGil Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wire-Based Methodology of Widening the Pitch of Semiconductor Chip...
- Publication number 20130307141
- Publication date Nov 21, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Charles Anthony Odegard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MECHANISMS OF FORMING CONNECTORS FOR PACKAGE ON PACKAGE
- Publication number 20130221522
- Publication date Aug 29, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Feng CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSFER SUBSTRATE FOR FORMING METAL WIRING AND METHOD FOR FORMING...
- Publication number 20130196504
- Publication date Aug 1, 2013
- Tanaka Kikinzoku Kogyo K.K.
- Toshinori Ogashiwa
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Copper Stud Bump Wafer Level Package
- Publication number 20130087915
- Publication date Apr 11, 2013
- Conexant Systems, Inc.
- Robert W. Warren
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING SEMICONDUCTOR DEVICE
- Publication number 20120309167
- Publication date Dec 6, 2012
- Sang-Wook PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bond Wires Between Semic...
- Publication number 20120217643
- Publication date Aug 30, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Contacting a Semiconductor Substrate
- Publication number 20120080088
- Publication date Apr 5, 2012
- UNIVERSITAET STUTTGART
- Peter Grabitz
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
FAN-OUT WAFER LEVEL PACKAGE WITH POLYMERIC LAYER FOR HIGH RELIABILITY
- Publication number 20110157853
- Publication date Jun 30, 2011
- STMicroelectronics Asia Pacific Pte. Ltd.
- Kim-Yong Goh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP STACKED STRUCTURE AND METHOD OF MANUFACTURING SAME
- Publication number 20110062596
- Publication date Mar 17, 2011
- Shinko Electric Industries Co., Ltd.
- Kei Murayama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME AND SEMIC...
- Publication number 20080012117
- Publication date Jan 17, 2008
- Samsung Electronics Co., Ltd.
- Shin KIM
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Microelectronic packages having an array of resilient leads
- Publication number 20030173107
- Publication date Sep 18, 2003
- Tessera, Inc.
- John W. Smith
- G01 - MEASURING TESTING
Information Patent Application
Microelectronic packages having an array of resilient leads and met...
- Publication number 20020145182
- Publication date Oct 10, 2002
- John W. Smith
- G01 - MEASURING TESTING
Information Patent Application
Chip size package and method of fabricating the same
- Publication number 20010035294
- Publication date Nov 1, 2001
- Sang Wook Park
- H01 - BASIC ELECTRIC ELEMENTS

using a preform

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device package including embedded conductive elements

Through-substrate conductor support

Method of manufacturing multi-chip package

Semiconductor device and method of fabricating 3D package with shor...

Method of producing optoelectronic component with integrated protec...

Mechanisms of forming connectors for package on package

Wafer-level packaging for enhanced performance

Wafer-level packaging for enhanced performance

Wafer-level packaging for enhanced performance

Semiconductor structure and manufacturing method thereof

Transfer substrate for forming metal wiring and method for forming...

Conductive connections, structures with such connections, and metho...

Semiconductor device and method of fabricating 3D package with shor...

Electronic device with periphery contact pads surrounding central c...

Enhanced board level reliability for wafer level packages

Environmental hardened packaged integrated circuit

Flip chip package structure and fabrication process thereof

Optoelectronic component with integrated protection diode and metho...

Semiconductor structure with oval shaped conductor

Electronic device with first and second contact pads and related me...

Mechanisms for forming connectors with a molding compound for packa...

Submount, encapsulated semiconductor element, and methods of manufa...

Electronic device packages having bumps and methods of manufacturin...

Method of fabricating semiconductor device

Method for packaging low-K chip

Transfer substrate for forming metal wiring and method for forming...

Electronic device packages having bumps and methods of manufacturin...

Integrated circuit packaging system with through silicon via and me...

Wire-based methodology of widening the pitch of semiconductor chip...

Semiconductor device and method of forming bond wires between semic...

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD OF MANUFA...

SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD OF MANUFA...

SEMICONDUCTOR ASSEMBLY INCLUDING MULTIPLE SOLDER MASKS

THROUGH-SUBSTRATE CONDUCTOR SUPPORT

METHOD OF MANUFACTURING MULTI-CHIP PACKAGE

Semiconductor Device and Method of Fabricating 3D Package with Shor...

CONDUCTIVE CONNECTIONS, STRUCTURES WITH SUCH CONNECTIONS, AND METHO...

GRAPHENE-BASED METAL DIFFUSION BARRIER

METHOD FOR MANUFACTURING CHIP PACKAGE STRUCTURE

TRANSFER SUBSTRATE FOR FORMING METAL WIRING LINE AND METHOD FOR FOR...

LOW-K CHIP PACKAGING STRUCTURE

FLIP CHIP PACKAGE STRUCTURE AND FABRICATION PROCESS THEREOF

METHOD FOR PACKAGING LOW-K CHIP

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

ELECTRONIC DEVICE PACKAGES HAVING BUMPS AND METHODS OF MANUFACTURIN...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH SILICON VIA AND ME...

Wire-Based Methodology of Widening the Pitch of Semiconductor Chip...

MECHANISMS OF FORMING CONNECTORS FOR PACKAGE ON PACKAGE

TRANSFER SUBSTRATE FOR FORMING METAL WIRING AND METHOD FOR FORMING...

Copper Stud Bump Wafer Level Package

METHOD OF FABRICATING SEMICONDUCTOR DEVICE

Semiconductor Device and Method of Forming Bond Wires Between Semic...

Method of Contacting a Semiconductor Substrate

FAN-OUT WAFER LEVEL PACKAGE WITH POLYMERIC LAYER FOR HIGH RELIABILITY

SEMICONDUCTOR CHIP STACKED STRUCTURE AND METHOD OF MANUFACTURING SAME

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME AND SEMIC...

Microelectronic packages having an array of resilient leads

Microelectronic packages having an array of resilient leads and met...

Chip size package and method of fabricating the same