Patent Application
20070068701
Circuit boards are made of several layers. One or more of the layers may be a surface finish. The surface finish was historically made of a lead-based material. Lead is now banned from many consumer products for environmental and public health reasons, so we must find other materials to use as a surface finish.
Modem surface finish materials include Organic Surface Protectant (OSP), immersion tin, immersion silver, electroless nickel/immersion gold, and gold direct on the copper. Each has benefits and potential weaknesses.
Circuit boards are tested before being incorporated into products. Testing a circuit board involves bringing a test probe into electrical contact with test pads on the circuit board. The density of modem chips, traces, and vias is so high that it is advantageous to use vias as test pads.
Bringing a test probe into electrical contact with a via presents the difficulty of ensuring a good electrical connection between the via and the probe. Vias are typically made of copper. Copper has a yield strength much higher than that of solder. Because copper is a hard surface compared to solder, it cannot absorb much energy from probing, resulting in a smaller effective contact area for the probe. The chances of successful electrical connections between test probes and unsoldered copper test pads are thus much less than the chances of successful electrical connections between test probes and soldered test pads. While test probes cannot effectively probe a copper surface directly, they can probe solder that is appropriately positioned atop a copper surface. Thus, if left unsoldered, a circuit board, e.g. a board with an OSP surface finish, will have difficulty establishing electrical connections during testing. To apply solder to a test pad, solder paste is applied on the test pad, and the circuit board is heated in an oven re-flow process. The solder paste melts, and then solidifies to form a layer of solder on the test pad.
Unfortunately, modem surface finishes, especially OSPs, make it difficult to use vias as test pads. The solder from the solder paste applied on the test pads will flow into the vias during the reflow process. When the solder from the test pads flows into the vias, the test pads will expose the copper, or only a small amount of solder. As a result, the exposed copper and/or solder pad height is too low, making it difficult for test probes to make electrical contact with via test pads. This difficulty translates into non-use of vias as test pads in lead free circuit boards, because the number of false negatives in circuit board testing would be too high.
In light of the foregoing, there is a need in the industry for improved techniques to allow the use of circuit board vias as test pads.
In consideration of the above-identified difficulties in the art, the present invention provides a substantially lead free circuit board with vias that are suitable for use as test pads, and methods of manufacturing such circuit boards. A first end of a via may be blocked, for example by applying soldermask over the via during soldermask application. As a result, air is trapped in the via when the circuit board is heated, which prevents melted solder paste from flowing in. Instead, the solder paste forms a dome shaped test pad over the via, which facilitates contact with the test probe. When this technique is used on an OSP circuit board, the result is an OSP board with at least one via, where the via has a blocking material at one end and a solder dome over the opposite end. Other features and advantages of the invention are described below.
Lead free circuit boards with vias that are suitable for use as test pads, and methods of manufacturing such circuit boards in accordance with the present invention are further described with reference to the accompanying drawings in which:
Certain specific details are set forth in the following description and figures to provide a thorough understanding of various embodiments of the invention. Certain well-known details often associated with circuit board manufacture technology are not set forth in the following disclosure, however, to avoid unnecessarily obscuring the various embodiments of the invention. Further, those of ordinary skill in the relevant art will understand that they can practice other embodiments of the invention without one or more of the details described below. Finally, while various methods are described with reference to steps and sequences in the following disclosure, the description as such is for providing a clear implementation of embodiments of the invention, and the steps and sequences of steps should not be taken as required to practice this invention.
Next, when applying solder paste to those portions of the circuit board that will be used as test pads, solder paste may be applied to the opposite end of the via 102. Such application generally results in a configuration such as that illustrated in
Finally, with reference to
The steps of
In one embodiment, the invention is practiced in conjunction with OSP circuit board manufacture, in which an OSP is used as surface finish 204. There are a variety of compounds known in the art that qualify as OSP. Any such compound now in use or later developed is considered an OSP for the purposes of this disclosure.
OSP is a surface finish that has the advantage of being lead free or substantially lead free. The term substantially lead free as used herein means sufficiently lead free to qualify, under the laws and regulations of the United States, for distribution in consumer electronics products. Materials that are substantially lead free in circuit board 200 may be, for example, the surface finish 204, the solder paste 205, and the blocking material 201.
Soldermask 301 is generally applied to circuit board 300 to prevent solder from sticking to those areas covered with soldermask 301. In accordance with the techniques presented herein, soldermask 301 may also be applied to vias 302-307 for the purpose of facilitating use of the vias 302-307 to test the circuit board 300. By covering vias 302-307 with soldermask 301, air is prevented from escaping out the covered end of the vias. As a result, solder paste applied to the opposite end of vias 202-307 will not run as far into vias 302-307 as it otherwise would when melted. Instead, the solder paste will form a good test pad.
Soldermask 301 need not be applied to all vias on a circuit board 300. For this reason, vias 310-313 are illustrated as not covered with soldermask 301. A decision not to cover vias 310-313 with soldermask 301 may be made, for example, because vias 310-313 will not be used to test the circuit board 300.
As illustrated, soldermask 301 may be applied to many portions of circuit board 300 that may not coincide with a via. Soldermask may be applied to vias 302-307 at the same time that soldermask is applied to other, non-via areas of the circuit board 300. This provides the benefit of streamlining soldermask application as it may be applied both for its general purpose and for the purpose of via blockage at the same time. There are a variety of compounds that may be used as soldermask, any of which are appropriate for use as a blocking material.
Decisions concerning what areas to cover with solder mask are made at the circuit board design stage, using software that presents an image of a circuit board to a designer. A User Interface (UI) may be presented to the designer, allowing him to set various properties of a circuit board. One such property is which areas to cover with soldermask 301. Thus the designer may indicate in a circuit board design application that a via is to be covered with soldermask 301. For example, a representation such as
Vias 402 and 432 are standard size vias. The dimensions of standard size vias are known in the art, and should the size change, the invention may be used with any other size via as well. Today, standard size vias are generally between 8 and 20 mil. Micro-vias are substantially smaller than standard size vias. The term “standard size via” as used herein specifically excludes micro-vias.
Solder dome 403 and 433 is the solder test pad that is created by melting solder paste that is initially applied to the opposite end of the via 402 and 432. The term “dome” as used herein refers to a convex curvature that extends away from the circuit board 400 as illustrated in
In addition to the specific implementations explicitly set forth herein, other aspects and implementations will be apparent to those skilled in the art from consideration of the specification disclosed herein. It is intended that the specification and illustrated implementations be considered as examples only, with a true scope and spirit of the following claims.
