Claims
- 1. A semiconductor device fabrication method comprising the steps of:
- (a) forming an insulating layer on a semiconductor substrate;
- (b) forming separately from one another, patterns for chips to be products and for alignment chips each having contact holes and at least four alignment marks, by exposing and developing the insulating layer by means of a stepping aligning method wherein a first mask having a mask pattern which corresponds to one of the chips to be products and includes contact holes and at least four alignment marks, is used, each of the patterns for the alignment chips being positioned in the peripheral part of the semiconductor substrate and being partially left out from the semiconductor substrate whereby a chip resulting therefrom is incapable of functioning as a chip to be product;
- (c) covering the alignment marks in the patterns for the alignment chips with alignment-mark covering means;
- (d) depositing a metal film on the insulating layer; and
- (e) aligning a second mask having a mask pattern for wiring, based on the alignment marks in the alignment chips on which no metal film is deposited.
- 2. The semiconductor device fabrication method according to claim 1, wherein at least four alignment chips are formed.
- 3. The semiconductor device fabrication method according to claim 1, wherein
- the mask pattern of the first mask includes four alignment marks, and
- the four alignment marks of the mask pattern of the first mask are provided in corners of the mask pattern, respectively.
- 4. The semiconductor device fabrication method according to claim 1, wherein each of the patterns for the alignment chips has three alignment marks.
- 5. The semiconductor device fabrication method according to claim 1, wherein each of the alignment marks in the patterns for the chips to be products is provided in a region at which a scribe-line is to be provided.
- 6. The semiconductor device fabrication method according to claim 1, further comprising:
- a step of detecting an orientation flat in the semiconductor substrate and moving the semiconductor substrate such that the alignment-mark covering means is set over the alignment marks in the patterns for the alignment chips, said step being conducted before said step of depositing a metal film and after said step of covering the alignment marks in the patterns for the alignment chips.
- 7. The semiconductor device fabrication method according to claim 1, wherein
- said step of depositing a metal film is carried out by a sputtering method.
- 8. The semiconductor device fabrication method according to claim 1, wherein
- said step of depositing a metal film is carried out by a chemical vapor deposition method.
- 9. The semiconductor device fabrication method according to claim 1, wherein
- the metal film is composed of aluminum.
Priority Claims (1)
Number |
Date |
Country |
Kind |
4-242907 |
Sep 1992 |
JPX |
|
Parent Case Info
This is a continuation of application Ser. No. 08/420,873 filed Apr. 13,1995, now abandoned which is a continuation of application Ser. No. 08/114,144, filed Sep. 1, 1993 now U.S. Pat. No. 5,451,261.
US Referenced Citations (8)
Foreign Referenced Citations (5)
Number |
Date |
Country |
144126 |
Aug 1984 |
JPX |
189629 |
Oct 1984 |
JPX |
224224 |
Nov 1985 |
JPX |
64(1)-11966 |
Jan 1989 |
JPX |
64(1)-74739 |
Mar 1989 |
JPX |
Continuations (2)
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Number |
Date |
Country |
Parent |
420873 |
Apr 1995 |
|
Parent |
114144 |
Sep 1993 |
|