CAPACITIVE MEMS PRESSURE TRANSDUCER AND RELATED MANUFACTURING PROCESS

Abstract

A MEMS pressure transducer includes a semiconductor body, a lower dielectric region arranged above the semiconductor body, and a fixed electrode region and a lower anchoring region, which are formed by conductive material, are arranged on the lower dielectric region and are laterally separated from each other. A membrane of conductive material is suspended above the fixed electrode region so as to delimit a cavity upwardly, the fixed electrode region facing the cavity, the membrane being deformable as a function of pressure and forming a variable capacitor together with the fixed electrode region. An upper anchoring region of conductive material laterally delimits the cavity and is interposed, in direct contact, between the membrane and the lower anchoring region.

Description

PRIORITY CLAIM

This application claims the priority benefit of Italian Application for Patent No. 102023000010716 filed on May 26, 2023, the content of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law.

TECHNICAL FIELD

This disclosure relates to a capacitive microelectromechanical (MEMS) pressure transducer and to a related manufacturing process.

BACKGROUND

As is known, numerous MEMS pressure transducers of capacitive type are currently available which provide for forming a capacitor including an electrode formed by a membrane, which delimits a cavity and deforms as a function of pressure; in this manner, pressure variations are transduced into capacitance variations, which may be detected electronically.

For example, U.S. Pat. No. 8,344,466, incorporated by reference in its entirety, describes a manufacturing process for a MEMS transducer, wherein the cavity is formed by forming openings which traverse the membrane and face a dielectric region, the successive closure of these openings being obtained through deposition of a porous silicon layer; successively, part of the dielectric region is removed by etch with a chemical agent flowing through the porous silicon layer, resulting in the formation of the cavity and release of the membrane, which is then completed by depositing a further polysilicon layer.

The device according to U.S. Pat. No. 8,344,466 may be formed starting from a single wafer, however the area of the electrode formed by the membrane depends on the aforementioned chemical etch, therefore it is not very controllable.

There is a needed in the art to provide a capacitive MEMS pressure transducer which overcomes at least in part the drawbacks of the prior art.

SUMMARY

According to this disclosure, a capacitive MEMS pressure transducer and a manufacturing process are provided.

For example, disclosed herein is a MEMS pressure transducer, including: a semiconductor body; a lower dielectric region, arranged above the semiconductor body; a fixed electrode region and a lower anchoring region, which are formed by conductive material, are arranged on the lower dielectric region and are laterally separated from each other; a membrane of conductive material, which is suspended above the fixed electrode region, so as to delimit a cavity upwardly, the fixed electrode region facing the cavity, the membrane being deformable as a function of pressure and forming a variable capacitor together with the fixed electrode region; and an upper anchoring region of conductive material, which laterally delimits the cavity and is interposed, in direct contact, between the membrane and the lower anchoring region.

Also disclosed herein is a process for manufacturing a MEMS pressure transducer, including: forming a lower dielectric region above a semiconductor body; on the lower dielectric region, forming a fixed electrode region and a lower anchoring region of conductive material, laterally separated from each other; forming a membrane of conductive material, which is suspended above the fixed electrode region and delimits a cavity upwardly, the fixed electrode region facing the cavity, the membrane being deformable as a function of pressure and forming a variable capacitor together with the fixed electrode region; and forming an upper anchoring region of conductive material, which laterally delimits the cavity and is interposed, in direct contact, between the membrane and the lower anchoring region.

BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding, embodiments thereof are now described, purely by way of non-limiting example, with reference to the attached drawings, wherein:

FIG. 1 schematically shows a cross-section of a MEMS transducer disclosed herein;

FIG. 2 schematically shows a top-view, with portions removed, of a part of the MEMS transducer shown in FIG. 1;

FIG. 3 schematically shows a cross-section (taken along section line III-III shown in FIG. 4), with portions removed, of a part of the MEMS transducer shown in FIGS. 1 and 2;

FIG. 4 schematically shows a top-view, with portions removed, of a part of the MEMS transducer shown in FIGS. 1 and 2;

FIG. 5 schematically shows a cross-section of a variant of the MEMS transducer disclosed herein;

FIG. 6 schematically shows a top-view, with portions removed, of a part of the MEMS transducer shown in FIG. 5;

FIGS. 7 and 9 schematically show cross-sections of variants of the MEMS transducer;

FIG. 8 schematically shows a top-view, with portions removed, of a part of the MEMS transducer shown in FIG. 7;

FIGS. 10-26 schematically show cross-sections of a MEMS transducer disclosed herein, during successive steps of a manufacturing process.

DETAILED DESCRIPTION

FIG. 1 shows a MEMS pressure transducer 1 of capacitive type, hereinafter referred to as the MEMS transducer 1, and an orthogonal reference system XYZ.

The MEMS transducer 1 comprises a semiconductor body 2, which is upwardly delimited by a front surface S₂, parallel to the plane XY. A buried cavity 3 extends inside the semiconductor body 2, at a distance from the front surface S₂. Furthermore, a lower portion of a trench 11 extends through part of the semiconductor body 2, starting from the front surface S₂, so as to communicate downwardly with the buried cavity 3 and laterally delimit a portion 9′ of the semiconductor body 2, which delimits the buried cavity 3 upwardly, and which is hereinafter referred to as the suspended portion 9′ of the semiconductor body 2. In greater detail, the suspended portion 9′ of the semiconductor body 2 extends cantilevered, above the buried cavity 3, starting from a fixed portion 9″ of the semiconductor body 2.

Purely by way of example, the trench 11 may have a ‘C’ shape, in top-view, as shown in FIG. 2, wherein the trench 11 is shown in a simplified manner with respect to what has been shown in FIG. 1.

The MEMS transducer 1 further comprises a lower dielectric region 4, which extends above the front surface S₂, in direct contact with the semiconductor body 2, and is formed, for example, by thermal oxide. In particular, part of the lower dielectric region 4 covers the fixed portion 9″ of the semiconductor body 2. Furthermore, part of the lower dielectric region 4 extends over the suspended portion 9′ of the semiconductor body 2.

The MEMS transducer 1 further comprises a stopping region 6, which extends on the lower dielectric region 4 and may be formed, for example, by aluminum oxide (Al₂O₃).

In greater detail, part of the stopping region 6 partially covers the part of the lower dielectric region 4 which covers the fixed portion 9″ of the semiconductor body 2. Furthermore, part of the stopping region 6 extends on the part of the lower dielectric region 4 that overlies the suspended portion 9′ of the semiconductor body 2. In addition, and without any loss of generality, the stopping region 6 does not entirely cover the lower dielectric region 4, but leaves exposed a part of the lower dielectric region 4.

The MEMS transducer 1 further comprises a lower conductive structure 8 of polysilicon, which comprises a routing region 10, which, without any loss of generality, extends on a portion of the stopping region 6 that overlies, at a distance, the fixed portion 9″ of the semiconductor body 2.

The lower conductive structure 8 further comprises a lower electrode region 12, a lower anchoring region 14 and a covering region 16, which are therefore formed by polysilicon, extend on the part of the stopping region 6 which overlies, at a distance, the suspended portion 9′ of the semiconductor body 2 and are coplanar with each other and with the routing region 10. Furthermore, the lower electrode region 12, the lower anchoring region 14 and the covering region 16 are laterally separated from each other. Furthermore, the lower conductive structure 8 comprises a pair of connection regions RC (visible in FIG. 2).

The lower conductive structure 8 also comprises a ground contact region 18, which extends on the part of the lower dielectric region 4 left exposed by the stopping region 6 and, without any loss of generality, is laterally offset with respect to the buried cavity 3; furthermore, the ground contact region 18 is separated from the routing region 10, the lower electrode region 12, the lower anchoring region 14, the covering region 16 and the connection regions RC, and extends in part through the lower dielectric region 4, so as to contact, downwardly, the fixed portion 9″ of the semiconductor body 2.

In greater detail, the lower electrode region 12, the lower anchoring region 14, the covering region 16 and the connection regions RC overlie, at a distance, the buried cavity 3. Furthermore, as shown qualitatively in FIG. 2, wherein the lower electrode region 12 has been assumed to have an approximately circular shape in top-view, the covering region 16 has an approximately ‘C’ shape and laterally surrounds the lower electrode region 12; in particular, without any loss of generality, the covering region 16 surrounds the lower electrode region 12 entirely, except for a first opening A′, which is precisely laterally delimited by the covering region 16.

Again without any loss of generality, the lower anchoring region 14 has an elongated shape, approximately a ‘C’ shape (in top-view) and laterally surrounds the covering region 16. In particular, the lower anchoring region 14 surrounds the covering region 16 entirely, except for a second opening A″, which is precisely laterally delimited by the lower anchoring region 14. Furthermore, both the first and the second openings A′, A″ are delimited downwardly by corresponding exposed portions of the stopping region 6.

The lower conductive structure 8 further comprises a contact region 19 (visible in FIG. 2), which is coplanar with the lower electrode region 12, the lower anchoring region 14, the covering region 16 and the connection regions RC. The contact region 19 extends through the first and the second openings A′, A″ and is interposed, in direct contact, between the lower electrode region 12 and the routing region 10 (not shown in FIG. 2). Furthermore, purely by way of example, and without any loss of generality, the connection regions RC extend on opposite sides of a portion of the contact region 19, in a symmetrical manner and parallel to the axis Y, in such a way that each connection region RC has ends integral with the lower anchoring region 14 and the covering region 16, respectively. In this manner, the lower anchoring region 14, the covering region 16 and the connection regions RC form a single region, which laterally surrounds, at a distance, the lower electrode region 12.

The MEMS transducer 1 further comprises an upper dielectric region 20, which is formed for example by TEOS oxide and extends above the routing region 10, the ground contact region 18, as well as above an outer portion of the lower anchoring region 14, described below. As qualitatively visible in FIG. 1, the upper dielectric region 20 also extends on the part of the lower dielectric region 4 left exposed by the stopping region 6 and on the portions of the stopping region 6 which extend into the space separating the outer portion of the lower anchoring region 14 from the routing region 10. In this regard, an upper portion of the trench 11 extends through the part of the upper dielectric region 20 which extends on the part of the lower dielectric region 4 left exposed by the stopping region 6 and laterally offset with respect to the ground contact region 18.

The MEMS transducer 1 further comprises a first, a second and a third upper conductive structure 30, 40, 50, which are formed by polysilicon and have approximately a same shape, in top-view.

In detail, the first upper conductive structure 30 comprises a respective annular region 32, which in top-view has an annular shape and extends above portions of the upper dielectric region 20, in direct contact. In particular, without any loss of generality, the annular region 32 of the first upper conductive structure 30 extends above portions of the upper dielectric region 20 that overlie the routing region 10 and above portions of the upper dielectric region 20 that overlie the ground contact region 18. Although not shown, part of the annular region 32 traverses the upper dielectric region 20, so as to contact the ground contact region 18. Also, although not shown, in top-view the annular region 32 surrounds the trench 11, so as to overlie, at a distance, the fixed portion 9″ of the semiconductor body 2.

The first upper conductive structure 30 further comprises a respective peripheral region 34, which extends on a portion of the upper dielectric region 20 that overlies the routing region 10, outside the annular region 32; furthermore, the peripheral region 34 also extends through the upper dielectric region 20, so as to contact the underlying routing region 10.

The first upper conductive structure 30 further comprises an inner region 36, hereinafter referred to as the first inner region 36.

The first inner region 36 comprises a suspended portion 37′ and an anchoring portion 37″, which form a single monolithic polysilicon region.

In particular, as visible in FIG. 2 (wherein the position of the perimeter of the suspended portion 37′ is shown schematically in dotted lines), the anchoring portion 37″ has an elongated shape, approximately a ‘C’ shape, in top-view; furthermore, the anchoring portion 37″ is arranged above the lower anchoring region 14, wherewith it is in direct contact, and laterally delimits a cavity 39, hereinafter referred to as the sensing cavity 39.

In greater detail, in top-view, the anchoring portion 37″ has a width (in the plane XY, along the perimeter of the respective elongated shape) that is smaller with respect to the width of the lower anchoring region 14 and is arranged with respect to the latter so as to leave exposed an inner portion of the lower anchoring region 14, which faces the sensing cavity 39, and furthermore so as to be laterally offset with respect to the aforementioned outer portion of the lower anchoring region 14, which, as mentioned, is overlaid by the upper dielectric region 20 (not shown in FIG. 2).

In practice, the anchoring portion 37″ is delimited by outer lateral walls P_e (only one indicated in FIG. 2) and by inner lateral walls P_i (only one indicated in FIG. 2); the inner lateral walls P_i face the sensing cavity 39, while the outer lateral walls P_e contact the upper dielectric region 20.

The suspended portion 37′ extends above the anchoring portion 37″, so as to delimit the sensing cavity 39 upwardly, which is delimited downwardly by the inner portion of the lower anchoring region 14, the lower electrode region 12, the covering region 16, the connection regions RC, a part of the contact region 19 and portions of the stopping region 6 arranged below the suspended portion 37′ and left exposed by the lower electrode region 12, the lower anchoring region 14, the covering region 16, the connection regions RC and the contact region 19.

The suspended portion 37′ is traversed by a plurality of holes 38 (two visible in FIG. 1) of through type, which face the sensing cavity 39 downwardly. Furthermore, without any loss of generality, the suspended portion 37′ extends laterally so as to protrude in part outside the anchoring portion 37″, in top-view. The part of suspended portion 37′ which protrudes externally with respect to the underlying anchoring portion 37″ overlies a corresponding portion of the upper dielectric region 20, in direct contact.

Again without any loss of generality, in the example shown in FIG. 1, the suspended portion 37′ is delimited downwardly by a flat surface S₃₇, which, in rest conditions, is parallel to the plane XY; furthermore, the suspended portion 37′ forms protection structures SX (optional), which depart from the flat surface S₃₇ in the direction of the lower conductive structure 8, for reasons which will be clarified below.

In greater detail, as also visible in FIG. 3, the anchoring portion 37″ laterally delimits a third opening A′″, which is upwardly delimited by the suspended portion 37′ and communicates downwardly with the second opening A″, wherewith it forms a lateral opening A* of the sensing cavity 39. The lateral opening A* faces a corresponding portion of the upper dielectric region 20, which laterally closes the lateral opening A*, in such a way that the sensing cavity 39 is hermetically closed, with an internal pressure which may for example be comprised between 1 μbar and 1 bar; furthermore, as visible in the example of FIG. 4, part of the upper dielectric region 20 may partially penetrate into the lateral opening A* of the sensing cavity 39, while not penetrating inside the sensing cavity 39. However, variants are possible (not shown) wherein the upper dielectric region 20 does not penetrate inside the lateral opening A*, while continuing to close it laterally.

The second upper conductive structure 40 comprises a respective annular region 42, which overlies the annular region 32 of the first upper conductive structure 30, in direct contact. In top-view, the annular region 42 may have approximately the same shape as the annular region 32.

The second upper conductive structure 40 further comprises a respective peripheral portion 44, which extends above the peripheral portion 34 of the first upper conductive structure 30. In top-view, the peripheral portion 44 may have approximately the same shape as the peripheral portion 34.

The second upper conductive structure 40 also comprises a second inner region 46, which is layered and extends on the first inner region 36 and inside the holes 38, for example in a conformal manner, therefore without completely filling the holes 38, but coating the related lateral walls and the respective bottoms. The portions of the second inner region 46 which extend on the bottom of the holes 38 therefore face the sensing cavity 39.

The third upper conductive structure 50 comprises a respective annular region 52, which overlies the annular region 42 of the second upper conductive structure 40, in direct contact. In top-view, the annular region 52 may have approximately the same shape as the annular region 42.

The third upper conductive structure 50 further comprises a respective peripheral portion 54, which extends on the peripheral portion 44 of the second upper conductive structure 40. In top-view, the peripheral portion 54 may have approximately the same shape as the peripheral portion 44.

The third upper conductive structure 50 further comprises a third inner region 56, which extends on the second inner region 46 and comprises portions which extend inside the holes 38, to fill them. In other words, in each hole 38 a corresponding portion of the third inner region 56 is present, which is coated laterally and downwardly by a corresponding portion of the second inner region 46.

As mentioned, the first, the second and the third inner regions 36, 46, 56 have approximately a same shape, in top-view. Furthermore, the part of the suspended portion 37′ which overlies the sensing cavity 39 and the overlying portions of the second and the third inner regions 46, 56 form a membrane 55 of polysilicon, which has a thickness for example comprised between 1 μm and 6 μm, functions as the upper electrode of a variable detection capacitor and faces the underlying lower electrode region 12, which functions as a fixed lower electrode of the detection capacitor. Furthermore, since, while being manufactured, as described below, at different times, the first, the second and the third inner regions 36, 46, 56 are formed by polysilicon, as a first approximation no lattice discontinuities occur between the first, the second and the third inner regions 36, 46, 56.

In addition, the first, the second and the third upper conductive structures 30, 40, 50 are patterned in such a way that the membrane 55 is laterally separated, by a trench 59, from the annular regions 32, 42, 52; hereinafter reference is made to the upper trench 59 to indicate the trench 59. Furthermore, the peripheral portions 34, 44, 54 are separated from the annular regions 32, 42, 52 by an opening 61, which faces the upper dielectric region 20.

In practice, the first, the second and the third upper conductive structures 30, 40, 50 form a conductive body 63, which forms, together with the semiconductor body 2, the lower dielectric region 4, the stopping region 6 and the lower conductive structure 8, a main body 65. Furthermore, the conductive body 63 is traversed by the opening 61 and by the upper trench 59; furthermore, a part of the upper trench 59 faces the upper dielectric region 20, while another part of the upper trench 59 faces the underlying upper portion of the trench 11, wherewith it is in fluidic communication.

The MEMS transducer 1 further comprises a plurality of pads 66 of conductive material (for example, aluminum, copper or gold). In FIG. 1 only one pad 66 is visible, which overlies the peripheral portion 54 of the third upper conductive structure 50, in direct contact; thereby, the pad 66 is in electrical contact with the routing region 10, and therefore also with the lower electrode region 12. In use, the pad 66 is therefore set to the same potential as the lower electrode region 12. Although not shown, and purely by way of example, a further pad is electrically connected to the lower anchoring region 14, so as to be set to the same potential as the membrane 55; in use, a voltage equal to the voltage present between the membrane 55 and the lower electrode region 12 is present between this pad and the pad 66.

The MEMS transducer 1 further comprises a conductive coupling region 68, which is formed for example by metal material (for example, copper, aluminum or gold), has an annular shape and extends above the annular region 52 of the third upper conductive structure 50, in direct contact. Furthermore, although not visible in FIG. 1, the conductive coupling region 68 is electrically connected (for example) to the ground contact region 18, so as to be set to the same potential as the semiconductor body 2.

The main body 6 also comprises a passivation region 69, which is formed for example by silicon nitride (SiN) or nitride oxide and extends over the upper conductive structure 50, in direct contact, leaving exposed the pads 66 and the conductive coupling region 68. Furthermore, optionally, the passivation region 69 may leave exposed the third inner region 56, so as to reduce the mechanical stresses to which the membrane 55 is subject.

In addition, in the example shown in FIG. 1, the passivation region 69 coats the lateral walls of the opening 61, as well as the lateral walls of the upper trench 59; in addition, the passivation region 69 coats the portions of the upper dielectric region 20 which form the bottom of the upper trench 59 and the lateral walls of the upper portion of the trench 11.

In greater detail, the passivation region 69 coats upwardly the portions of the upper dielectric region 20 left exposed by the conductive body 63 and also laterally coats the portions of the lower dielectric region 4 and of the upper dielectric region 20 that face the trench 11, so as to form a protective structure which prevents humidity present around the membrane 55 from penetrating inside the portions of the upper dielectric region 20 that surround the anchoring portion 37″ and inside the portions of the lower dielectric region 4 that are arranged below the sensing cavity 39; in this manner it is avoided that, following the absorption of humidity by these portions of the lower dielectric region 4 and of the upper dielectric region 20, mechanical stresses are generated which entail an undesired deformation of the sensing cavity 39, which causes a drift of the response of the MEMS transducer 1.

In other words, referring to the dielectric support structure 100 to indicate the portions of the lower dielectric region 4 and of the upper dielectric region 20 laterally delimited by the upper portion of the trench 11 and arranged above the suspended portion 9′ of the semiconductor body 2, the first, the second and the third inner regions 36, 46, 56 extend above part of the dielectric support structure 100. The dielectric support structure 100 is laterally coated by the passivation region 69, except for the part of the dielectric support structure 100 which is integral with portions of the lower dielectric region 4 and of the upper dielectric region 20 which overlie the fixed portion 9″ of the semiconductor body 2. The sensing cavity 39 extends inside the dielectric support structure 100. Furthermore, the passivation region 69 coats upwardly the portions of the dielectric support structure 100 left exposed by the first, the second and the third inner regions 36, 46, 56.

The MEMS transducer 1 also comprises a cap 70 formed by semiconductor material, which is coupled to the conductive body 63 so as to form an accommodation chamber 75, having the membrane 55 extending therewithin. The sensing cavity 39 does not fluidically communicate with the accommodation chamber 75, i.e. it is fluidically insulated from the latter.

In detail, the cap 70 is mechanically coupled to the conductive coupling region 68 by interposing a bonding region 72, which is formed, for example, by an aluminum and germanium (AlGe) alloy and is in fact interposed, in direct contact, between the conductive coupling region 68 and a corresponding portion of the cap 70. In particular, the cap 70 overlies the membrane 55 and the upper trench 59. Instead, without any loss of generality, the cap 70 is laterally offset with respect to the pads 66, to facilitate the formation of related electrical connections with an external circuitry (not shown).

In greater detail, the accommodation chamber 75 comprises the upper trench 59 and communicates, thanks to the trench 11, with the buried cavity 3. Furthermore, the cap 70 is traversed by a respective hole 77, which places the accommodation chamber 75 in fluidic communication with the outside world.

In use, the accommodation chamber 75 and the buried cavity 3 are set to the same pressure present outside the MEMS transducer 1. Consequently, the membrane 55 is subject to a deformation which depends on the pressure difference present between the sensing cavity 39 and the outside world. The capacitance of the detection capacitor therefore varies as a function of the pressure present outside the MEMS transducer 1; therefore, a pressure capacitive transduction occurs. In particular, the capacitance variations, and therefore the value of the external pressure, may be detected on the basis of the electric voltage present between the membrane 55 and the lower electrode region 12. This detection may be performed by an external electronic circuit (not shown), which is coupled to the pads 66. Furthermore, the protection structures SX are for reducing the contact area between the membrane 55 and the set formed by the lower electrode region 12 and by the covering region 16, so as to avoid bonding phenomena in the case of excessive pressure. To this end, the protection structures SX are at the same potential as the lower anchoring region 14, the covering region 16 and the connection regions RC.

This having been said, the MEMS transducer 1 is characterized in that the shape of the membrane 55 (and therefore of the upper electrode of the detection capacitor) is defined by the anchoring portion 37″, except for the possible uncertainty as to the extent of the penetration of the upper dielectric region 20 into the lateral opening A*. In other words, unlike what occurs in the prior art, wherein the dimensions of the membrane are defined by controlling the parameters of an etching process, in the present case the dimensions of the membrane 55 are more controllable, which results in an improvement in the accuracy of the pressure detection. Furthermore, since the anchoring portion 37″ of the first inner region 36 contacts with the underlying lower anchoring region 14 (therefore, they are at the same potential), only the lower electrode region 12 causes a fixed capacitance contribution, having an effective increase in the sensitivity value of the MEMS transducer 1 not corresponding thereto.

As to the presence of the covering region 16, it allows the area of the stopping region 6 left exposed to be reduced, resulting in the reduction of the probability that defectivenesses occur. Furthermore, the membrane 55 has no dielectric portions, which would entail the presence, inside the membrane 55, of regions having coefficients of thermal expansion that are very different from each other, resulting in the generation of unwanted mechanical stresses.

As to the buried cavity 3, it allows the mechanical stress induced by the package (not shown) of the MEMS transducer 1 on the fixed portion 9″ of the semiconductor body 2 to be decoupled from the membrane 55 and from the suspended portion 9′, in such a way that, as a first approximation, this mechanical stress does not affect the pressure measurement. In any case, the presence of the buried cavity 3 is optional; embodiments (not shown) are therefore possible wherein the buried cavity 3 and the lower portion of the trench 11 are absent.

FIG. 5 shows an embodiment which differs from what has been shown in FIG. 1 for the following reasons.

In detail, the lower conductive structure 8 comprises a lower barrier structure 80, which is formed by polysilicon and extends in part on the part of the lower dielectric region 4 left exposed by the stopping region 6 and in part through the lower dielectric region 4, so as to contact, downwardly, the suspended portion 9″ of the semiconductor body 2. Furthermore, without any loss of generality, the lower barrier structure 80 is separated from the lower anchoring region 14 and from the ground contact region 18.

In greater detail, as visible in FIG. 6 (wherein, for the sake of simplicity, inter alia, the lower dielectric region 4 and the upper dielectric region 20 are not shown), the lower barrier structure 80 has a closed elongated shape (therefore, in top-view forms a ring-shaped region) and extends so as to laterally surround, at a distance, the upper portion of the trench 11. Consequently, in top-view, the upper portion of the trench 11 extends inside the lower barrier structure 80.

The first, the second and the third upper conductive structures 30, 40, 50 comprise respective barrier regions, indicated by 130, 140, 150 respectively, which are formed by polysilicon and form an upper barrier structure 160. As a first approximation, the barrier regions 130, 140, 150 have a same shape in top-view.

In greater detail, the barrier region 130 of the first upper conductive structure 30 extends in part on the upper dielectric region 20 and in part through the upper dielectric region 20, so as to contact the underlying lower barrier structure 80.

The barrier region 140 of the second upper conductive structure 140 overlies the barrier region 130 of the first upper conductive structure 30; the barrier region 150 of the third upper conductive structure 50 overlies the barrier region 140 of the second upper conductive structure 140.

In practice, the upper barrier structure 160 is laterally offset with respect to the first, the second and the third inner regions 36, 46, 56 and overlies, in direct contact, the lower barrier structure 80. Furthermore, as visible in FIG. 6, the upper barrier structure 160 has a closed elongated shape, therefore in top-view it has a ring shape, and laterally delimits a channel CH, which in top-view is arranged inside the upper barrier structure 160 and overlies the underlying upper portion of the trench 11, wherewith it communicates. Furthermore, as still visible in FIG. 6, the first, the second and the third inner regions 36, 46, 56 are arranged outside the upper barrier structure 160, which extends in part above the suspended portion 9′ of the semiconductor body 2 and in part above the fixed portion 9″ of the semiconductor body 2. Furthermore, the passivation region 69 coats the upper barrier structure 160 laterally and upwardly, therefore it laterally coats the walls of the channel CH and the portion of upper dielectric region 20 left exposed by the first, the second and the third inner regions 36, 46, 56 and the barrier structure 160.

The passivation region 69 does not penetrate inside the trench 11, to the advantage of the constructive simplicity of the MEMS transducer 1. In fact, the upper barrier structure 160 and the lower barrier structure 80 form a barrier which is impenetrable by humidity and laterally delimits an accommodation space 161, having the membrane 55 and the sensing cavity 39 extending therewithin.

In particular, the lower barrier structure 80 and the barrier region 130 laterally surround a portion of the dielectric support structure 100 which surrounds the sensing cavity 39 laterally and downwardly. More particularly, the first, the second and the third inner regions 36, 46, 56 extend above part of this portion of the dielectric support structure 100, having the sensing cavity 39 extending therewithin. Even more particularly, this portion of the dielectric support structure 100 is surrounded by the lower barrier structure 80 and the barrier region 130, except for a respective part which is integral with portions of the lower dielectric region 4 and of the upper dielectric region 20 that overlie the fixed portion 9″ of the semiconductor body 2. Furthermore, the parts of this portion of the dielectric support structure 100 left exposed by the first, the second and the third inner regions 36, 46, 56 and by the upper barrier structure 160 are coated upwardly by the passivation region 69. In this manner, the upper barrier structure 160 is laterally spaced from the membrane 55, improving the protection of the latter against humidity.

FIG. 7 shows a further variant, which differs from what has been shown in FIG. 5 for the following reasons.

In detail, the upper barrier structure (here indicated by 260) is again formed by the barrier regions (respectively indicated by 230, 240, 250) of the first, the second and the third upper conductive structures 30, 40, 50 and is laterally spaced from the first, the second and the third inner regions 36, 46, 56; furthermore, the upper barrier structure 260 extends in part on the upper dielectric region 20 and in part through the upper dielectric region 20 and the lower dielectric region 4, so that the barrier region 230 contacts the front surface S₂. The lower barrier structure 80 is absent.

The upper portion of the trench 11 extends through the barrier regions 230, 240, 250 of the first, the second and the third upper conductive structures 30, 40, 50, while the lower portion of the trench 11 still extends through part of the semiconductor body 2.

As shown qualitatively in FIG. 8, the trench 11 still has a ‘C’ shape, in top-view; furthermore, the upper portion of the trench 11 is entirely delimited, laterally, by the upper barrier structure 260, which, without any loss of generality, is laterally coated by the passivation region 69.

Again by way of example, the passivation region 69 leaves exposed a portion of the barrier region 250 of the third upper conductive structure 50 traversed by the trench 11. Referring to the upper conductive surface S₅₅ to indicate the upper surface of the third inner region 56 and of the barrier region 250, the aforementioned exposed portion of the barrier region 250 delimits a recess 251 which extends, starting from the upper conductive surface S₅₅, downwards, where it communicates with the underlying trench 11.

In practice, the MEMS transducer 1 is characterized by a certain constructive simplicity, in particular as to the trench 11, which may be formed by performing a single etch. Furthermore, since the upper barrier structure 260 extends downwardly up to contacting the semiconductor body 2, and also laterally surrounds part of the dielectric support structure 100, it functions as a barrier against humidity, together with the portions of the passivation region 69 which coat the portions of the dielectric support structure 100 left exposed by the first, the second and the third inner regions 36, 46, 56 and the upper barrier structure 260.

FIG. 9 shows a further variant, which differs from what has been shown in FIG. 7 for the following reasons.

The lower barrier structure (here indicated by 380) is present and extends in part on the part of the lower dielectric region 4 left exposed by the stopping region 6 and in part through the lower dielectric region 4, so as to contact, downwardly, the semiconductor body 2. The upper barrier structure (here indicated by 360) is again formed by the barrier regions (respectively indicated by 330, 340, 350) of the first, the second and the third upper conductive structures 30, 40, 50. The barrier region 330 of the first upper conductive structure 30 extends in part on the upper dielectric region 20 and in part through the upper dielectric region 20, so as to contact the underlying lower barrier structure 380.

The barrier region 350 of the third upper conductive structure 50 faces the upper membrane surface S₅₅. Furthermore, the upper portion of the trench 11 extends, starting from the upper membrane surface S₅₅, through the upper barrier structure 360 and through the lower barrier structure 380.

The embodiment shown in FIG. 9 is characterized, with respect to what has been shown in FIG. 7, in that the upper barrier structure 360 may be manufactured in a further simplified manner, since the lithographic mask used to form the trench 11 may be arranged at the same height as the upper membrane surface S₅₅, thanks to the absence of the recess 251.

Steps of a manufacturing process of the MEMS transducer 1 shown in FIG. 1 are described hereinbelow, starting from a first semiconductive wafer 99 comprising the semiconductor body 2, wherein the buried cavity 3 has been formed, as shown in FIG. 10. Furthermore, a lower dielectric layer 204, which is formed by thermal oxide and is intended to form the lower dielectric region 4, is present on the front surface S₂ of the semiconductor body 2. The stopping region 6 is arranged on a portion of the lower dielectric layer 204.

This having been said, subsequently, as shown in FIG. 11, a portion of the lower dielectric layer 204 is removed, so as to form a first process opening W1, which faces the front surface S₂ and is intended to be occupied by the ground contact region 18.

Subsequently, as shown in FIG. 12, the lower conductive structure 8 is formed, for example by performing a Low Pressure Chemical Vapor Deposition (LPCVD) of a polysilicon layer having a thickness comprised, for example, between 300 nm and 1000 nm and a successive etch.

Successively, as shown in FIG. 13, a filling region 400 of oxide is formed on the portions of the stopping region 6 and the lower dielectric layer 204 left exposed by the lower conductive structure 8. To this end, although not shown in detail, a Plasma Enhanced Chemical Vapor Deposition (PECVD) of TEOS oxide may be performed, possibly followed by a planarization step.

Subsequently, as shown in FIG. 14, an intermediate dielectric layer 402 of TEOS oxide is formed with a thickness for example comprised between 250 nm and 500 nm, for example by LPCVD or PECVD deposition; furthermore, portions of the intermediate dielectric layer 402 are selectively removed, so as to form second process openings W2, which face the covering region 16.

Successively, as shown in FIG. 15, an upper dielectric layer 404 of TEOS oxide with a thickness for example comprised between 250 nm and 500 nm is formed on the intermediate dielectric layer 402, for example by LPCVD or PECVD deposition. The upper dielectric layer 404 fills the second process openings W2; consequently, the upper dielectric layer 404 has third process openings W3.

In practice, the filling region 400, the intermediate dielectric layer 402 and the upper dielectric layer 404 are formed by a same material and form a single dielectric region, which is referred to as the front dielectric layer 420 (shown in FIG. 16); therefore, the sole front dielectric layer 420 will be indicated in the following Figures. The front dielectric layer 420 is intended to form the upper dielectric region 20.

Subsequently, as shown in FIG. 16, portions of the front dielectric layer 420 are selectively removed (for example, by dry etch), so as to form a main anchoring window WA1 and a secondary anchoring window WA2, which traverse the front dielectric layer 420 and face the lower anchoring region 14 and the routing region 10, respectively.

Subsequently, as shown in FIG. 17, a polysilicon layer, referred to as the first conductive layer 430, is formed on the front dielectric layer 420. For example, the first conductive layer 430 is formed by LPCVD deposition, has a thickness comprised between 200 nm and 500 nm and is impermeable to gases. The first conductive layer 430 fills the main anchoring window WA1 and the secondary anchoring window WA2. Furthermore, the first conductive layer 430 fills the third process openings W3; the portions of the first conductive layer 430 which fill the third process openings W3 form the protection structures SX.

In the following, reference is made to the sacrificial region 420′ to indicate the portion of the front dielectric layer 420 which is laterally delimited by the portion of the first conductive layer 430 which extends into the main anchoring window WA1, which is intended to form the anchoring portion 37″ of the first inner region 36. A portion of the first conductive layer 430, which is intended to form the suspended portion 37′ of the first inner region 36, extends on the sacrificial region 420′. In addition, the sacrificial region 420′ overlies the lower electrode region 12, the covering region 16, the inner portion of the lower anchoring region 14 and the connection regions RC (not visible in FIG. 17).

Subsequently, as shown in FIG. 18, portions of the first conductive layer 430 are selectively removed, so as to form the holes 38, which face the sacrificial region 420′. To this end, a dry etch is for example performed.

Successively, as shown in FIG. 19, a second conductive layer 440, of polysilicon permeable to gases, is deposited on the first conductive layer 430. The second conductive layer 440 has a thickness comprised for example between 100 nm and 300 nm (for example, approximately equal to 120 nm). Furthermore, the second conductive layer 440 coats the lateral walls and the bottom of the holes 38 in a conformal manner, i.e. without filling them. The portions of sacrificial region 420′ which form the bottoms of the holes 38 are then coated with corresponding portions of the second conductive layer 440, in direct contact.

Successively, as shown in FIG. 20, gaseous hydrofluoric acid (HF) is flown through the holes 38, therefore through the portions of second conductive layer 440 which coat the bottoms of the holes 38. In this manner, the sacrificial region 420′ is removed. The sensing cavity 39 is thus formed.

Subsequently, as shown in FIG. 21, a third conductive layer 450 of polysilicon, impermeable to gases, is formed on the second conductive layer 440. The third conductive layer 450 fills the holes 38, so as to hermetically close them, i.e. so as to prevent the gas from flowing through the holes 38.

In particular, in order to prevent the polysilicon from penetrating the sensing cavity 39, creating unwanted contacts with the lower electrode region 12, the third conductive layer 450 may be formed by performing an epitaxial growth of polysilicon (for example, at ambient pressure).

Subsequently, although not shown, an annealing may be performed in a nitrogen environment, to create a vacuum in the sensing cavity 39 or in any case to set the pressure value in the sensing cavity 39.

Successively, as shown in FIG. 22, portions of the first, the second and the third conductive layers 430, 440, 450 are selectively removed, for example by performing a dry etch, in such a way that the remaining portions of the first, the second and the third conductive layers 430, 440, 450 form the first, the second and the third upper conductive structures 30, 40, 50, respectively.

Subsequently, as shown in FIG. 23, the pads 66 and the conductive coupling region 68 may be formed, for example by a deposition of metal material and a successive patterning; furthermore, as shown again in FIG. 23, portions of the front dielectric layer 420 and underlying portions of the lower dielectric layer 204 are selectively removed, for example by a dry etch, so as to form the upper portion of the trench 11, which exposes a portion of the front surface S₂. The remaining portions of the lower dielectric layer 204 and the front dielectric layer 420 form the lower dielectric region 4 and the upper dielectric region 20, respectively.

Subsequently, as shown in FIG. 24, the passivation region 69 is formed, for example by a deposition of silicon nitride. Although not shown in detail, initially the passivation region 69 may also coat the pads 66, the conductive coupling region 68 and the third inner region 56 of the membrane 55; successively, portions of the passivation region 69 are selectively removed, so as to expose the pads 66, the conductive coupling region 68 and the third inner region 56 of the membrane 55. Furthermore, as visible in FIG. 24, the passivation region 69 coats the lateral walls and the bottom of the upper portion of the trench 11.

Subsequently, as shown in FIG. 25, a portion of the passivation region 69 which coats the bottom of the upper portion of the trench 11 is selectively removed, so as to expose an underlying portion of the semiconductor body 2; subsequently, as shown again in FIG. 25, a part of the exposed portion of the semiconductor body 2 is selectively removed, so as to form the bottom portion of the trench 11, which communicates with the buried cavity 3, and release the suspended portion 9′ of the semiconductor body 2. The main body 65 is thus formed.

Subsequently, as shown in FIG. 26, the first wafer 99 is mechanically coupled to a second wafer 799 which forms the cap 70. In particular, the coupling occurs by the bonding region 72. Furthermore, the second wafer 799 comprises a semiconductive portion 800 which overlies, at a distance, the pads 66, which is successively removed (operation not shown), so as to form the MEMS transducer 1 shown in FIG. 1. Subsequently, the manufacturing process proceeds, for example by performing dicing operations (not shown).

Although not shown in detail, the variants of FIGS. 5, 7 and 9 may be manufactured with the same manufacturing process previously described, in particular as to forming the membrane 55 and the sensing cavity 39, and with resulting variations relating to the patterning of the passivation region 69.

In greater detail, as to forming the lower barrier structure 80 (if any), it may be formed in the same manner as the ground contact region 18. As to the upper barrier structure 160, it is formed in the same manner described with reference to the first, the second and the third inner regions 36, 46, 56, and simultaneously therewith; consequently, forming the upper barrier structure 160 provides for forming a corresponding anchoring window through the front dielectric layer 420, which faces the lower barrier structure 80, before forming the first, the second and the third conductive layers 430, 440, 450.

In the case of the upper barrier structure 260 shown in FIG. 7, it may be formed, for example, by performing the operations of selectively removing portions of the front dielectric layer 420 and of underlying portions of the lower dielectric layer 204 shown in FIG. 23 before forming the first, the second and the third conductive layers 430, 440, 450 and the patterning thereof.

In the case of the upper barrier structure 360 shown in FIG. 9, it may be formed, for example, by forming the lower barrier structure 380 in the same manner and simultaneously with the ground contact region 18; successively, the upper barrier structure 360 is formed in the same manner described with reference to the first, the second and the third inner regions 36, 46, 56, and simultaneously therewith. Consequently, forming the upper barrier structure 360 may provide for forming a corresponding anchoring window through the front dielectric layer 420, which faces the lower barrier structure 380, before forming the first, the second and the third conductive layers 430, 440, 450. The trench 11 is then formed by performing a single etch through the upper barrier structure 360 and the lower barrier structure 380.

The advantages of the above are clear from the preceding description.

In particular, the lateral extension of the sensing cavity 39, and therefore also the shape of the membrane 55, substantially does not depend on the parameters of an etching process, little controllable, but is defined by the shape of the anchoring portion 37″. Furthermore, the membrane 55 is formed by a same material and is free from dielectric regions, therefore it does not have sub-regions with coefficients of thermal expansion different from each other, resulting in reduction of undesired mechanical stresses inside the membrane 55. Furthermore, the variable capacitor formed by the membrane 55 and the lower electrode region 12 is substantially free from fixed-capacitance parasitic capacitors.

Finally, it is clear that modifications and variations may be made to the MEMS transducer and the related manufacturing process previously described and illustrated, without departing from the scope of this disclosure, as defined in the attached claims.

For example, the conductive coupling region 68, instead of contacting the annular region 52 of the third upper conductive structure 50, may extend on an insulating region (not shown; for example, of silicon nitride), which is interposed between the annular region 52 and the conductive coupling region 68. In this case, the conductive coupling region 68 is electrically decoupled from the ground contact region 18.

As previously mentioned, the buried cavity 3 may be absent, in which case the trench 11 stops at the front surface S₂ of the semiconductor body 2, as shown in FIG. 24.

The third upper conductive structure 50 may be formed by amorphous silicon, rather than polysilicon. In this case, the third conductive layer 450 shown in FIG. 21 is formed for example by PECVD deposition of amorphous silicon.

The stopping region 6 may be formed by a material other than aluminum oxide, such as for example silicon nitride.

As to the manufacturing process, it may comprise annealings not explicitly mentioned above. The order of some steps may vary with respect to what has been described.

For example, the first conductive layer 430 may be formed by epitaxial polysilicon.

Furthermore, in general, all the previously mentioned polysilicon regions may have arbitrary doping levels and types, for example obtained by corresponding implants.

The formation of the front dielectric layer 420 and of the protection structures SX may also occur in a different manner than what has been described with reference to FIGS. 13-15. For example, the front dielectric layer may be formed with a single deposition; subsequently, the third openings W3 may be formed by selectively etching the front dielectric layer.

Claims

1. A MEMS pressure transducer, comprising: a semiconductor body;a lower dielectric region arranged above the semiconductor body;a fixed electrode region formed by conductive material and arranged on the lower dielectric region;a lower anchoring region formed by conductive material and arranged on the lower dielectric region;wherein the fixed electrode region and lower anchoring region are laterally separated from each other;a membrane of conductive material suspended above the fixed electrode region to upwardly delimit a cavity, the fixed electrode region facing the cavity, the membrane being deformable as a function of pressure and forming a variable capacitor together with the fixed electrode region; andan upper anchoring region of conductive material that laterally delimits the cavity and is interposed, in direct contact, between the membrane and the lower anchoring region.

2. The MEMS pressure transducer according to claim 1, comprising a first conductive region that forms a part of the membrane and the upper anchoring region.

3. The MEMS pressure transducer according to claim 2, wherein said part of the membrane is traversed by holes facing the cavity and is impermeable to gases, with exception of the holes; further comprising: a second conductive region that is permeable to gases and extends on the first conductive region and inside the holes so as to face the cavity;a third conductive region that is impermeable to gases and extends on the second conductive region; andwherein the second conductive region and the third conductive region form corresponding parts of the membrane.

4. The MEMS pressure transducer according to claim 3, wherein the third conductive region is formed by one of a polysilicon material or an amorphous silicon material.

5. The MEMS pressure transducer according to claim 3, wherein the second conductive region is formed by a permeable polysilicon material.

6. The MEMS pressure transducer according to claim 3, wherein the first conductive region is formed by a polysilicon material.

7. The MEMS pressure transducer according to claim 3, wherein the upper anchoring region laterally delimits a lateral opening of the cavity; further comprising an upper dielectric region that is arranged above the lower dielectric region and laterally and externally surrounds the upper anchoring region to close the lateral opening, said cavity being hermetically closed.

8. The MEMS pressure transducer according to claim 7, wherein the lower dielectric region and the upper dielectric region form a dielectric support structure, said cavity extending inside the dielectric support structure, the first conductive region, the second region and the third conductive region overlying part of the dielectric support structure; further comprising a passivation region impermeable to humidity that laterally coats part of the dielectric support structure and upwardly coats portions of the dielectric support structure left exposed by the first conductive region, the second conductive region and the third conductive region.

9. The MEMS pressure transducer according to claim 7, wherein the lower dielectric region and the upper dielectric region form a dielectric support structure, said cavity extending inside the dielectric support structure, the first conductive region, the second conductive region and the third conductive region overlying part of the dielectric support structure; said MEMS pressure transducer further comprising a lower barrier structure, which extends through the lower dielectric region and contacts the semiconductor body, and an upper barrier structure, which is laterally spaced from the membrane and extends in part above the upper dielectric region and in part through the upper dielectric region, so as to contact the lower barrier structure, the lower barrier structure and the upper barrier structure being of conductive material, being impermeable to humidity and laterally surrounding part of the dielectric support structure; and wherein the upper barrier structure and the first conductive region, the second conductive region and the third conductive region leave exposed portions of the dielectric support structure, the MEMS pressure transducer further comprising a passivation region impermeable to humidity, which coats upwardly the portions of the dielectric support structure left exposed by the upper barrier structure and the first conductive region, the second conductive region and the third conductive region.

10. The MEMS pressure transducer according to claim 7, wherein the semiconductor body houses a buried cavity that is upwardly delimited by a suspended portion of the semiconductor body, which is laterally delimited by a trench which traverses part of the semiconductor body and communicates downwardly with the buried cavity, said suspended portion extending cantilever from a fixed portion of the semiconductor body; and wherein the cavity is arranged above the suspended portion.

11. The MEMS pressure transducer according to claim 10, wherein the lower dielectric region and the upper dielectric region form a dielectric support structure, said cavity extending inside the dielectric support structure, the first conductive region, the second conductive region and the third conductive region overlying part of the dielectric support structure; further comprising a barrier structure of conductive and impermeable-to-humidity material that extends in part above the upper dielectric region and in part through the upper dielectric region and through the lower dielectric region up to contacting the semiconductor body, said barrier structure laterally surrounding the dielectric support structure and being traversed by the trench.

12. The MEMS pressure transducer according to claim 1, wherein the lower dielectric region comprises a stopping region made of a material chosen from aluminum oxide and silicon nitride; and wherein the fixed electrode region and the lower anchoring region extend over the stopping region, in direct contact; further comprising a covering region that is made of a same material as the fixed electrode region and the lower anchoring region, extends on the stopping region facing the cavity, and is interposed between and laterally separated from the fixed electrode region and the lower anchoring region.

13. The MEMS pressure transducer according to claim 1, further comprising a cap that is mechanically coupled to the semiconductor body to form a chamber housing the membrane; and wherein the cavity is fluidically insulated from the chamber; and wherein the cap has at least one respective hole.

14. A process for manufacturing a MEMS pressure transducer, comprising: forming a lower dielectric region above a semiconductor body;on the lower dielectric region, forming a fixed electrode region and a lower anchoring region of conductive material, laterally separated from each other;forming a membrane of conductive material, which is suspended above the fixed electrode region and delimits a cavity upwardly, the fixed electrode region facing the cavity, the membrane being deformable as a function of pressure and forming a variable capacitor together with the fixed electrode region; andforming an upper anchoring region of conductive material, which laterally delimits the cavity and is interposed, in direct contact, between the membrane and the lower anchoring region.

15. The process according to claim 14, further comprising: forming a front dielectric layer above the fixed electrode region and the lower anchoring region;selectively removing a portion of the front dielectric layer, so as to form an anchoring window that traverses the front dielectric layer and faces the lower anchoring region, said anchoring window laterally delimiting a sacrificial portion of the front dielectric layer;forming a first conductive layer on the front dielectric layer and inside the anchoring window, said first conductive layer being impermeable to gases;forming holes, which traverse a portion of the first conductive layer that overlies the sacrificial portion;forming a second conductive layer on the first conductive layer, said second conductive layer being permeable to gases and extending inside the holes;removing the sacrificial portion, by flowing a gaseous chemical agent through the holes;forming a third conductive layer, impermeable to gases, on the second conductive layer, so as to prevent the gases from flowing through the holes; andselectively removing portions of the first conductive layer, the second conductive layer and the third conductive layer, in such a way that the membrane is formed by corresponding residual portions of the first conductive layer, the second conductive layer and the third conductive layer, a residual portion of the first conductive layer further forming the upper anchoring region.

16. The process according to claim 15, wherein the third conductive layer is formed by polysilicon or amorphous silicon; and wherein, when the third conductive layer is formed by polysilicon, the process comprises forming the third conductive layer by epitaxial growth of polysilicon.

17. The process according to claim 15, wherein the second conductive layer is formed by permeable polysilicon.

18. The process according to claim 15, wherein the first conductive layer is formed by polysilicon.

19. The process according to claim 14, wherein the upper anchoring region laterally delimits a lateral opening of the cavity, said process further comprising forming an upper dielectric region, which is arranged above the lower dielectric region and laterally and externally surrounds the upper anchoring region, so as to close the lateral opening and hermetically close the cavity.

20. The process according to claim 19, wherein the lower dielectric region and the upper dielectric region form a dielectric support structure, said cavity extending inside the dielectric support structure, the first conductive layer, the second conductive layer and the third conductive layer overlying part of the dielectric support structure; said process further comprising forming a passivation region impermeable to humidity, which laterally coats part of the dielectric support structure and coats upwardly portions of the dielectric support structure left exposed by the first conductive layer, the second conductive layer and the third conductive layer.

21. The process according to claim 19, wherein the lower dielectric region and the upper dielectric region form a dielectric support structure, said cavity extending inside the dielectric support structure, the first conductive layer, the second conductive layer and the third conductive layer overlying part of the dielectric support structure; said process further comprising forming a lower barrier structure, which extends through the lower dielectric region and contacts the semiconductor body, and an upper barrier structure, which is laterally spaced from the membrane and extends in part above the upper dielectric region and in part through the upper dielectric region, so as to contact the lower barrier structure, the lower barrier structure and the upper barrier structure being of conductive material, being impermeable to humidity and laterally surrounding part of the dielectric support structure; and wherein the upper barrier structure and the first conductive layer, the second conductive layer and the third conductive layer leave exposed portions of the dielectric support structure, said process further comprising forming a passivation region impermeable to humidity, which coats upwardly portions of the dielectric support structure left exposed by the upper barrier structure and the first conductive layer, the second conductive layer and the third conductive layer.

22. The process according to claim 19, comprising forming, in the semiconductor body, a buried cavity, which is upwardly delimited by a suspended portion of the semiconductor body, which is laterally delimited by a trench which traverses part of the semiconductor body and communicates downwardly with the buried cavity, said suspended portion extending cantilever from a fixed portion of the semiconductor body, said cavity being arranged above the suspended portion; and wherein the lower dielectric region and the upper dielectric region form a dielectric support structure, said cavity extending inside the dielectric support structure, the first conductive layer, the second conductive layer and the third conductive layer overlying part of the dielectric support structure; said process further comprising forming a barrier structure of conductive and impermeable-to-humidity material, which extends in part above the upper dielectric region and in part through the upper dielectric region and through the lower dielectric region, up to contacting the semiconductor body, said barrier structure laterally surrounding the dielectric support structure and being traversed by the trench.