Patent Application
20100163295
Embodiments of the present invention generally relate to the field of integrated circuit package design and, more particularly, to coaxial plated through holes (PTH) for robust electrical performance.
As integrated circuit architecture core count continues to scale up in accordance to Moore's law, the need for high I/O bandwidth and fully integrated voltage regulator design is critical to improve performance. The capacitance between the large plated through holes via pads and surrounding metal bodies causes return loss during high speed data transfer and in addition provides a low quality factor for fully integrated voltage regular designs. While ultra small plated through holes can help improve the return loss, they are currently very costly to manufacture using mechanical drilling process.
The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references indicate similar elements, and in which:
In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the invention. It will be apparent, however, to one skilled in the art that embodiments of the invention can be practiced without these specific details. In other instances, structures and devices are shown in block diagram form in order to avoid obscuring the invention.
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner in one or more embodiments.
Integrated circuit device 102 is intended to represent any type of integrated circuit die. In one embodiment, integrated circuit device 102 is a multi-core microprocessor. Integrated circuit device 102 includes device contacts 116 to conductively couple with package substrate 104.
Package substrate 104 provides mechanical support for integrated circuit package 100 and includes substrate core 106. Substrate core 106 may itself comprise multiple layers with internal routing (not shown). In one embodiment, substrate core 106 is a four layer substrate core structure. In another embodiment, substrate core 106 is a two layer substrate core structure.
Plated through hole 108 is formed and filled through conventional means. However, plated through hole 108 includes coaxial wire 110. In one embodiment, coaxial wire 110 is formed by a method described hereinafter. In another embodiment, coaxial wire 110 is formed by some other means that may subsequently occur to one skilled in the art.
Substrate core surface 112 is patterned to separately route plated through hole 108 and coaxial wire 110. Build-up layers 114 are subsequently disposed on substrate core surface 112 using well known processing methods and include conductive traces to route plated through hole 108 and coaxial wire 110 device contacts 116. In one embodiment, plated through hole 108 and coaxial wire 110 are routed to device contacts 116 that represent differential pair signals of integrated circuit device 102. In one embodiment, plated through hole 108 is routed to a device contact 116 that represents a ground plane of integrated circuit device 102.
Package contacts 118 allow integrated circuit package 100 to be electrically coupled, for example by a socket connection, to a circuit board. In one embodiment, package contacts 118 include solder bumps. In another embodiment, package contacts 118 include lands.
After further processing (
Processor(s) 702 may represent any of a wide variety of control logic including, but not limited to one or more of a microprocessor, a programmable logic device (PLD), programmable logic array (PLA), application specific integrated circuit (ASIC), a microcontroller, and the like, although the present invention is not limited in this respect. In one embodiment, processors(s) 702 are Intel® compatible processors. Processor(s) 702 may have an instruction set containing a plurality of machine level instructions that may be invoked, for example by an application or operating system.
Memory controller 704 may represent any type of chipset or control logic that interfaces system memory 706 with the other components of electronic appliance 700. In one embodiment, the connection between processor(s) 702 and memory controller 704 may be a point-to-point serial link. In another embodiment, memory controller 704 may be referred to as a north bridge.
System memory 706 may represent any type of memory device(s) used to store data and instructions that may have been or will be used by processor(s) 702. Typically, though the invention is not limited in this respect, system memory 706 will consist of dynamic random access memory (DRAM). In one embodiment, system memory 706 may consist of Rambus DRAM (RDRAM). In another embodiment, system memory 706 may consist of double data rate synchronous DRAM (DDRSDRAM).
Input/output (I/O) controller 708 may represent any type of chipset or control logic that interfaces I/O device(s) 712 with the other components of electronic appliance 700. In one embodiment, I/O controller 708 may be referred to as a south bridge. In another embodiment, I/O controller 708 may comply with the Peripheral Component Interconnect (PCI) Express™ Base Specification, Revision 1.0a, PCI Special Interest Group, released Apr. 15, 2003.
Network controller 710 may represent any type of device that allows electronic appliance 700 to communicate with other electronic appliances or devices. In one embodiment, network controller 710 may comply with a The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 802.11b standard (approved Sep. 16, 1999, supplement to ANSI/IEEE Std 802.11, 1999 Edition). In another embodiment, network controller 710 may be an Ethernet network interface card.
Input/output (I/O) device(s) 712 may represent any type of device, peripheral or component that provides input to or processes output from electronic appliance 700.
In the description above, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. In other instances, well-known structures and devices are shown in block diagram form.
Many of the methods are described in their most basic form but operations can be added to or deleted from any of the methods and information can be added or subtracted from any of the described messages without departing from the basic scope of the present invention. Any number of variations of the inventive concept is anticipated within the scope and spirit of the present invention. In this regard, the particular illustrated example embodiments are not provided to limit the invention but merely to illustrate it. Thus, the scope of the present invention is not to be determined by the specific examples provided above but only by the plain language of the following claims.
