Patent Application
20200203287
Various features relate to devices that includes compartmental shielding, but more specifically to devices that include compartmental shielding with improved heat dissipation and routing.
The substrate 102 includes a plurality of dielectric layers 120, a plurality of interconnects 122, and a plurality of surface interconnects 123. Each layer of the dielectric layers 120 includes a patterned metal layer and vias. The substrate 102 includes a first solder resist layer 124, a second solder resist layer 126, and a plurality of solder interconnects 130. A capacitor 150 is mounted over the first surface of the substrate 102. An encapsulation layer 160 encapsulates the die 104 and the capacitor 150. The die 104 and the capacitor 150 may each generate their own respective electromagnetic (EM) field. In addition, the die 104 and the capacitor 150 may be subject to external EM fields. All of these EM fields may impact the performance of the die 104 and/or the capacitor 150.
The integrated device 100 is a relatively small device, with components that are located very close to each other. As such, it can be challenging and very difficult to create an electromagnetic shield that can isolate components of the integrated device 100 from the EM fields. These electromagnetic shields are bulky and take up a lot of real estate, making them not practical nor useful for small devices since space is very limited for small devices. In addition, the size of the electromagnetic shield and the process of implementing an electromagnetic shield requires a lot of spacing between the die 104 and the capacitor 150, which creates unnecessarily bulky integrated devices.
Therefore, there is a need for providing a device that includes electromagnetic shielding for components of the devices. Ideally, the electromagnetic shielding may be implemented in small devices and in small spaces, while also providing various functionalities and capabilities, such as providing improved heat dissipation and improved interconnect routing for the device.
Various features relate to devices that includes compartmental shielding, but more specifically to devices that include compartmental shielding with improved heat dissipation and routing.
One example provides a device that includes a substrate, a first component coupled to the substrate, a second component coupled to the substrate, an encapsulation layer formed over the substrate such that the encapsulation layer encapsulates the first component and the second component, and a shielding layer formed over a first surface of the encapsulation layer. The shielding layer includes a first portion formed in a first cavity of the encapsulation layer. The first cavity is located between the first component and the second component. The first portion of the shielding layer provides a compartmental electromagnetic (EM) shield between the first component and the second component.
Another example provides a device that includes a substrate, a first component coupled to the substrate, a second component coupled to the substrate, means for encapsulating formed over the substrate such that the means for encapsulating encapsulates the first component and the second component, and means for shielding formed over a first surface of the means for encapsulating. The means for shielding includes a first portion formed in a first cavity of the means for encapsulating. The first cavity is located between the first component and the second component. The first portion of the means for shielding provides means for compartmental electromagnetic (EM) shielding between the first component and the second component.
Another example provides a method for fabricating a device having shielding. The method provides a device that includes a substrate; a first component coupled to the substrate; a second component coupled to the substrate; and an encapsulation layer formed over the substrate such that the encapsulation layer encapsulates the first component and the second component. The method forms a plurality of cavities in the encapsulation layer, including forming a first cavity in the encapsulation layer between the first component and the second component. The method forms a shielding layer over a first surface of the encapsulation layer, including forming a first portion of the shielding layer in the first cavity of the encapsulation layer, wherein the first portion of the shielding layer provides a compartmental electromagnetic (EM) shield between the first component and the second component.
Various features, nature and advantages may become apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout.
In the following description, specific details are given to provide a thorough understanding of the various aspects of the disclosure. However, it will be understood by one of ordinary skill in the art that the aspects may be practiced without these specific details. For example, circuits may be shown in block diagrams in order to avoid obscuring the aspects in unnecessary detail. In other instances, well-known circuits, structures and techniques may not be shown in detail in order not to obscure the aspects of the disclosure.
The present disclosure describes a device that includes a substrate, a first component coupled to the substrate, a second component coupled to the substrate, an encapsulation layer formed over the substrate such that the encapsulation layer encapsulates the first component and the second component, and a shielding layer formed over the encapsulation layer. The shielding layer includes a first portion formed in a first cavity of the encapsulation layer. The first cavity is located laterally between the first component and the second component. The first portion of the shielding layer provides a compartmental electromagnetic (EM) shield between the first component and the second component. In some implementations, different portions of the shielding layer may be configured (i) as an interconnect to provide an electrical path between the first component and the substrate, (ii) as an interconnect to provide an electrical path between the first component and the second component, as an interconnect to provide an electrical path between the first component and a component embedded in the substrate, (iii) as a heat dissipating structure to provide heat dissipation of the first component and/or the second component, (iv) as an interconnect to a ground layer, and/or (v) as a conformal EM shield for the first component and/or the second component. In some implementations, the device may be an integrated device or a system in package (SiP). In some implementations, the first component may be a radio frequency (RF) component, a die, or a passive component (e.g., capacitor).
The shielding layer 208 is formed over the encapsulation layer 204 and the substrate 202. The shielding layer 208 may include one or more portions that are configured to be coupled to ground. The shielding layer 208 may be configured to provide compartmental EM shielding and/or conformal EM shielding for the device 200. The compartmental EM shielding may include internal walls in the encapsulation layer 204. The shielding layer 208 may be implemented in small areas and small footprints, enabling a tightly packaged device to have effective and robust EM shielding, without sacrificing the size of the device.
Moreover, as will be further described below, one or more portions of the shielding layer 208 may be configured to provide (i) heat dissipating capabilities for components of the device 200, (ii) connections between components and the substrate, (iii) connections between components, and/or (iv) surfaces for scattering EM waves. Thus, the shielding layer 208 is a part of the device 200 that may provide multi-function capabilities.
The first component 210, the second component 212, the fourth component 216 and the fifth component 218 are coupled to the substrate 202. The third component 214 is coupled to the second component 212. For example, the third component 214 may be stacked over the second component 212. In some implementations, each of the above components (e.g., 210, 212, 214, 216, 218) may be an electronic component, a RF component, a die, or a passive component. For example, the first component 210 may be an RF component, the second component 212 may be a die (e.g., processor die), the third component 214 may be a die (e.g., memory die), the fourth component 216 may be a capacitor, and the fifth component 218 may be capacitor (e.g., multi-layer ceramic capacitor (MLCC)). The arrangement, configuration and types of components in
The encapsulation layer 204 encapsulates the first component 210, the second component 212, the third component 214, the fourth component 216 and the fifth component 218. The encapsulation layer 204 includes a plurality of cavities 206 (e.g., first cavity, second cavity, third cavity, etc.). The plurality of cavities 206 is formed in the encapsulation layer 204 and may travel through the encapsulation layer 204 at various depths. The plurality of cavities 206 has walls that are approximately vertical (e.g., approximately 90 degrees to surface of substrate or surface of component, approximately perpendicular to surface of substrate or surface of component). However, in some implementations, the plurality of cavities 206 may have walls that are non-vertical (e.g., slanted, diagonal). For example, the plurality of cavities 206 may be tapered. In some implementations, the diameter, width or opening of each cavity (without any shielding layer) may be approximately 10 micrometers (μm) or greater (e.g., minimum diameter or minimum width of approximately 10 micrometers (μm)).
The spacing between components in the encapsulation layer 204 may vary. In some implementations, a minimum spacing between two neighboring components is approximately 75 micrometers (μm). In some implementations, a minimum spacing between two neighboring components is approximately 50 micrometers (μm). Different implementations may use different minimum spacing between two neighboring components. The present disclosure provides a compartmental shield that can be formed between two neighboring components such that a spacing between the compartmental shield (e.g., formed from a portion of the shielding layer 208) and a component (e.g., 210, 212, 216) is less than 75 micrometers (μm). In some implementations, a spacing between a compartment shield and a component is approximately 40 micrometers (μm) or less. In some implementations, the above mentioned spacing is possible because of the process for forming a shielding layer described in the disclosure.
The plurality of cavities 206 may be formed using various processes. In some implementations, the plurality of cavities 206 may be formed using a laser process (e.g. laser ablation). In some implementations, the plurality of cavities 206 may be formed using a photo etching process. Different implementations may use different materials for the encapsulation layer 204. For example, the encapsulation layer 204 may include a mold, a resin and/or an epoxy.
The shielding layer 208 may also be formed over a side portion of the substrate 202. The shielding layer 208 may be a patterned shielding layer that follows the contours of some or all portions of the encapsulation layer 204. Some or all portions of the shielding layer 208 may be configured to reduce electromagnetic fields and/or waves in space by providing a barrier. Some or all portions of the shielding layer 208 may be configured to couple to ground. Some or all portions of the shielding layer 208 may be configured to isolate one or more components from their surroundings, thus reducing the impact of electromagnetic fields and/or waves. In some implementations, the shielding layer 208 may be made of one or more materials with conductive and/or magnetic properties. The shielding layer 208 may include one or more layers.
Different implementations may use different materials for the shielding layer 208. The shielding layer 208 may include one or more layers of the same material or different materials. In some implementations, the shielding layer 208 may include a metal such as copper (Cu), silver (Ag), gold (Au), and/or Aluminum (Al). In some implementations, the shielding layer 208 may include a non-metal that is thermally and/or electrically conductive, such as diamond like carbon and/or conductive polymers. Examples of conductive polymers include (poly(fluorene)s, polyphenylenes, polypyrenes, polyazulenes, polynaphthalenes, poly(pyrrole)s, polycarbazoles, polyindoles, polyazepines, polyanilines, poly(thiophene)s, poly(3,4-ethylenedioxythiophene), poly(p-phenylene sulfide), Poly(p-phenylene vinylene), poly(acetylene)s). In some implementations, the shielding layer 208 may include a combination of metal material(s) and/or non-metal material(s).
As mentioned above, the shielding layer 208 may provide multi-function capabilities. For example, one or more portions of the shielding layer 208 may be configured to provide (i) EM shielding for one or more components, (ii) heat dissipating capabilities for components of the device 200, (iii) connections between components and the substrate, and/or (iv) surfaces and space for scattering EM waves.
As mentioned above, electromagnetic (EM) shielding can include conformal shielding and compartmental shielding. The shielding layer 208 may be a means for shielding (e.g., means for EM shielding). One or more portions of the shielding layer 208 may be configured to be coupled to ground. In some implementations, conformal shielding provides a way for the components of the device to be isolated from external electromagnetic fields and/or waves. Some or all portions of the shielding layer 208 may be configured to provide conformal shielding (e.g., means for conformal shielding, means for conformal EM shielding). For example, portions of the shielding layer 208 that is outside of the device 200 may be configured to provide conformal shielding. Examples of these portions include portions of the shielding layer 208 that are located over the side of the substrate 202, over the side (e.g., vertical surface, lateral surface) of the encapsulation layer 204, and/or over the horizontal surface of the encapsulation layer 204. A first portion 208a of the shielding layer 208, a second portion 208b of the shielding layer 208, and a third portion 208c of the shielding layer 208 are examples of portions of the shielding layer 208 that may be configured to provide conformal shielding.
In some implementations, compartmental shielding provides a way for components of the device to be isolated from each other. As such, compartmental shielding reduces the effect of electromagnetic fields and/or waves from one component to another component of the device. Some portions of the shielding layer 208 may be configured to provide compartmental shielding. For example, certain cavities of the encapsulation layer 204 may be located between components encapsulated by the encapsulation layer 204 and these cavities include portions of the shielding layer 208 that are configured as compartmental EM shielding (e.g., means for compartmental shielding, means for compartmental EM shielding).
In some implementations, some or all portions of the shielding layer 208 may be configured to provide heat dissipation for components encapsulated by the encapsulation layer 204. Thus, in some implementations, portions of the shielding layer 208 may be a means for heat dissipation.
The encapsulation layer 204 is not a good thermal conductor of heat. Thus, when a component is encapsulated by the encapsulation layer 204, heat generated by the component does not dissipate from the component very well. By providing a path for heat from the component to dissipate through the use of the shielding layer 208, which has a much higher thermal conductivity value, more heat can be dissipated from the component.
Shielding Layer Structure for Connection with Substrate
In some implementations, some or all portions of the shielding layer 208 may be configured to provide connections (e.g., electrical connections) between one or more components and/or the substrate 202. Thus, in some implementations, portions of the shielding layer 208 may be a means for electrical connection. One or more portions of the shielding layer 208 may be coupled to one or more components and/or the substrate 202. The one or more portions of the shielding layer 208 may be separated from other portions of the shielding layer 208 that are configured to couple to ground. Thus, in some implementations, one or more portions of the shielding layer 208 may be coupled to ground, while one or more other portions of the shielding layer 208 may be configured to carry one or more electrical signals. The one or more other portions of the shielding layer 208 may be configured as interconnect(s) to the substrate 202, as interconnect(s) to embedded component(s) in the substrate 202, and/or as interconnect(s) to components mounted on the substrate 202.
Utilizing the shielding layer 208 for routing and providing connections between the substrate 202 and components may enable the substrate 202 to be thinner since space in the substrate 202 that would have been previously needed is no longer needed when portions of the shielding layer 208 is used for routing. It is noted that portions of the shielding layer 208 may also be used to connect components in the encapsulation layer 204. For example, portions of the shielding layer 208 may be configured to provide an electrical connection between the first component 210 and the second component 212. Another advantage of this approach is that such a connection may bypass the substrate 202. The connection may go through a backside of the components.
In some implementations, coupling a component (e.g., 210, 212, 214) to a portion of the shielding layer 208 that is coupled to ground is simpler than coupling the component through the substrate. For example, a portion of the shielding layer 208 may be coupled through a backside of one or more components, greatly simplifying the route for ground for the component(s). Thus, the disclosure describes an effective way of providing ground connections for a variety of components. This may avoid providing complicated routing in the substrate 202. By reducing the number of routes in the substrate 202, a thinner substrate 202 may be provided. For examples, in some implementations, routes that would have normally been designed in the substrate 202 has been designed as part of the shielding layer 208.
In some implementations, a portion of the shielding layer 208 may be coupled (e.g., directly coupled) to one or more interconnects of the substrate 202, through the side of the substrate 202. For example, a portion of the shielding layer 208 may be coupled to a ground shield layer of the substrate 202, through interconnects of the substrate 202. The figures of the present disclosure may illustrate that the shielding layer 208 is touching from the side, interconnects of the substrate 202. However, in some implementations, the shielding layer 208 may not be touching from the side, any of the interconnects of the substrate 202. In some implementations, the shielding layer 208 may touching from the side, some of the interconnects of the substrate 202.
In some implementations, the formation of cavities and the shielding layer over the cavities may create internal surfaces and/or regions for absorbing and/or scattering EM waves. In some implementations, some or all portions of the shielding layer 208 may be means for scattering EM waves.
In view of the above, the shielding layer 208 may provide multi-function capabilities for a device (e.g., 200). For example, one or more portions of the shielding layer 208 may be configured to provide (i) EM shielding for one or more components, (ii) heat dissipating capabilities for components of the device 200, (iii) connections between components and the substrate, and/or (iv) surfaces and space for absorbing and/or scattering EM waves. In some implementations, one or more portions may provide more than one functionality. For example, a portion of the shielding layer 208 may provide EM conformal and compartmental shielding. In another example, a portion of the shielding layer 208 may provide EM shielding and heat dissipation. In another example, a portion of the shielding layer 208 may provide heat dissipation and electrical connection. In another example, a portion of the shielding layer 208 may provide EM shielding and electrical connection.
In some implementations, labeling can be created in the encapsulation layer 204 and/or the shielding layer 308. For example, a labeling 310 may be formed in the encapsulation layer 204. Similarly, the labeling 310 may be formed in the shielding layer 308. In some implementations, the labeling 310 may be formed in the encapsulation layer 204 and the shielding layer 308. The labeling 310 may be formed by using a laser etching process. In some implementations, a labeling 320 that can be used as a barcode (e.g., QR code) is formed in the encapsulation layer 204. It is noted that labeling 310 may also act or be configured to provide EM scattering and/or heat dissipation.
Having described various implementations of a device that includes a shielding layer. A sequence for fabricating a device that includes a shielding layer will be further described below.
It should be noted that the sequence of
Stage 1, as shown in
Stage 2 illustrates a state after a plurality of cavities 206 (e.g., 206a, 206b) is formed over the encapsulation layer 204. Different implementations may form the plurality of cavities 206 differently in the encapsulation layer 204. Stage 2 illustrates that a portion of the encapsulation layer 204 over the first component 210 has been removed. Different implementations may use different processes for forming the plurality of cavities 206 and/or removing portions of the encapsulation layer 204. In some implementations, a laser process (e.g., laser ablation) may be use to form the plurality of cavities 206 in the encapsulation layer 204. In some implementations, a photo etching process (e.g., photo-lithography process) may be used to form the plurality of cavities 206 and/or remove portions of the encapsulation layer. The plurality of cavities 206 may have walls that are approximately vertical or tapered (e.g., angled, non-vertical, diagonal).
Stage 3, as shown in
Stage 4 illustrates a state after the shielding layer 208 is patterned and/or separated into several portions. An etching process (e.g., photo-etching process) and/or a laser ablation process may be used to form breaks 209a and/or 209b in the shielding layer 208. It is noted that the etching process and/or the laser ablation process may remove larger portions of the shielding layer 208 and/or encapsulation layer 204.
In some implementations, fabricating a device that includes a shielding layer includes several processes.
It should be noted that the sequence of
The method provides (at 705) a device (e.g., 200) includes a substrate (e.g., 202), components (e.g., 210, 212, 214, 216, 218), and an encapsulation layer (e.g., 204). Different implementations may provide the encapsulation layer over the substrate and the components by using various processes. For example, the encapsulation layer may be provided over the substrate and the components by using a compression and transfer molding process, a sheet molding process, or a liquid molding process. Stage 1 of
The method removes (at 710) portions of the encapsulation layer to form cavities (e.g., 206) in the encapsulation layer. Different implementations may form the plurality of cavities differently in the encapsulation layer. In some implementations, a laser process (e.g., laser ablation) may be use to form the plurality of cavities in the encapsulation layer. In some implementations, a photo etching process (e.g., photo-lithography process) may be used to form the plurality of cavities and/or remove portions of the encapsulation layer. The plurality of cavities in the encapsulation layer may have walls that are approximately vertical or tapered (e.g., angled, non-vertical, diagonal). Stage 2 of
The method forms (at 715) a shielding layer (e.g., 208) over the encapsulation layer and/or the substrate. In some implementations, forming a shielding layer may include forming a shielding layer (i) over cavities of the encapsulation layer, (ii) over a horizontal surface of the encapsulation layer and/or (iii) over a vertical surface (e.g., side surface, lateral surface) of the encapsulation layer and/or the substrate. One or more portions of the shielding layer 208 may be configured to couple to ground. The shielding layer 208 may include one or more layers. The shielding layer may include one or more metal layers and/or one or more non-metal layers. Examples of materials for the shielding layer is described above.
Different implementations may form the shielding layer differently in the cavities. In some implementations, one or more of the cavities may be partially filled and/or completely filled. Different implementations may use different processes for forming the shielding layer. In some implementations, a chemical vapor deposition (CVD) process and/or a physical vapor deposition (PVD) process for forming the shielding layer. For example, a sputtering process, a spray coating, and/or a plating process may be used to form the shielding layer. Stage 3 of
The method optionally removes (at 720) portions of the shielding layer 208 to separate the shielding layer 208 into different portions. An etching process (e.g., photo-etching process) and/or a laser ablation process may be used to form breaks 209a and/or 209b in the shielding layer 208 that separate the shielding layer 208. It is noted that the etching process and/or the laser ablation process may remove larger portions of the shielding layer and/or encapsulation layer. Stage 4 of
The method 700 of
As mentioned above, a device with electromagnetic (EM) shielding may have different arrangements, configurations and/or structure.
It should be noted that the sequence of
Stage 1, as shown in
Stage 2 illustrates a state after a plurality of cavities 206 and 1106 are formed over the encapsulation layer 204. Different implementations may form the plurality of cavities 206 differently in the encapsulation layer 204. Stage 2 illustrates that a portion of the encapsulation layer 204 over the first component 210 has been removed. Different implementations may use different processes for forming the plurality of cavities 206 and/or removing portions of the encapsulation layer 204. In some implementations, a laser process (e.g., laser ablation) may be use to form the plurality of cavities 206 in the encapsulation layer 204. In some implementations, a photo etching process (e.g., photo-lithography process) may be used to form the plurality of cavities 206 and/or remove portions of the encapsulation layer. The plurality of cavities 206 may have walls that are approximately vertical or tapered (e.g., angled, non-vertical, diagonal). In some implementations, the plurality of cavities 1106 may be near or along scribe lines that separates the different devices of the wafer. The scribe lines are portions of the wafer that are diced during singulation of the wafer.
Stage 3, as shown in
Stage 4 illustrates a state after the wafer is singulated into a plurality of devices 1100. A mechanical process (e.g., saw) may be used to singulate the wafer into individual devices 1100. Each of the device 1100 may include a substrate 202, components, an encapsulation layer and a shielding layer 208.
One or more of the components, processes, features, and/or functions illustrated in
The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any implementation or aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects of the disclosure. Likewise, the term “aspects” does not require that all aspects of the disclosure include the discussed feature, advantage or mode of operation. The term “coupled” is used herein to refer to the direct or indirect coupling between two objects. For example, if object A physically touches object B, and object B touches object C, then objects A and C may still be considered coupled to one another—even if they do not directly physically touch each other. It is further noted that the term “over” as used in the present application in the context of one component located over another component, may be used to mean a component that is on another component and/or in another component (e.g., on a surface of a component or embedded in a component). Thus, for example, a first component that is over the second component may mean that (1) the first component is over the second component, but not directly touching the second component, (2) the first component is on (e.g., on a surface of) the second component, and/or (3) the first component is in (e.g., embedded in) the second component. The term “about ‘value X’”, or “approximately value X”, as used in the disclosure shall mean within 10 percent of the ‘value X’. For example, a value of about 1 or approximately 1, would mean a value in a range of 0.9-1.1.
In some implementations, an interconnect is an element or component of a device or package that allows or facilitates an electrical connection between two points, elements and/or components. In some implementations, an interconnect may include a trace, a via, a pad, a pillar, a redistribution metal layer, and/or an under bump metallization (UBM) layer. In some implementations, an interconnect is an electrically conductive material that may be configured to provide an electrical path for a signal (e.g., a data signal, ground or power). An interconnect may be part of a circuit. An interconnect may include more than one element or component.
Also, it is noted that various disclosures contained herein may be described as a process that is depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be re-arranged. A process is terminated when its operations are completed.
The various features of the disclosure described herein can be implemented in different systems without departing from the disclosure. It should be noted that the foregoing aspects of the disclosure are merely examples and are not to be construed as limiting the disclosure. The description of the aspects of the present disclosure is intended to be illustrative, and not to limit the scope of the claims. As such, the present teachings can be readily applied to other types of apparatuses and many alternatives, modifications, and variations will be apparent to those skilled in the art.
