The present disclosure relates to device-to-device communication system, packages, package system, and chiplet-to-chiplet communication system for wireless chip-to-chip communications.
Various aspects of this disclosure generally may relate to the field of wireless communications.
In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the exemplary principles of the disclosure. In the following description, various aspects of the disclosure are described with reference to the following drawings, in which:
The following detailed description refers to the accompanying drawings that show, by way of illustration, exemplary details and aspects in which aspects of the present disclosure may be practiced.
Today's emerging technologies and application continue to increasingly demand or require greater computational power.
However, due to physical limits and constraints, the frequency of transistor doubling has slowed down. At the same time as the technologies involving artificial intelligence, machine learning, neuromorphic computing, data servers, cloud computing demands are greater with respect to computational performance. One approach to meet today's ever-increasing computational demand has been the integration of disaggregated resources in a single package or module. In some cases, the disaggregated resources may be a hardware component in the form of a chip (in various aspects a chip may be denoted as a chiplet). A chiplet can be a functional block in the form of an integrated circuit that can be specifically designed to work with other chiplets to form larger more complex chips. That is, chiplets can refer to the independent constituents which make up a large chip built out of multiple smaller chiplets or dice. Chiplet(s) may be provided with or without encapsulating material packaging the chiplet(s).
Devices described herein can be in the form of a multi-chip module. Multi-chip modules described herein be an electronic assembly where multiple chiplets and/or other discrete components are integrated so that in operation, the multiple chiplets can be treated as if they were a larger integrated circuit.
The integration of disaggregated resources by way of integrating chiplets in a module may provide the computational power needed for today's applications.
However, the integration of disaggregated resource poses many challenges in terms of realizing performance improvement, cost efficiency, and design flexibility. For example, the connections between the chiplets or other functional blocks in a module can provide difficulties and challenges.
To meet the computational demands for today's application, chips or modules that include any integrated multiple disaggregated resources are used. One way to increase the performance or power of a processor is to increase the number of computational elements or transistors on a processor. However, as the size of transistors has shrunk, the transistor doubling frequency has decelerated. One alternative to boost performance has been the use of chips.
As used herein, the term “chiplet” includes an integrated circuit block of a multi-chip module (MCM) or MCM devices. A chiplet can be considered as typically a sub processing unit or circuitry or a disaggregated functional resource with a specialized function that is designed to integrate with other chiplets of a same multi-chip device or module or circuitry. A chiplet may be fabricated on its own individual semiconductor die with physical dimensions that are often smaller than other chips or processors. The MCM provides interconnections of the chiplets so as to form complete electronic function(s).
In aspects of the disclosure, where appropriate, the term “die” may refer to a block of semiconductor material on which a component, e.g., a chip or chiplet is fabricated. In appropriate cases the term “die” may be used to refer to the integrated circuit fabricated from the semiconductor material (e.g., a chip, chiplet, etc.) and vice versa.
A multi-chip module or MCM can be an electronic assembly that may be a single package including multiple components or circuitries. In examples herein, an MCM can be a plurality of chiplets arranged in a single package including die-to-die interconnect schemes for connecting the chiplets. In such cases, the chiplets of an MCM can be integrated and mounted onto a unifying carrier, so that in use the MCM can be treated as if the MCM were a larger IC. The unifying carrier may be the package carrier or package carrier. The chiplets (and possibly other components) of the MCM may also share a common enclosure or encapsulation and a common integrated head spreader (IHS).
An MCM may in some cases include components other than chiplets. That is, an MCM may include integrated devices that have with their own packaging, such as, for example, Central Processing Units (CPUs), Graphical Processing Units (GPUs), Field Programmable Gate Arrays (FPGA), Digital Signal Processors (DSPs), Application-Specific Integrated Circuits (ASICs) etc. Such components with their own packaging can be arranged on a common carrier or base layer (also denoted as package carrier or board) within in relatively close proximity to each other in the MCM.
As used herein, “racks” or “rack enclosures” may be any type of equipment for housing electronic equipment. Racks house multiple types or sets of electronic equipment with an individual set of electronic equipment being housed within a single rack unit of the rack. Rack units of a rack may be stacked close together, e.g., vertically in some cases. In aspects of the present disclosure, a rack unit may contain or hold one or more circuit boards or simply “boards”. Each board can include a plurality of electronic devices, e.g., one or more multi-chip devices mounted the board. A rack may include multiple rack units in enclosed or contained in a common frame structure or chassis.
The device 100 may include a base layer or a carrier 120 (also denoted as package carrier) for mounting on which the chiplets and other components can be mounted. In some cases, the carrier 120 may be a printed circuit board (PCB) including wired connections between the components, e.g., wired connections between the chiplets and wired connections for the resources 150a-b. One or more package carriers can be arranged on another common carrier (also denoted as board).
The device 100 of
Another architectural approach for increasing computational power is the use of 2.5 dimensional (2.5 D) packages. One example of a 2.5D package is shown in the device 200 of
An interposer is an interface between connectors. The interposer may be electrically conductive, e.g. including a metal or semiconductor material. The interposer may couple connectors electromagnetically, electrically, etc. For example, an interposer can provide interconnections between and/or to the components or modules or circuitries on the same package carrier or two or more package carriers in proximity of each other (e.g., chips, chiplets, etc.), as well as the external input/outputs (I/O) through the use of through carrier vias or Through-Silicon-Vias (TSV). Interposers can be silicon interposers that have lateral dimensions larger than the chips or components they are interconnecting.
Further, 2.5D package devices may also include bridges. For example, silicon bridges are a small piece of silicon that can be embedded under the edges of two components and provide interconnections therebetween. This can allow for most chips or components to be attached in multiple dimensions and thus eliminating additional physical constraints on heterogeneous chip attachment within the theoretical limits. In other words, embedded multi-die interconnect bridge (EMIB) or bridges are essentially embedded into a standard package carrier and are used to provide high interconnect density exactly where needed, while the rest of a standard package carrier can be used for the rest of the interconnects.
Another architectural approach for improving such a device is the use of three-dimensional (3D) stacking of semiconductor devices or components. The components (e.g., chips or chiplets) can be arranged in 3 dimensions instead of 2 dimensions. This allows the components of a device or module to be placed in closer proximity to one another.
The module device 300 of
3D integration may provide improved speed between components (e.g. chiplets, chips) as average wire length becomes shorter, and thus leading to shorter propagation delay and improved overall performance. 3D heterogonous integrated devices may be built with a Manhattan-like architecture (e.g. having a plurality of skyscrapers) which includes large X-Y arrays of heterogeneous chiplets (e.g., CPU, GPU, AI, memory, etc.) and each chiplet can be positioned like in the chess board having several stacked dice.
Nevertheless, the above-mentioned technologies do not scale well for massive 3D integration because the data rate per line may only be 2 to 10 Gbps. For example, referring structure to the wired interconnection approach for the device 300, no chiplets or components other than the lower two chiplets 310d and 310h have a direct connection. Therefore, if the chiplet 310a needs to connect and communicate with the chiplet 310f, the data path 330 would have to be one that runs through the TSVs 340 of the chiplets 310b-310 on the first stack, through the EMIB 330, and then through the TSVs 340 of the chiplets 310g and 310h before arriving at the chiplet 310f. Therefore, communication between chiplets would often require the use of many connections. As more and more components are added which need to communicate with each other, the more the traffic in the TSVs, EMIBs, interposers, etc. increases. This increase in traffic presents problems in cases where high-transport data connections are needed.
For example, to create an aggregate data transport of 1 Tbps, 100 to 500 interconnect lines would be needed. While such data transports may be accomplished for communication between neighboring structure chips, it would be physically and economically unfeasible to provide such data transports for larger integrations that involve hundreds of interconnect lines between horizontally and vertically stacked chips.
Further, the cost of a silicon interposer is proportional to the area of that interposer. So, in cases needing several or many localized high-density interconnects, the costs can quickly accumulate.
In short, TSV silicon interposers are relatively expensive and do not scale well for applications that require a massive number of components e.g., chiplets. Further, wires (interconnects) that connect together chips or chiplets degrade in performance with scaling. That is, wires can dominate the performance, functionality and power consumption of ICs.
Wireless Chip-to-Chip interconnect is an approach for realizing high-speed data transport that would meet the requirements for high-performance computing products and applications. The wireless chip-to-chip (WC2C) technology can complement wired communications. WC2C can provide flexibility for high-performance computing products by enabling broadcast and multipoint-to-multipoint links with significant advantages to dynamically reconfigurable data-center networks.
The chiplets 410 can be stacked and mounted on a package carrier 420. To enable wireless connection, each chiplet 410 or component can include an antenna or antenna structure 415 and radio circuitry, e.g., transceiver circuitry 412. In addition, module 400 can include or provide wired communication between components. Similar to the module 300 of
WC2C communication may be used for dense chiplet-based products and supplement existing chip to chip communications, e.g., wired interconnections. As shown in the example of
According to aspects of the present disclosure, to implement WC2C communication, a multi-chip module such as the module 400 may implement protocols that can be divided into control plane and data plane.
The data plane carries the network data (e.g., in-module data) in accordance with the directives of the control plane. That is, the data plane performs the actual forwarding of the data according to the configuration or routing paths managed and set forth by the control plane.
In at least some cases, the data plane of WC2C communications may operate with frequencies in the 110-170 GHz D-band using CMOS circuits with economic power efficiency. For example, in some aspects, the antennas may have approximately 1 mm of spacing. As CMOS technology continues to evolve and improve, higher frequencies, the reduction of the size and spacing of antenna elements, and higher bandwidths can be realized.
Different implementations or cases can be used for providing in-package such as WC2C communication. For example, three types of communications may be used for in-package or in-module communications include, wireless extra-short reach (WXSR), wireless short reach (WSR) and wireless long reach (WLR), as summarized in
The multi-chip module 500a or simply module 500a, illustrated in
The multi-chip module 500b, illustrated in
The multi-chip module 500c, illustrated in
WC2C communication can be done for in-package links and may similarly be used for or applied to package-to-package wireless communications.
While the examples of WXSR, WSR, and the WLR communication in
The modules implementing WC2C communication can include control plane capabilities. That is, to augment the above-mentioned high-speed wireless data links or the data plane, control plane capabilities or functionalities can be included in the modules. Control plane functions implemented using wireless control signaling can establish the wireless data connections described herein. The control plane protocols can be used to establish wireless connections within a module or package and further to define routing paths for the data. For example, industry protocols, including Wi-Fi, I2C, USB, and/or other known protocols may be used.
Control plane messages or control signaling may be in the form of packets to inform other components on where to forward data or data messages. In some aspects, the control plane messages of a multi-chip module may be implemented by using frequencies that differ from the data or data plane messages to manage and configure network data or data being transmitted to and from the components of a multi-chip device. In some cases, the messages may be implemented in a package-to-package type of communication scheme. For example, as described herein, a multi-chip device may include components that have their own individual packaging. This is in contrast to a multi-chip module of chiplets which may be packaged together, e.g., the dice of the chiplets share a common package. In such cases, the multi-chip device may include wireless package-to-package communications. This is the scenario illustrated in
The control plane may manage communication not only for traffic within a multi-chip package (also denoted as in-package communication), but also may manage the communication between modules or packages (also denoted as package-to-package communication) e.g., multi-chip modules or packages. As an example, employing miniaturized antenna technologies, e.g. material loading, distributed-component loading, topology-based approach, that leverage existing integrated circuit (IC) elements, e.g. dummy silicon chiplets, integrated heat spreaders, through silicon or molding vias, and IC package substrates tuned to sub-10 GHz carrier frequencies and mated with silicon process portable radio frequency (RF) transceivers, wireless broadcastable, full-duplex control/manageability/sideband messages can be transmitted and received to/from chiplet-to-chiplet(s) within a 3D heterogeneously integrated package or from package-to-package within a product chassis.
Furthermore, the control plane may be used for facilitating board-to-board communications illustrated in
In addition,
In aspects of the present disclosure, control plane circuitry can be provided in dice of a multi-chip module and configured to provide control plane functions for wireless communication network involving devices (e.g., MCMS), dices, and packages described herein. The control plane circuitry may operate or use, as an example sub-RF carrier technology to enable point-multipoint, broadcastable, full-duplex wireless control/manageability links for various scenarios, e.g., board-board, package-package, and chiplet-to-chiplet within a package, type communications. Control signaling may be in the form of packets reflecting any suitable type of control plane protocol. The control plane circuitry may be integrated in an application-specific manner in a module. Components of the control plane circuitry such as the transceiver circuitry or the antenna structure may be integrated or incorporated with any part of a multi-chip module described herein. Further, aspects or components of the control plane circuitry such as the antenna, connections, or waveguides, may also be included or incorporated into other components holding or involving multi-chip modules, such as boards, chassis, racks, etc.
A broadcastable, full-duplex wireless messaging capability can enable a control plane communication from package-to-package and inside 3D heterogeneously integrated packages. This way, more nodes, over longer distances and higher speeds can be supported. Alternatively or in addition, a more flexible product floorplan is enabled.
According to aspects of the present disclosure, sub-10 GHz technology may be used for control signaling. Operation at sub-10 GHz can allow for process portability and easy adoption of the radio frequency (RF) transceiver and may use near-field couplers/antennas. The flexibility of an RF link can allow convenient placement and use within a product chassis, from rack-unit-to-rack-unit, and for 3D heterogeneously integrated semiconductor products. For example, in at least some aspects of the present disclosure, control signaling bit rates may be in the range of 0.5-2 Gbps over distances up to 20 cm, supporting both symmetric and asymmetric topologies. The distance may decrease with increasing frequency, e.g. for a frequency of up to about 100 GHz the distance may be in the range of about 1 cm.
For the WC2C communications, both the data plane and control plane require the use of an RF circuitry.
The radio circuitry 910 may include an RF integrated circuit (IC) 920 including one or more RF transceivers (TRX) and a common RF front end (FE) 930. The RF IC 920 may receive one or more data and control signals (also denoted as signal of the control plane of the OSI model) and operate to receive a communication signal from the baseband IC and generate an RF electrical signal from the communication signal for radio transmission from the circuitry 900 or receive an RF electrical signal and generate a communication signal from the RF electrical signal for providing to the baseband IC. The RF FE 930 may convert an RF electrical signal into a format for transmission via the antenna 940 and/or convert a signal received from the antenna 940 into an RF electrical signal for the RF IC 920.
The RF FE 930 of at least
The other components 1180 may include logic components, modulation/demodulation elements, and an interface circuitry for interfacing with another component.
DFE (digital front end) components 1180 may include any suitable number and/or type of components configured to perform functions known to be associated with digital front ends. This may include digital processing circuitry, portions of processing circuitry, one or more portions of an on-board chiplet having dedicated digital front-end functionality (e.g., a digital signal processor), etc. The DFE components 1180 may selectively perform specific functions based upon the operating mode of the radio circuitry 910 and, for example, may facilitate beamforming. Digital front-end components may also include other components associated with data transmission such as, for instance, transmitter impairment correction such as LO correction, DC offset correction, IQ imbalance correction, and ADC skew, digital pre-distortion (DPD) calculation, correction factor (CF) calculation, and pre-emphasis (pre. emp.) calculation. To provide additional examples, the digital front end components 1180 may facilitate or perform receiver or transmitter digital gain control (DGC), up-sampling, down-sampling, zero crossing detection algorithms, phase modulation, perform beam management, digital blocker cancellation, received signal strength indicator (RSSI) measurements, DPD and calibration accelerators, test signal generation, etc.
In at least one example, the transceiver chain (of the RF IC 920) can include a receive signal path which may include mixer circuitry 1110, amplifier circuitry 1140 and filter circuitry 1130. In some aspects, the transmit signal path of the transceiver chain 920 may include filter circuitry 1130 and mixer circuitry 1110. The transceiver chain 920 may also include synthesizer circuitry 1120 for synthesizing a frequency signal for use by the mixer circuitry 1110 of the receive signal path and the transmit signal path. In some aspects, the mixer circuitry 1110 of the receive signal path may be configured to down-convert RF signals received from the RF FE 930 based on the synthesized frequency provided by synthesizer circuitry 1120.
In some aspects, the output baseband signals and the input baseband signals may be digital baseband signals. In such aspects, the radio circuitry 910 may include analog-to-digital converter (ADC) 1150 and digital-to-analog converter (DAC) circuitry 1160.
In at least one example, the transceiver chain 920 may also include a transmit signal path (Tx path) which may include circuitry to up-convert baseband signals provided by e.g., a modem and provide RF output signals to the RF FE 930 for transmission. In some aspects, the receive signal path may include mixer circuitry 1110, amplifier circuitry 1140 and filter circuitry 1130. In some aspects, the transmit signal path of the RFIC 920 may include filter circuitry 1130 and mixer circuitry 1110. The RFIC 920 may include synthesizer circuitry 1120 for synthesizing a frequency signal for use by the mixer circuitry 1110 of the receive signal path and the transmit signal path. The mixer circuitry 1110 of the receive signal path may be configured to down-convert RF signals received from the RF FE 930 based on the synthesized frequency provided by synthesizer circuitry 1120.
In various aspects, amplifier circuitry 1140 may be configured to amplify the down-converted signals and filter circuitry may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to another component for further processing. In some aspects, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement.
The mixer circuitry 1110 for a receive signal path may include passive mixers, although the scope of this disclosure is not limited in this respect. In some aspects, the mixer circuitry 1110 for a transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 1120 to generate RF output signals for the RF FE 930.
In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 of the transmit signal path may include two or more mixers and may be arranged for quadrature down conversion and up conversion, respectively. In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 may be arranged for direct down conversion and direct up conversion, respectively. In some aspects, the mixer circuitry 1110 of the receive signal path and the mixer circuitry 1110 of the transmit signal path may be configured for super-heterodyne operation.
In some aspects, the synthesizer circuitry 1120 may be a fractional-N synthesizer or a fractional N/N+1 synthesizer, although the scope of the aspects is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 1120 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.
The synthesizer circuitry 1120 may be configured to synthesize an output frequency for use by the mixer circuitry 1110 of the radio circuitry 1120 based on a frequency input and a divider control input. In some aspects, the synthesizer circuitry 1120 may be a fractional N/N+1 synthesizer.
In some aspects, frequency input may be provided by a voltage-controlled oscillator (VCO), although that is not a requirement. In various cases, divider control input may be provided by a processing component of the RFIC 920, or may be provided by any suitable component. In some aspects, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by external component.
In some aspects, synthesizer circuitry 1120 of the RFIC 920 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some aspects, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA). In some aspects, the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry out) to provide a fractional division ratio. In some aspects, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip-flop. The delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
In some aspects, synthesizer circuitry 1120 may be configured to generate a carrier frequency as the output frequency, while in other aspects, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some aspects, the output frequency may be a LO frequency (fLO). In some aspects, the RFIC 920 may include an IQ/polar converter.
The antenna 940, illustrated in
In other cases, the antenna 940 may be one or more antennas to be used as transmit and receive antennas. In such cases, the RF FE 930 may include, for example, a duplexer, to separate transmitted signals from received signals.
While the transceivers described herein include traditional super-heterodyning schemes or architectures, other type of transceiver or transmitter architectures and schemes may be used. In some aspects, the transceiver chain of the RFIC 920 may include components so as to implement a near zero IF scheme, a Direct Conversion scheme, or a digital transmission schemes, such as, for example, a Digital IQ transmission, a Digital Polar transmission, and the like.
In one example, the transceiver chain of the RFIC 920 may include a transmit path that includes or implements a direct digital transmitter (DDT). That is, in one simple example, a DDT may include a digital signal processor, a RF digital-to-analog converter (RFDAC), a RF filter/antenna coupler.
Further, a DDT may be implemented with or without an IQ-mixer. In general, a RF-DAC may be included on a RFIC to convert digital input into a RF signal. A DDT may include other digital components such as numerically controlled oscillator (NCO) and digital mixers for shifting an input signal to desired frequency. The use of a DDT can reduce the number of analog components needed in the transmitter or transmit path. For example, an analog LOs, analog filters, analog mixers, and etc., may be eliminated from the RFIC when a direct digital transmitter such as DDT is employed. Further, the use of a digital transmitter or digital transmission schemes such may bring structure energy savings and efficiencies.
In various aspects, a wireless device-to-device communication system 1300 includes at least a first device 1302 and a second device 1304 (in the example of
In various aspects, a device may be a die or a chiplet and the communication system 1300 may be an in-package communication system 1300. The devices may be formed on the same carrier in an in-package communication system 1300. Hence, the carrier may be denoted as package carrier. The package carrier may be a semiconductor carrier, including compound semiconductor material, or may be a printed circuit board (PCB). As example, the carrier may include silicon, e.g. may be a silicon carrier. As an alternative, the package carrier may include gallium arsenide or gallium nitride or silicon germanium, e.g. may be a gallium arsenide carrier or a gallium nitride carrier or a silicon germanium carrier. Any other suitable semiconductor material may be used in various implementations.
Alternatively, the device may be a package and the communication system 1300 may be, in general, a package-to-package communication system 1300. The packages may be formed on a common carrier or different carriers in a package-to-package communication system. However, the package-to-package communication system may be a package-to-package communication system, a board-to-board communication system or a rack unit-to-rack unit communication system, etc., as an example.
However, in various aspects, a first die and a second die of a first package may be wirelessly communicatively coupled, and, in addition, the first package may be wirelessly communicatively coupled to a second package. The antenna(s) used for the wireless communication between the first die and the second die may be the same as the antenna(s) of the first package used in the communication with the second package.
The different aspects described in the following can be applied on different devices and communication systems of including these devices depending on the application. The communication system according to various aspects may be configured to send or receive wireless radio frequency control signals associated with wireless radio frequency data signals of a stationary device, e.g. a server rack, a base station; or a mobile terminal, e.g. a smartphone, tablet or laptop. Illustratively, the wirelessly coupled devices are connected with each other without using a wiring structure as a radio frequency signal interface, but instead using one or more antenna(s) for forming the radio frequency signal interface according to various aspects.
A package may include one more dies arranged on a common package carrier and wirelessly communicating with each other via wireless in-package communication. At least a first package and a second package of a rack unit, a rack or another device can wirelessly communicate with each other via wireless package-to-package communication.
In in-package communication, at least a first die and a second die of the package may be wirelessly communicatively coupled to each other within the package according to various aspects described below. The control signals exchanged between the first die and the second die of the package may be associated to data of the control plane of the Open Systems Interconnection (OSI)-model required to establish, maintain or end an interconnection between the first die and the second die of the package of the data plane of the OSI-model.
In package-to-package communication, at least a first package and a second package may be wirelessly communicatively coupled to each other according to various aspects described below. The control signals exchanged between the first package and the second package may be associated to data of the control plane of the Open Systems Interconnection (OSI)-model required to establish, maintain or end an interconnection between the first package and the second package of the data plane of the OSI-model.
Currently, control, manageability and sideband messaging are transmitted through wired fabrics in in-package communication systems or over wired busses in package-to-package (pkg-pkg) communication systems that are often limited in electrical loading (# of nodes), distance and speed.
In various aspects, a broadcastable, full-duplex wireless communication system is provided for a control plane of the OSI-model for package-to-package communication and in-package communication of 3D heterogeneously integrated packages.
According to various aspects, more nodes, wireless signal transmission over longer distances and higher data transmission rates are supported. Alternatively or in addition, a more flexible product floorplan is enabled.
The device-to-device communication system according to various aspects utilizes miniaturized antenna technologies, e.g. material loading, distributed-component loading, topology-based approach), that leverages existing integrated circuit (IC) elements, e.g. dummy silicon chiplets, integrated heat spreaders, through silicon or molding TSVs, and IC package carriers tuned to sub-10 GHz carrier frequencies, mated with silicon process portable radio frequency (RF) transceivers. This way, wireless broadcastable, full-duplex control/manageability/sideband messages can be transmitted and received to/from chiplet-chiplet(s) within a 3D heterogeneously integrated package or from package-to-package within a product chassis. Thus, utilizing simple RF transceiver architectures and leveraging existing IC elements, can be efficient, inexpensive, technology portable and thus easily adopted by the semiconductor industry. This way, increased product floorplan flexibility thermal and mechanical constraints are addressed, costs are reduced and time to market is shortened. Illustratively, point-to-multi-point broadcastable control messaging is brought to products and systems for more intelligent device management. Off-chip sideband signals for more product functionality are potentially re-purposed. Thus, utilizing simple RF transceiver architectures and leveraging existing IC elements, can be efficient, inexpensive, technology portable and thus easily adopted by the semiconductor industry.
As shown in
In various aspects, wireless broadcastable and full-duplex control/manageability/sideband communication systems are described in more detail in the following. In various aspects, integrated antenna technologies operating with sub-GHz carrier frequencies and approximately 500 MHz bandwidth providing point-to-multi-point broadcastable RF channels between chips/chiplets within a package and between IC packages on printed circuit boards within systems are provided.
In various aspects, antenna integrated package/Patch (z+) and copper pillar/ball (end-fire) antennas integrated into the package are provided.
In various aspects, antennas on dummy silicon for In-package Wireless chip-to-chip (WC2C) Communications is provided.
In various aspects, a new edge antenna topologies/Leveraging Carrier Corners is provided.
In various aspects, integrated surface waveguide on metallic chassis for wireless package-to-package communication is provided.
In various aspects, short-range, full-duplex wireless coupler for 3-dimensional chip-to-chip communications is provided.
In various aspects, a network topology that support symmetrical configuration 1510 and asymmetrical configuration 1520 for Initiator network nodes 1502 and Target network nodes 1504 is provided. As an example, a wireless broadcastable communication system capability may support network configurations that meet or exceed those historically supported by a wired interconnect, such as symmetrical communication 1510 and asymmetrical communication 1520 as shown in
Therefore, for full-duplex communication (simultaneous transmit and receive), each node in the network (i.e. chip/chiplet or IC package) can have two antenna channels, one for transmitting data and one for receiving data, which can occur simultaneously if operating with sufficient frequency separation.
Optionally, a low power receiver channel can be implemented to detect traffic on either of the channels in the network. In such a network, a node would be identified as an Initiator to configure the network and start communication and the rest would identify as Targets that would receive the broadcasted wireless messages. Each node could be reconfigured to identify as either Initiator or Target role, based on its function to enable system flexibility.
In various aspects, a device-to-device communication system may be provided. The device-to-device communication system may include a first device and a second device. Each of the first device and the second device may include an antenna, a radio frequency frond-end circuit, and a baseband circuit. Each of the first device and the second device may be at least one of a chiplet or a package. The device-to-device communication system further may include a cover structure housing the first device and the second device. Each of the first device and the second device may be at least one of a chiplet or a package. The device-to-device communication system further may include a radio frequency signal interface wirelessly communicatively coupling the first device and the second device. The radio frequency signal interface may include the first antenna and the second antenna.
In various aspects, the device-to-device communication system further may include a carrier. The first device and the second device may be arranged on the (same) carrier. The carrier may be a printed circuit board. Alternatively, the carrier may include a semiconductor material. The semiconductor material may include silicon or gallium nitride, for example.
Each of the first device and the second device may be a package and the device-to-device communication system may be a package-to-package communication system. Alternatively, each of the first device and the second device may be a chiplet and the device-to-device communication system may be a chiplet-to-chiplet communication system.
The first antenna and the second antenna may be configured for RF signals having a carrier frequency below 10 GHz;
Each of the first device and the second device may be configured for full-duplex communication.
The first device and the second device may be stacked over each other.
The communication system may include a plurality of devices, the plurality of devices including the first device and the second device. The plurality of devices may be arranged in at least a first stack of devices and a second stack of devices adjacent to the first stack. The first device may be arranged in the first stack and the second device may be arranged in the second stack.
A conventional custom application specific integrated circuit (ASIC) is usually configured for various artificial intelligence (AI) loads that require flexible communication topologies between each node (i.e. fully connected, cube, hybrid mesh, etc.). Similar to a human brain, there are major benefits for having the neural nodes connected in 3 dimensions, e.g. being able to support more advanced neural networks, better performance, etc.
Although in transversal plane (xy-plane) communications can be routed planar inside a PCB using traces, to establish the communication links in the 3rd dimension (Z) involves some sort of the electrical connectors for wired communications. The connector physical size and routing layout rules pose a limitation on how many AI nodes can be packed inside a given volume when these nodes need to be connected in three dimensions. Furthermore, even for a simpler case of planar routing using PCB traces for X and Y package-to-package communication links have limitations since these systems require many hundreds to thousands of compute nodes. The complex power delivery needs make signal routing a challenge, necessitating increased PCB layer counts and thus cost.
Illustratively, conventional solutions focused on signal input/output (I/O) routing from the package second level interconnect (SLI), e.g. balls, lands, pins, to another package SLI using traces on the PCB and with and without connectors. A disadvantage of the wired solutions of the related art include that the wired solutions do not provide simple package-to-package communication links in the Z direction (vertical direction of the package). Usually, in such a case, a connector is required which can cause signal degradation and can also make mechanical and thermal solutions more challenging. For example, added connectors make the assembly of the system much more complicated and thus increases the overall system cost. In addition, the presence of the connectors creates additional obstructions to air flow and impacts thermal management of these nodes. Since the conventional solutions require physical connections, the conventional solutions cannot be easily changed afterwards for different network topologies between the nodes, e.g. from fully connected to mesh cube. Traces on the PCB in the related art makes scaling of the system challenging since the number of nodes is increased by the nodes. With an increase in number of nodes, the power delivery system becomes more complicated, and does not leave enough room for signal routing.
Thus, in various aspects, a single or multi-body antenna is provided to make a conformal antenna array that can provide wireless communication links in three dimensions, e.g. using organic package compatible manufacturing structure techniques. It is to be noted that the above-described exemplary device-to-device communication system can be implemented as a package-to-package communication system. However, the package-to-package communication system as described in the following may be implemented in a higher level architecture in various aspects, e.g. a board-to-board or rack unit-to-rack unit communication system. As such, the package-to-package communication system as described in the following is only exemplary for illustration. It is further noted that various described aspects can co-exist with traditional wire-based routing techniques to increase data bandwidth or to provide sideband communication channels.
In various aspects, one package 1600 includes one or more different dice 1614, 1616. By way of example, a compute die 1614 (illustrated in
In various aspects, one or more antenna(s) 1, 2, 3 may be arranged on or integrated in the package carrier 1612. The at least one antenna 1, 2, 3 on or in the package carrier 1612 may be at least one of a broadside antenna 1, a diagonal directional antenna 2 or an edge antenna 3. In various aspects, the antenna of the package carrier 1612 may be an edge antenna 3 arranged off-center, e.g., at an edge of the package carrier 1612, as described in more detail below.
In various aspects, a multi-antenna devices may include multiple single feed antenna circuits. Each antenna circuit may be configured to operate within at least one of a distinct frequency range or angular distribution. For example, a first antenna circuit may operate within a low band (LB) frequency range (e.g., a 5 gigahertz (GHz) band), a second antenna circuit may operate within a high band (HB) frequency range (e.g., a 7 GHz band), and a third antenna circuit may operate within an ultra-high band (UHB) frequency range (e.g., a 10 GHz band). Alternatively or in addition, a first antenna circuit may operate within a broadside angular distribution from about −45° to about +45° to the normal of the package carrier, a second antenna circuit may operate within diagonal directional angular distribution between the normal of the package carrier 1612 and a direction perpendicular to the normal of the package carrier 1612, and a third antenna circuit may operate within an edge fire angular distribution in a range from about −45° to about +45° in a direction perpendicular to the normal of the package carrier 1612.
In other words, a package 1600 including a plurality of different antennas 1, 2, 3 is provided in various aspect. The plurality of antennas 1, 2, 3 may be manufactured with organic package processes. This way, a conformal antenna array can be provided for wireless package-to-package communications in 1, 2, or 3 dimensions. Because the package-to-package links are wireless, this makes the PCB layout process simpler and cheaper. In addition, wireless links can allow for dynamic network topology modifications to support different workloads. Furthermore, this approach reduces the need of using complex and expensive connectors to provide z-direction package-to-package communications.
The antenna carrier 1622 can be attached to the package carrier 1612 using, e.g., a ball grid array (BGA) 1632 or a solder-charge element, in various aspects. The one or more antenna(s) 1, 2, 3 of the antenna carrier 1622 can be coupled to the one or more dice 1614, 1616 on the package carrier 1612 using a via 1634, e.g. a TMV or a TSV. The one or more dice can be coupled using at least one (1638) of a BGA, a solder bump, or land arranged between a surface of the package carrier 1612 and the die 1614, 1616. The die 1612, 1614 may be coupled to the via coupling the die to an antenna (the via can also be denoted as antenna port) through a feed line 1618. The feed line 1618 may be embedded in the package carrier 1612. The package 1600 may be configured to be coupled to a board, e.g., using a BGA 1636.
At least a first package and a second package can be arrange on a common carrier 1702 (also denoted as board). Thus, the package-to-package communication system illustrated in
In various aspects, each of the packages 1600 can have a plurality of antennas 1, 2, 3, This way, inter-package wireless communication links 1702, 1704, 1706 can be provided. In addition, packages 1600 can have antennas 1, 2, 3 on or in at least one of the package carriers 1612 or the antenna carrier 1622. A combination of package carrier 1612 and antenna carrier 1622 can be assembled into one package 1600 to form a package 1600 having different antennas with different stack-up. This way, more flexibility in floor planning is provided, as an example.
For example, to provide normal to package (z-direction) communication 1702, a broadside antenna 1 can be used. A broadside antenna can be configured as a patch coupler antenna in an antenna carrier 1622 (also denoted as interposer board). The broadside antenna 1 can be integrated into the package 1600 using standard package-on-package (POP) techniques. In various aspects, one or more broadside antenna(s) 1, e.g. tuned for various frequencies, can be arranged on the antenna carrier 1622. Thus, at least one of data bandwidth increase latency decrease can be enabled. A broadside antenna 1 can be tuned for different frequencies, for example, by at least one of controlling the antenna carrier 1622 stack up or the patch geometry of the broadside antenna 1.
In addition to the antenna 1, 2, 3 including metallic structures built into the antenna carrier 1622, the POP interconnects, e.g. as top side balls or copper pillars, can be part of the antennas 1, 2, 3. This way, antenna performance can be improved.
In various aspects, a diagonal directional antenna 2 of a package may be configured as an inverted F-antenna (IFA) or a planar IFA (PIFA). This way, diagonal radiation patterns may be provided. Thus, diagonal package-to-package communications may be enabled.
In various aspects, a diagonal package-to-package communications may be enabled by a combination of an end-fire antenna 3 and a broadside antenna 1 in a phased array.
In various aspects, planar parts of at least one of an IFA antenna 2 or PIFA antenna 2 may be formed by using the metal planes in at least one of the antenna carrier 1622 or the package carrier 1612, illustrated in
In various aspects, the antenna carrier 1622 can be at least one of a PCB-based antenna carrier 1622 or an organic carrier board. The antenna carrier 1622 can enable a wider variety of antenna layouts and customization without suffering structure from the organic carrier manufacturing structure challenges. In addition, the antenna carrier 1622 can include one or more pieces. For example, the broadside antenna 1 can be located on a different piece of the antenna carrier 1622 than the diagonal antenna 2. This way, different stack-ups to form these antenna structures are enabled. In various aspects, a package 1600 including an antenna carrier 1622 having one or more antennas 1, 2, 3 can enable multiple package configurations for different antennas. For example, the broadside antenna 1 for adjacent packages can be configured to work at different frequencies to improve performance, for example, a better isolation between the z-direction wireless links.
In various aspects, for applications in which a long radiating antenna is required, e.g. longer than what might be possible using POP level interconnects such as balls or copper pillars, holes in at least one of the antenna carrier 1622 or package carrier 1612 may enable to insert radiating components after mounting the antenna carrier 1622 on the package carrier 1612. For example, copper rods can be used as the radiating components of the IFA or PIFA of the package 1600.
In various aspects, the interspace between the antenna carrier 1622 and the package carrier 1612 may be filled with at least one of an underfill, a mold or an air. Alternatively or in addition, a dielectric material, such as a magneto-dielectric material, may at least partially fill the interspace or may be arranged near the radiating components to increase antenna gains and/or bandwidths.
If active integrated circuits and/or passive circuits, e.g. resistive, capacitive, and inductive components, are needed for proper antenna operation, these circuits can be arranged on the surface of the package carrier 1612 facing away from the antenna carrier 1622, or can be embedded in the package carrier 1612, or can be arranged in the interspace between the package carrier 1612 and the antenna carrier 1622, can be embedded in the antenna carrier 1622 or on a surface of the antenna carrier 1622 facing away from the package carrier 1612.
In various aspects, one or more antenna(s) 1, 2, 3 of the plurality of antennas of the package 1600 include a part of one or more redistribution layer(s) (RDL).
The package 1600 further includes one or more antennas 1, 2, 3 on or in a second carrier (also denoted as antenna carrier 1622). The one or more antennas 1, 2, 3 may be any one of the antennas 1, 2, 3 as described above. The second carrier 1622 includes two parallel main processing sides. A radio frequency feed port 2004 can be formed on a first of the two parallel main processing sides of the second carrier 1622. The one or more antennas 1, 2, 3 can be formed at a second main processing side of the two parallel main processing sides.
The first main processing side of the first carrier 1612 may be facing the first main processing side of the second carrier 1622.
The package 1600 further includes a radio frequency signal interface 2027. The radio frequency signal interface 2027 includes the antenna feed port 2002 coupled to the radio frequency feed port 2004. Illustratively, the radio frequency signal interface 2027 may be the communicative connection of the at least one die 1614 on the package carrier 1612 with at least one antenna 1, 2, 3 on the second carrier 1622.
At least one of the antenna feed port 2002 or the radio frequency feed port 2004 may include a ball grid array or a solder-charge element 2006. In other words, the radio frequency signal interface 2027 includes a ball grid array or a solder-charge element in various aspects.
The one or more antennas 1, 2, 3 may be coupled to the radio frequency feed port 2004 through a via 2016, e.g. a TSV or a TMV. The via 2016 may extend from the first main processing side of the second carrier 1622 to the second main processing side of the second carrier 1622.
At least one of the first carrier 1612 and second carrier 1622 may include a printed circuit board.
In various aspects, the one or more antennas 1, 2, 3 may be configured as a broadside antenna 1, as described above.
The first carrier 1612 may include a further antenna feed port and the second carrier 1622 may include a further radio frequency feed port formed on the first main processing side of the second carrier 1622 and a further antenna formed on a second main processing side of the second carrier 1622. A further radio frequency signal interface may include the further antenna feed port coupled to the further radio frequency feed port. The further antenna may have a different main radio frequency propagation direction than the antenna, as described above.
The antennas 1, 2, 3 may be connected through different line feeds with the antenna feed ports. Line feeds may be embedded in the first carrier 1612 (see
The one or more antennas 1, 2, 3 may be configured as a directional antenna. The further antenna may be configured as a diagonal directional antenna 2.
The first carrier 1612 may further include a radio frequency integrated circuit RFIC 1616 on the first carrier 1612.
The chip 1614 may include a first side facing the first side of the first carrier 1612 and the first carrier 1612 may include a line feed coupled to the first side of the chip 2002. The line feed may be coupled the antenna feed port 2002.
In various aspects, the first carrier 1612 may include an integrated antenna connected to the chip 1614, the integrated antenna being integrated in the first carrier 1612. The integrated antenna may be configured as an end-fire antenna 3, as an example. The end-fire antenna 3 may be arranged at an edge of the first carrier 1612 (see
In various aspects, the antenna may be configured as a directional antenna for radio frequency signals in a frequency range from about 5 GHz to about 25 GHz, e.g. having a frequency in the sub-10 GHz range.
In various aspects, a package-to-package planar system may include a first package 1600 and a second package 1600 each configured according to a described aspect. The first package 1600 and the second package 1600 may be communicatively coupled by at least one antenna 1, 2, 3 of each of the first package 1600 and the second package 1600. The first package 1600 and the second package 1600 may be arranged so that the second main processing sides of the second carriers 1622 of the first package 1600 and the second package 1600 may be arranged in at least one of facing each other, in a common plane or diagonally displaced, as illustrated in
Chip products using 3D heterogeneous integrating technologies are expected to provide performance improvement, cost efficiency, and layout flexibility, compared to monolithic integration. However, they face interconnect challenges, e.g. tangled wires and challenging to support point-to-multipoint communications.
Further, it is extremely challenging for electromagnetic waves to penetrate silicon dice unless the silicon conductivity is low (<1 S/m).
However, many silicon integrated circuit technologies use a higher conductivity than 1 S/m. By way of example, using silicon having a higher conductivity, silicon acts like a reflector at sub-10-GHz range (
Further, wireline interconnects of the related art, such as silicon interposers and embedded multi-die interconnect bridge (EMIB) do not offer flexible chiplet topologies or broadcastable, point-to-multipoint data communication system.
Further, conventional wireless point-to-point links via silicon antennas, that do not consider silicon conductivity to improve antenna radiation performance and use micro-bump antennas, experience poor communication link response and narrow operational bandwidth, resulting in low throughput.
Hence, in various aspects, leveraging “dummy” silicon dice is used to address the wireless chip-to-chip antenna challenges using high conductivity silicon (>1 S/m). In other words, the wireless communication system according to various aspects provide performance improvement, cost efficiency, and layout flexibility compared to a monolithic integration. Heterogeneous chiplets with different sizes and profiles are used. Thus, in addition, “dummy” silicon dice may further be used to meet mechanical and thermal requirements.
Thus, in various aspects, the dummy silicon dice are facilitated as a silicon antenna carrier for in-package WC2C to leverage communications by creating a radiating structure on the dummy silicon die surface and/or creating a through-silicone-via (TSV) antenna structure inside a dummy silicon die or silicon-based package.
Alternatively, in various aspects, a dummy silicon itself may be driven as a dielectric antenna. The conductivity of the antenna silicon (also denoted as dummy silicon) may be different from other silicon with circuits in order to improve antenna radiation efficiency.
This way, narrow bandwidth and poor link performance issues of WC2C antennas of the related art can be overcome. Alternatively or in addition, broadcastable, point-to-multipoint data communication systems are enabled. Alternatively or in addition, excessive complexity and topological limitations of wired interconnect solutions of the related art are addressed. Alternatively or in addition, flexible floor planning of 3D-integrated products to alleviate thermal/mechanical constraints are addressed and time-to-market is reduced. Alternatively or in addition, cost and latency may be reduced. Alternatively or in addition, antenna footprint space on higher-technology chiplets is not taken. Alternatively or in addition, various layout rules that are imposed on higher-technology chiplets are not implied.
Potential channels, e.g. as waveguide structure for radio frequency signals, can be considered for in-package or package-to-package wireless chiplet-to chiplet or chip-to-chip communications, as an example, in at least one of a package channel, a silicon channel, a TIM channel, or a mold channel.
A silicon channel may demand low-conductivity silicon for wireless signals to penetrate the silicon carrier as illustrated in
In various aspects, the mold channel between the silicon package carrier 1612 and the IHS 2208 may act as a waveguide structure for RF signals. The cut-off frequency of the mold channel may be in the mmW band. The mold channel may be used to address various control-plane and data-plane communications in wireless chip-to-chip communications in various aspects.
The area of base die is larger than or equal area of sum of heterogeneous dies 2302, 2304, but may be is smaller than area of package 2306. The base die may be made from monolithic silicon and may be located between heterogenous dies/chiplets and package.
Furthermore,
In other words, in various aspects, dummy silicon 2502 as a silicon antenna 2508 carrier for in-package WC2C may leverage communications at least by one of creating radiating structure on the silicon die surface or creating a through-silicone-via antenna structure inside the dummy die 2502. Alternatively, the dummy silicon 2502 itself can also be driven as a dielectric antenna 2508. This way, sophisticated antenna structures may be created to enhance antenna bandwidth and radiation performance when through-mold-via technologies are used together. The conductivity of the antenna 2508 silicon may be different from other silicon with circuits in order to improve radiation efficiency of the silicon antenna 2508. The dummy die 2502 with lower conductivity may also be used for creating wireless channels.
The first die 2606 and the second die 2608 may be arranged on a same side of the package carrier 2602.
In various aspects, a base die may be arranged between the dies 2606, 2614, 2608 and the package carrier 2602.
The dummy die structure 2614 may be configured as a radio frequency waveguide structure to guide radio frequency signals between the first die 2606 and the second die 2608.
The dummy die structure 2614 may have a conductivity of about 1 S/m or less.
The dummy die structure 2614 may be configured as a radio frequency reflector for the RF signal to be transmitted through the radio frequency signal interface.
In various aspects, at least one antenna 2610 may be arranged on the at least one dummy die structure 2614. Alternatively or in addition, the dummy die structure 2614 may be configured as a package-input-output interface (e.g. as an antenna) of the package 2600.
In various aspects, the at least one antenna 2610 may be arranged (vertically) between the dummy die structure 2614 and the package carrier 2602, between the dummy die structure 2614 and a base die (not illustrated), between a base die (not illustrated) and the package carrier 2602, or may be exposed on the dummy die structure 2614 (illustrated in
In various aspects, the radio frequency signal interface 2627 may be an in-package radio frequency signal interface.
In various aspects, the package carrier 2602 may include a semiconductor material. As an example, the semiconductor material may include or be a silicon material. In various aspects, the package carrier may be or may include the base die.
The dummy die structure 2614 may include or be silicon.
Usually, planar antennas on a carrier, such as a patch antenna, a PIFA, a planar dipole, and a slot antenna are used in wireless communication such as cell phone, wireless mouse, and wireless display. One of the biggest challenges of such a planar antenna is that it take a lot of space on a package PCB. By way of example, it can be very difficult to scale when multiple of planar antennas are required to cover a wide angular communication range. In addition, planar antennas may not work well with the presence of a package ground plane (also denoted as package ground plane or package board ground plane). Thus, wired interconnections among packages can impose significant challenges on interconnection count scalability. When the interconnection counts increases, the package size must grow to meet the routing demands for any additional interconnection, and hence results in high routing complexity, high crosstalk, high latency, and high cost directly. In addition, in wired solutions of the related art, point-to-multipoint communications without “tangled” wires may not be possible.
However, a planar antenna 2804 of a package 2800 such as the one shown in
For various applications, the planar antenna 2804 may not be ideal for package-to-package wireless communication. By way of example, the planar antenna 2804 can often take a lot of space on a package carrier that may be already overcrowded. Hence, required ground plane cut-outs in the related art may even further complicate carrier trace routing.
Thus, in various aspects, one or more edges of the package or package carrier can be used to form a dual loop antenna as illustrated in
The carrier is illustrated as ground plane GND in
As illustrated in
Illustratively, in various aspects, TSVs, a strip, and a side ground plane may be used to form a package edge dual loop antenna which may enable both horizontal and vertical polarization. This may provide strong near field communication while supporting far field communication with the vertical polarization. The antenna 3000 may serially load the antenna 3000 with both resistively and capacitively using embedded resistor and capacitor to extend the bandwidth and to further reduce the overall size of the antenna 3000 and broaden the impedance bandwidth. This way, almost no space on the package carrier may be taken and the package may be easily manufactured. Further, wide band allows high data rates for a package-to-package interconnect. Further, long communication distance may enable interconnect throughout many system types, e.g. small—large client devices and small server units.
In other words, a package including vertically polarized antennas 3000 along the edge of the package may be provided in various aspects. Those antennas 3000 may utilize exposed TSVs along the package edges as main radiation elements. Also, package edge antennas may use of a package ground plane as part of impedance matching network to achieve higher bandwidth and angular coverage. Package edge antennas according to various aspects can be are electrically small by proper loading S, as described in more detail below. Hence, the antenna(s) 3000 require(s) about no additional space on the package carrier of the package. In various aspects, there can be placed as many as 4 antennas on a single package. Therefore, channel counts can be increased, the angular coverage can be expanded and higher frequency diversity to mitigate the interference can be promoted.
The package edge radiated dual loop antenna 3000 may be placed along the edge of a package as illustrated in
The “Feeding”, “Shorting”, and “Loading” pins implemented as feeding via(s) 3102, shorting via(s) 3104, and loading via(s) 3106, respectively, e.g. TSVs, may be all exposed at the edge of the package. Depending on the package carrier, interposer, organic package stack-up, etc. all the TSVs may be either PTH TSVs or stacked micro-TSVs or a combination thereof. Furthermore, the vias or TSVs 3102, 3104, 3106 may be constructed by other means, such as placing pins and/or growing copper pillars. The resistor and capacitors may be embedded in an interlayer of the package carrier. Alternatively, the resistor 3108 and capacitors 3110 may be surface mounted on the top surface of the package. The antenna 3000 may be connected to a transceiver through a strip line as illustrated in
In various aspects, the vertically polarized antenna has an omnidirectional radiation pattern on azimuth plane. Due to the finite ground plane, the pattern can be skewed. To have a wider angular coverage, the size of the ground plane may be configured to reduce the pattern skew.
To evaluate the link performance of the package edge radiated dual loop antenna layout in an enclosed environment formed by a package board and a chassis, 8 GHz package edge antennas may be configured and simulated in a set up as illustrated in
The edge surface 3608 may be a first edge surface and the package carrier 3602 may further include at least a second edge surface. A second antenna may be arranged on the second edge surface. Each of the first antenna and the second antenna may be configured as vertically polarized antennas. The first antenna and the second antenna may be vertically polarized antennas configured to include at least one of different polarizations or propagation directions.
The first antenna 3612 may be arranged along the edge surface 3608.
A third antenna 3629 may be arranged on or above the planar surface 3604. The first antenna 3612 and the third antenna 3629 may be configured to include at least one of different polarizations or propagation directions.
The first antenna 3612 may include one or more TSVs as main radiation elements.
The package carrier 3602 can include a ground plane. The first antenna 3612 can be coupled to the ground plane.
The first antenna 3612 may be configured as a directional antenna.
The first antenna 3612 may be configured for near/field communication and for far/field communication.
Usually, wireline interconnects, such as silicon interposers and embedded multi-die interconnect bridge (EMIB) are used for connecting chips. However, wireline interconnect lacks the flexibility of broadcasting and multi-drop. Further, directive wireless communication using phase array or other beamforming network (BFN) are used for device-to-device communication. However, phase array or other BFN may lead to higher power consumption, larger package area, and higher cost.
Further, a wireless channel between packages (also denotes as package-to-package communication) is susceptible to multiple reflections between a cover and a package carrier or a board PCB of the package. Free space path loss decay rate can also be significant (1/r2) and even more at near field distances (˜1/r3).
Besides the path loss, the received signal strength can be angular dependent due to the multi-path nature of the communication channel. The phase of the received signal can be prone to error which requires more equalization taps to correct and, thus, resulting in higher latency.
To address the problems imposed by the multipath, in various aspects, RF signals (also denoted as RF energy) are coupled to a cover of a package in the form of surface wave energy that is bound to a surface of the cover. The surface of the cover may be a film that may be glued or coated to the surface of the cover for example. The surface wave power decay is also proportional to 1/r, thus creating a lower loss channel. A metal pattern attached to the surface of the cover may be selectively chosen to lower the surface impedance in the surface waveguide (SWG) region while the surround medium has a higher impedance. The electric fields thus can propagate mainly in the SWG region.
Coupling from the package to the SWG may be accomplished with a mode transformer that converts the radiated near field RF signals from the package edge to a surface wave mode.
Further, the electromagnetic wave bound to the SWG region may create an RF signal channel that is more immune to multipath reflection and less phase error may be introduced. Further, transmission distance of RF signals may be increased. Consequently, less equalization taps and power may be required for RF communications. Thus, the decoding can be significantly simplified as well as the latency can be greatly improved.
Hence, compared to the wired solution, various aspects provide multidrop and broadcasting of RF signals. Hence flexible floor planning for package placement is offered. Further, no additional space on package is required and hence low cost. Further, no direct current (DC) power consumption and wide band is required.
In other words, the cover 3708 can include an integrated surface waveguide for package-to-package wireless communication. In various aspects, a surface waveguide (SWG) can include package antennas (also denoted as antennas). The SWG can be formed by a patterned thin film and a metallic cover. The electromagnetic wave generated by a package antenna is coupled to the SWG and then propagates along the SWG as a guided surface wave.
As indicated in
To have an SWG, proper metallic patterns 3712 may be printed on one of the surfaces of the dielectric material of the film 3710. A metallic pattern 3712 according to various aspects is illustrated in
The first part 3820a, 3820b may be free of metallic pattern as illustrated in
In various aspects, a sub-wavelength patch structure 3712 with ground TSVs or without ground TSVs can be used to realize high surface impedance as demonstrated in
However, other patterns can be used to create an artificial magnetic conductor to form the first part 3820a, 3820b (see
In various aspects, SWG construction can be achieved in multiple ways. By way of example, these can include laminating a metallic pattern in between plastic films such as polyamide, mylar, ULTEM, PEEK, PTFE, but are not limited thereto. The second part 3810 (see
Another way of forming the SWG could include metal patterning a high surface impedance carrier (for example, plastic). Metal patterning can be achieved by chemical vapor deposition, transfer printing or laser direct structing (LDS), inkjet printing, lithographical processes.
If SWG is not directly constructed on the cover 3708, mechanical fasteners such as screws, or chemical fasteners such as epoxies can be used to attach the SWG to the cover 3708.
The low surface impedance region 3810 (see
In various aspects, the at least one conductive element may be configured as a surface waveguide (SWG) for radio frequency signals, e.g. the RF signals to be sent or received by the first package 4704 or second package 4706.
In various aspects, the cover 4708 may include a metallic carrier that may be covered by a dielectric layer and the conductive pattern may be arranged on the dielectric layer, see e.g.
In various aspects, the at least one conductive element may be configured as a radio frequency filter.
In various aspects, the at least one conductive element may be configured as a surface acoustic wave structure.
In various aspects, the at least one conductive element may include a plurality of metal structures (e.g. the pattern described above). The plurality of metal structures may be electrically isolated from each other.
In various aspects, the at least one conductive element may include at least a first region (region 3810 in
In various aspects, the cover 4708 may be attached to the board 4708.
In various aspects, a package may include at least a first die and a second die on a carrier. The first die and the second die may be arranged on a same side of the carrier. Each of the first die and the second die may include at least one antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first die and the second die at the same side of the carrier as the first die and the second die. The cover may include at least one conductive element forming a predefined pattern on a side of the cover facing the first die and the second die. The package may further include a radio frequency signal interface wirelessly connecting the antennas of the first die and the second die. The radio frequency signal interface may include the at least one conductive element. In various aspects, the at least one conductive element may be configured as a surface waveguide for radio frequency signals.
In various aspects, the cover may include a metallic carrier that may be covered by a dielectric layer and the conductive pattern may be arranged on the dielectric layer. As an example, the at least one conductive element may be configured as electrically floating.
In various aspects, the at least one conductive element may be con figured as a radio frequency filter.
In various aspects, the at least one conductive element may be configured as a surface acoustic wave structure.
In various aspects, the at least one conductive element may include a plurality of metal structures. The plurality of metal structures may be electrically isolated from each other.
In various aspects, the at least one conductive element may include at least a first region and a second region. The at least one conductive element may be configured having a first surface impedance in the first region and a second surface impedance in the second region, the second surface impedance being higher than the first surface impedance.
As an example, the at least one conductive element in the first region and the conductive element in the second region may be positioned along an optical connecting line of the first die and the second die. In various aspects, the at least one conductive element in the first region may be formed atop of the first die and the second die and atop of the optical connecting line. In various aspects, the at least one conductive element in the second region may be arranged laterally positioned to the at least one conductive element in the first region. In various aspects, the at least one conductive element may include in the second region a dielectric part may be arranged on the metal structure, the dielectric part protruding from the metal structure towards the side of the carrier.
In various aspects, the cover may be attached to the carrier.
Conventionally, 3-D chip-to-chip communication through a wired mesh interconnect becomes cumbrous and problematic when many chips are involved. One example is a 3-D stack 4800 as shown in
Thus, if the communication between two chips 4802, 4804 can take advantage of a wireless communication between two z-axis stacked packages, the excessive latency and insertion loss can be mitigated. Also, the routing congestion on each package can be efficiently reduced. In addition, wireless communication offers scalability and reconfigurability.
However, the wireless communication between chips on two adjacent packages faces several challenges because of the small foot-print for the coupler and very tight spaces between adjacent channels such as the coupling distance (chip-to-chip communication range) is usually limited, coupler operational bandwidth is narrow, and severe channel-to-channel interference can be present.
Conventionally, wireless communication between chips on two adjacent packages are often accomplished through reactive technologies, such as inductive coupling as shown in
Thus, a chip-to-chip communication system according to various aspects avoids or reduces the interference, the communication range, and data rate problems under the space constrains. The short-distance wireless coupler according to various aspects may enable a small form factor, a polarization diversity, and a frequency diversity. Through simulations, the package-to-package RF modulated, wireless interface supports a communication range up to 1.5 cm to about 6 cm with 500 Mbps or a higher data rate.
Illustratively, a package-to-package, RF modulated, wireless interface is provided in various aspects that supports communication up to 1.5 cm to 6 cm at 500 Mbps or higher using dual planar coupling structures. A dual planar coupling structure can have a ring structure and a patch in multiple layers to enhance the coupling efficiency besides having them work together to achieve targeted operational frequencies. By exciting them accordingly, at least one of the frequency diversity or the field orthogonality can be accomplished. Also coupling two resonating modes, a wider impedance bandwidth can be achieved. In addition, properly arranging the couplers with frequency diversity and field orthogonality in adjacency promotes high isolation among adjacent communication channels.
Hence, using a dual planar coupling structure according to various aspects, less foot-print on the printed circuit board, higher isolation among couplers in a close proximity, longer air interconnection distance, e.g. 5 times longer than the inductive coupling, and less transceiver layout complexity, lower cost, and lower power consumption can be enabled.
In various aspects, the chip-to-chip communication system includes an edge-shorted coupler with ring structure and offset-fed coupler with corrugated edge ring structure.
The coupler 5000 can excited through a microstrip feed 5012 in the center of the top patch 5004. With different TSV locations, different current modes can be excited that can result in different resonant frequency and impedance bandwidths. The current distributions on both the top patch 5004 and along the ring structure 5002 are presented in
Thus, to demonstrate the impact of the ring structure 5002 on the coupler 5000 performance, a coupler without the ring structure is simulated (see
The effectiveness of the coupler layout presented in
To evaluate the performance of the coupler, a model presented in
A symmetric corrugated offset-fed coupler shown in
The first carrier may further include a waveguide structure. The first chip may be coupled to the TSV through the waveguide structure.
The radio frequency signal interface may include or may be a near-field communication interface.
The first carrier and the second carrier may be stacked over each other.
The radio frequency signal interface may further include a planar wireless coupler.
The first carrier may include the planar wireless coupler.
The planar wireless coupler may include a feed line coupled to a conductor loop structure. The conductor loop structure laterally surrounds the TSV.
At least one of the first carrier or the second carrier may be a printed circuit board.
A third carrier may be arranged between the first and second carrier. In other words, a third carrier may be arranged in the signal path of the radio frequency signal interface.
The TSV may be exposed at the second side.
In various aspects, the chip-to-chip communication system may further include a first package and a second package. The first package may include the first chip and the second package may include the second chip.
In various aspects, a method of operating a chip-to-chip communication system may include: determine a position vector of the second chip relative to the first chip 5902, determine a predefined electrical field distribution depending on the determined vector 5904 including a voltage for a ring structure surrounding the via associated with the electrical field distribution, and apply the determined voltage to the ring structure.
As described above in the context of
As an example of a 1.5 mm antenna height, the antenna becomes an electrically-small antenna having a frequency below 20 GHz. The antenna can suffer from low radiation resistance and high reactance in antenna input impedance. Thus, the antenna can have at least one of a narrow operational bandwidth or low radiation efficiency.
The definition and challenges of electrically-small antennas are summarized in
In various aspects, the radiated power (Prad) from an antenna may be proportional to the radiation resistance (Rrad) and current (I) of the antenna, e.g. Prad˜|l|2Rrad.
The radiation resistance can be boosted with impedance matching techniques. However, the radiation resistance can be inherently limited by the low-profile requirement of the in-package vertically-polarized antennas. On the other hand, there may be still a room to increase the current (I) by considering antenna structural topology.
Current distributions of various vertically-polarized antennas are depicted in
Thus, the magnitude order of the currents could be list as the following: |I1|>|I2|>|I6|>|I4|, |I5|>|I3|.
By way of example, current profiles |I5| and |I6| can imply that antenna radiating power performance could be enhanced if the vertically-polarized antenna is connected to the IHS (integrated heat spreader) of the package or heat sink if there is no IHS in the package.
A metallic IHS or heat sink coupled to the antenna can act like a capacitive loading effect to boost the current profile for achieving higher antenna radiating power as further illustrated in
In the simulation setup 6600, a H-shaped silicon 6602 with 10 S/m conductivity is located at the center of a package. The H-shaped silicon 6602 can represent a simplified array of heterogeneous chiplets on or over a common base die. In other words, the simulation setup illustrated in
Three vertical antennas may be placed under the IHS, e.g. between the base die and the IHS. The antennas are denoted as Ant #1, Ant #2 and Ant #3 in
The top layer of the package may be assumed to be covered with a copper. In a sense, these antennas Ant #1, Ant #2 and Ant #3 may be located inside a guided-wave structure of the enclosed metal cavity that may be formed from the IHS and the package ground as illustrated in
Potential cavity resonances in a targeted operational frequency range can be reasonably suppressed by the loading effects of silicon.
The boosted link response might come from “conduct RF” performance because ICAs can be directly connected through IHS, e.g. suspecting ICAs to form a transmission line. However, key difference between conducted RF (through transmission lines) and antenna radiation may be a received waveform. If a broadband Gaussian waveform is injected into one side (input) of a transmission line, a scaled version of the input pulse may be monitored on the other side (output) of the transmission line. However, if the RF pulse has been radiated, the received pulse can be a flipped scaled version of a derivative of the input Gaussian pulse due to the “−jω” factor in E-field expression of Maxwell's equations.
Pulses received in port #2 and port #3 (see
In case of an electrically conductive TIM, a mold channel can be formed as an alternative or additional channel for RF waveguiding for in-package messaging. The mold channel between adjacent chiplets can be available for extremely short range (<1 mm) point-to-point wireless communications. However, in view of point-to-multipoint wireless communications in longer range, an evanescent propagation mode below cut-off frequency, high channel loss and low amplifier efficiency at mmW or sub-THz operation frequency are to be considered for the mold channel 2204. In various aspects of this disclosure, the cut-off frequency may exist in the mmW band.
As demonstrated in
In order to resolve the cut-off frequency issue of the electrically conductive TIM case at lower operational frequencies (e.g. sub 10-GHz), the side walls 7120 of the IHS 7100 can be structured in various aspects, as illustrated in
The full-wave simulation result of ICA with the electrically conductive TIM and modified IHS in
In various aspects, ICA can be implemented by using a metal rod 6302 as a machined part of the IHS, as illustrated in
Thus, using any combination of these implementation approaches, the feed antenna(s) from base die, package carrier, or chiplets can be connected to the IHS. This way, a vertically-polarized ICA can be created, and point-to-multipoint in-package wireless communications can be enabled.
In various aspects, a “Fisheye pin” may be considered along with a non-conductive TIM. Then, at least one of the resonant frequencies, or the quality factor of the antenna can be mechanically adjusted as a post fine tuning. This aspect is illustrated in
In various aspects, the first die 7704 may also be coupled to the second antenna by wire and/or the second die 7714 may be coupled to the first antenna 7706 by wire. However, the wireless communication link 7747 may have a higher data rate or band width than the wired communication link. As an example, the first die 7704 may be arranged closer to the first antenna 7706 than the second die 7714 to the first antenna 7706. The second die 7714 may be arranged closer to the second antenna 7716 than the first die 7704 to the second antenna 7716. There may be no direct connection between the first die 7704 and the second die 7714 through a wire, but only through the RF signal interface 7747 in various aspects.
The integrated heat spreader 7708 may be configured reflective for the radio frequency signals. In various aspects, ICA may be configured as a heat sink, may be thermally coupled to a heat sink, or may include a heat sink, e.g. in case no IHS is used.
The integrated heat spreader 7708 may be attached to the carrier 7702.
The integrated heat spreader 7708 may include a structure. The structure may be configured as a plurality of vertically-polarized broadband antennas.
The integrated heat spreader 7708 may be configured as a radio frequency shielding structure regarding radio frequency signals from the outside of the package such that the area enclosed by the integrated heat spreader and the cover may be substantially free of radio frequency signals from the outside of the package.
The package 7700 may include a further antenna on or above at least one of the integrated heat spreader or the carrier. The further antenna may be coupled to the active base die 7702. The further antenna may be configured for wireless communication of the package 7700 with at least one other package.
A conventional integrated heat spreader (IHS), e.g. a metal heat spreader, may be arranged over one or more dice can serve as a thermo-mechanical part. The IHS is used to assist in the thermal management as well as to provide structural stability to the package. Packages of the related art use connections on the organic package, top side contacts, balls, lands, etc. However due to increasing input/output (I/O) and power delivery demands there is limited space available on the organic carrier, e.g. a printed circuit board, to make these input/output connections without increasing the package size.
Further, an increase in package size can pose challenges in not only increased cost but also product performance and reliability. For example, after certain package size yield drop drastically, or increased package size or bottom side I/O contact numbers results in much larger forces required for package socketing. In addition, server platforms use standard rack sizes in the related art, which limits the package size increases to be able fit all the necessary components of a server system. As such, conventionally, ball grid arrays (BGA) connections or land grid array (LGA) connections are used as second level package interconnects to provide power delivery to the package as well as to provide signal input-output. Currently, these solutions require a physical electrical contact between the package and the board, e.g. the PCB. Hence, conventional techniques are not able to scale up without increasing the package size that impacts package cost, reliability as well as form factor fit in server platforms. Thus, solutions of the related art are not able scale up without decreasing SLI (second level interconnect) pitch that becomes challenging and expensive as the pitch reduces the inherent isolation between the signal lines that becomes much worse. These connections require physical contact that could be prone to damage over time, e.g. broken solder causing opens.
Thus, illustratively, in various aspects, a package interconnect is provided utilizing the IHS as antenna. This IHS level interconnect (ILI) may be used to provide package-to-device communication links in various aspects. Here, a device may be another package in a broad sense, or, in a narrow sense, another package on the same board, another board, or another rack unit.
Signals to be transmitted through the package-to-package communication connection are coupled into the IHS inside the package using IHS-connected antennas, e.g. as described above. This way, the IHS can be utilized as a medium for package interconnects. Thus, moving current signals from SLI to ILI are provided, and thus the number of SLI is reduced. This way, package size may be reduced.
Alternatively or in addition, I/O using ILI may be provided to supplement current 10 from SLI. This way, the burden on SLI may be reduced and overall product data bandwidth may be increased by using additional I/O link from IHS.
Thus,
In various aspects, ILI may utilize the thermal heat spreading capabilities of the IHS to extend or complement its capabilities. Signals from the circuits, chips, dice to the ILI may be transmitted with the IHS coupled antenna and/or physical hard-wired connections.
For the aspects illustrated in
In addition to the waveguide structures, antennas may be integrated in or arranged on the IHS. Furthermore, these antennas may be made part of the server thermal solution (heat sink, cold plate . . . etc.) and may simultaneously also act as radiating antennas.
In various aspects, a miniature connector, e.g. developed for 5G applications, may be modified to be part of the IHS. This connector may be configured, as an example, for 45 GHz, and may have a small footprint, allowing a plurality of connectors to be integrated in the IHS.
In various aspects, at least one of the first package 8102 or the second package 8122 may include a printed circuit board as the carrier 8104, 8124.
In various aspects, at least one of the first package 8102 or the second packages 8122 may include a waveguide structure. The die 8106, 8126 may be coupled to the integrated heat spreader 8108, 8128 through the waveguide structure.
The integrated heat spreader 8108, 8128 may be attached to the carrier 8104, 8124. The radio frequency signal interface 8127 may be a near-field communication interface.
The integrated heat spreader 8108, 8128 of at least one of the first package 8102 or the second package 8122 may include a structure configured to form a directional antenna. The directional antenna may be the antenna 8110, 8130. The antenna 8110 of the first package faces 8102 the antenna 8130 of the second package 8122.
In various aspects, at least one of the first package 8102 or the second package 8122 may include a broadside antenna as the antenna. As an example, the integrated heat spreader 8108, 8128 may be configured as a broadside antenna. Alternatively, the integrated heat spreader 8108, 8128 may be configured as a diagonal directional antenna. Alternatively, the integrated heat spreader may be configured as an end-fire antenna.
Illustratively, each of the carrier 8104 of the first package 8102 and the carrier 8124 of the second package 8122 has a planar surface. The planar surface of the carrier of the first package and planar surface of the carrier of the second package may be faced in a same direction. The carrier of the first package and the carrier of the second package may be stacked over each other. Alternatively, the carrier of the first package and the carrier of the second package may be arranged in a common plane. Alternatively, the planar surface of carrier of the first package and planar surface of the carrier of the second package may be arranged in a diagonal manner to each other.
At least one of the first package or the second package may include that the carrier has a dielectric having a first side and a second side parallel to the first side, a chip, at least one TSV extending from the first side to the second side through the carrier, and a package-radio frequency signal interface connecting the chip with the TSV. In various aspects, the package-radio frequency signal interface may include a planar wireless coupler.
In various aspects, the radio frequency signal interface may further include a radio frequency stripline attached to the outside of the integrated heat spreader. Alternatively or in addition, the radio frequency signal interface may further include a waveguide connector attached to the outside of the integrated heat spreader.
In the following, various aspects of the present disclosure will be illustrated:
Example 1a is a device-to-device communication system, including a first device and a second device. Each of the first device and the second device includes an antenna, a radio frequency frond-end circuit, and a baseband circuit. Each of the first device and the second device are at least one of a chiplet or a package. The device-to-device communication system further includes a cover structure housing the first device and the second device. Each of the first device and the second device are at least one of a chiplet or a package. The device-to-device communication system further includes a radio frequency signal interface wirelessly communicatively coupling the first device and the second device. The radio frequency signal interface includes the first antenna and the second antenna. In other words, the radio frequency signal interface may be configured to operably couple the first device to the second device.
In Example 2a, the subject matter of Example 1a can optionally include that the device-to-device communication system further includes a carrier. The first device and the second device are arranged on the (same) carrier.
In Example 3a, the subject matter of Example 2a can optionally include that the carrier is a printed circuit board.
In Example 4a, the subject matter of Example 2a or 3a can optionally include that the carrier includes a semiconductor material.
In Example 5a, the subject matter of Example 4a can optionally include that the semiconductor material includes silicon or gallium nitride.
In Example 6a, the subject matter of any one of Examples 1a to 5a can optionally include that each of the first device and the second device is a package and the device-to-device communication system is a package-to-package communication system.
In Example 7a, the subject matter of any one of Examples 1a to 5a can optionally include that each of the first device and the second device is a chiplet and the device-to-device communication system is a chiplet-to-chiplet communication system.
In Example 8a, the subject matter of any one of Examples 1a to 7a can optionally include that the first and antenna and the second antenna are configured for radio frequency signals having a carrier frequency below 10 GHz;
In Example 9a, the subject matter of any one of Examples 1a to 8a can optionally include that each of the first device and the second device is configured for full-duplex communication.
In Example 10a, the subject matter of any one of Examples 1a to 9a can optionally include that the first device and the second device are stacked over each other.
In Example 11a, the subject matter of any one of Examples 1a to 10a can optionally include a plurality of device, the plurality of devices including the first device and the second device. The plurality of devices is arranged in at least a first stack of devices and a second stack of devices adjacent to the first stack. The first device is arranged in the first stack and the second device is arranged in the second stack.
Example 1b may be a package including a chiplet on a first carrier having a dielectric having two parallel sides and an antenna feed port formed on a first of the two parallel sides of the dielectric of the first carrier, and an antenna on or in a second carrier having two parallel sides and a radio frequency feed port formed on a first of the two parallel sides of the second carrier and the antenna formed at a second side of the two parallel sides. The first side of the first carrier may be facing the first side of the second carrier. The package further includes a radio frequency signal interface. The radio frequency signal interface includes the antenna feed port coupled to the radio frequency feed port. At least one of the antenna feed port or the radio frequency feed port may include a ball grid array or a solder-charge element.
In Example 2b, the subject matter of Example 1b can optionally include that the antenna may be coupled to the radio frequency feed port through a TSV.
In Example 3b, the subject matter of Example 2b can optionally include that the TSV may be extending from the first side of the second carrier to the second side of the second carrier.
In Example 4b, the subject matter of any one of Examples 1b to 3b can optionally include that at least one of the first carrier and the second carrier may include a printed circuit board.
In Example 5b, the subject matter of any one of Examples 1b to 4b can optionally include that the antenna may be configured as a broadside antenna.
In Example 6b, the subject matter of any one of Examples 1b to 5b can optionally include that the first carrier may include a further antenna feed port and the second carrier may include a further radio frequency feed port formed on the first side of the second carrier and a further antenna formed on a second side of the second carrier, and a further radio frequency signal interface may include the further antenna feed port coupled to the further radio frequency feed port. The further antenna has a different main radio frequency propagation direction than the antenna.
In Example 7b, the subject matter of Example 6b can optionally include that the antennas may be connected through different line feeds with the antenna feed ports.
In Example 8b, the subject matter of Example 7b can optionally include that line feeds may be embedded in the first carrier.
In Example 9b, the subject matter of any one of Examples 1b to 8b can optionally include that the further antenna may be configured as a directional antenna.
In Example 10b, the subject matter of any one of Examples 6b to 9b can optionally include that the further antenna may be configured as a diagonal directional antenna.
In Example 11b, the subject matter of any one of Examples 1b to 10b can optionally include that the first carrier may further include a radio frequency integrated circuit on the first carrier.
In Example 12b, the subject matter of any one of Examples 1b to 11b can optionally include that the chiplet may include a first side facing the first side of the first carrier and the first carrier may include a line feed coupled to the first side of the chiplet. The line feed may be coupled the antenna feed port.
In Example 13b, the subject matter of any one of Examples 1b to 12b can optionally include that the first carrier includes an integrated antenna that is formed on or integrated in an edge of the first carrier. The integrated antenna is coupled to the chiplet.
In Example 14b, the subject matter of Example 13b can optionally include that the integrated antenna is configured as an end-fire antenna.
In Example 15b, the subject matter of Example 13b or 14b can optionally include that the integrated antenna includes one more exposed vias configured as radiating components.
In Example 16b, the subject matter of any one of Examples 13b to 15b can optionally include that the integrated antenna is configured as at least one of a Yagi-antenna or Yagi-Uda antenna.
In Example 17b, the subject matter of any one of Examples 1b to 16b can optionally include that the second carrier includes at least a first sub-carrier and a second sub-carrier. Each of the first sub-carrier and the second sub-carrier includes at least one antenna.
Example 18b may be a package including a chiplet on a first carrier having a dielectric having two parallel sides and an antenna feed port formed on a first of the two parallel sides of the dielectric of the first carrier, and an antenna on or in a second carrier having two parallel sides and a radio frequency feed port formed on a first of the two parallel sides of the second carrier and the antenna formed at a second side of the two parallel sides. The first side of the first carrier may be facing the first side of the second carrier, the package may further include a radio frequency signal interface, the radio frequency signal interface may include the antenna feed port coupled to the radio frequency feed port. The first carrier may include an integrated antenna connected to the chiplet, the integrated antenna being integrated in the first carrier.
In Example 19b, the subject matter of Example 18b can optionally include that the integrated antenna may be configured as an end-fire antenna.
In Example 20b, the subject matter of Example 18b or 19b can optionally include that the integrated antenna includes one more exposed vias configured as radiating components.
In Example 21b, the subject matter of any one of Examples 18b to 20b can optionally include that the integrated antenna is configured as at least one of a Yagi-antenna or Yagi-Uda antenna.
In Example 22b, the subject matter of any one of Examples 18b to 21b can optionally include that the second carrier includes at least a first sub-carrier and a second sub-carrier. Each of the first sub-carrier and the second sub-carrier includes at least one antenna.
In Example 23b, the subject matter of any one of Examples 18b to 22b can optionally include that the antenna may be coupled to the radio frequency feed port through a TSV.
In Example 24b, the subject matter of Example 23b can optionally include that the TSV may be extending from the first side of the second carrier to the second side of the second carrier.
In Example 25b, the subject matter of any one of Examples 18b to 24b can optionally include that at least one of the first carrier and the second carrier may include a printed circuit board.
In Example 26b, the subject matter of any one of Examples 18b to 25b can optionally include that the antenna may be configured as a broadside antenna.
In Example 27b, the subject matter of any one of Examples 18b to 26b can optionally include that the first carrier may include a further antenna feed port and the second carrier may include a further radio frequency feed port formed on the first side of the second carrier and a further antenna formed on a second side of the second carrier, and a further radio frequency signal interface may include the further antenna feed port coupled to the further radio frequency feed port. The further antenna has a different main radio frequency propagation direction than the antenna.
In Example 28b, the subject matter of Example 27b can optionally include that the antennas may be connected through different line feeds with the antenna feed ports.
In Example 29b, the subject matter of Example 28b can optionally include that line feeds may be embedded in the first carrier.
In Example 30b, the subject matter of any one of Examples 18b to 29b can optionally include that the antenna may be configured as a directional antenna.
In Example 31b, the subject matter of any one of Examples 18b to 30b can optionally include that the further antenna may be configured as a diagonal directional antenna.
In Example 32b, the subject matter of any one of Examples 18b to 31b can optionally include that the first carrier may further include a radio frequency in IC on the first carrier.
In Example 33b, the subject matter of any one of Examples 18b to 32b can optionally include that the chiplet may include a first side facing the first side of the first carrier and the first carrier may include a line feed coupled to the first side of the chiplet. The line feed may be coupled the antenna feed port.
Example 34b may be a package including a chiplet on a first carrier having a dielectric having two parallel sides and an antenna feed port formed on a first of the two parallel sides of the dielectric of the first carrier, and an antenna on or in a second carrier having two parallel sides and a radio frequency feed port formed on a first of the two parallel sides of the second carrier and the antenna formed at a second side of the two parallel sides. The first side of the first carrier may be facing the first side of the second carrier, the package may further include a radio frequency signal interface, the radio frequency signal interface may include the antenna feed port coupled to the radio frequency feed port. The antenna may be configured as a directional antenna for radio frequency signals in a frequency range from about 5 GHz to about 25 GHz.
In Example 35b, the subject matter of Example 34b can optionally include that the antenna may be coupled to the radio frequency feed port through a TSV.
In Example 36b, the subject matter of Example 34b can optionally include that the TSV may be extending from the first side of the second carrier to the second side of the second carrier.
In Example 37b, the subject matter of any one of Examples 34b to 36b can optionally include that at least one of the first carrier and the second carrier may include a printed circuit board.
In Example 38b, the subject matter of any one of Examples 34b to 37b can optionally include that the antenna may be configured as a broadside antenna.
In Example 39b, the subject matter of any one of Examples 34b to 38b the first carrier may include a further antenna feed port and the second carrier may include a further radio frequency feed port formed on the first side of the second carrier and a further antenna formed on a second side of the second carrier, and a further radio frequency signal interface may include the further antenna feed port coupled to the further radio frequency feed port. The further antenna has a different main radio frequency propagation direction than the antenna.
In Example 40b, the subject matter of Example 39b can optionally include that the antennas may be connected through different line feeds with the antenna feed ports.
In Example 41b, the subject matter of Example 40b can optionally include that line feeds may be embedded in the first carrier.
In Example 42b, the subject matter of any one of Examples 39b to 41b can optionally include that the further antenna may be configured as a diagonal directional antenna.
In Example 43b, the subject matter of any one of Examples 34b to 42b can optionally include that the first carrier may further include a radio frequency integrated circuit on the first carrier.
In Example 44b, the subject matter of any one of Examples 34b to 44b can optionally include that the chiplet may include a first side facing the first side of the first carrier and the first carrier may include a line feed coupled to the first side of the chiplet. The line feed may be coupled the antenna feed port.
In Example 45b, the subject matter of any one of Examples 34b to 44b can optionally include that at least one of the antenna feed port or the radio frequency feed port may include a ball grid array or a solder-charge element.
In Example 46b, the subject matter of any one of Examples 34b to 45b can optionally include that the first carrier may include an integrated antenna connected to the chiplet, the integrated antenna being integrated in the first carrier.
In Example 47b, the subject matter of Example 46b can optionally include that the integrated antenna is configured as an end-fire antenna.
In Example 48b, the subject matter of Example 46b or 47b can optionally include that the integrated antenna includes one more exposed vias configured as radiating components.
In Example 49b, the subject matter of any one of Examples 46b to 48b can optionally include that the integrated antenna is configured as at least one of a Yagi-antenna or Yagi-Uda antenna.
In Example 50b, the subject matter of any one of Examples 34b to 49b can optionally include that the second carrier includes at least a first sub-carrier and a second sub-carrier. Each of the first sub-carrier and the second sub-carrier includes at least one antenna.
Example 51b may be a package-to-package planar system may include a first package and a second package each configured as any one of Examples 1b to 50b. The first package and the second package may be communicatively coupled by at least one antenna of each of the first package and the second package.
In Example 52b, the subject matter of Example 51b can optionally include that the first package and the second package may be arranged so that the second sides of the second carriers of the first package and the second package may be arranged in at least one of facing each other, in a common plane or diagonally displaced.
In Example 53b, the subject matter of Example 51b or 52b can optionally include that the first carrier and the second carrier of the first package and the second package may be arranged on a common carrier via the second sides of the first carrier of the first package and of the second package.
Example 1c is a package. The package includes a carrier having a plane surface, at least a first chiplet and a second chiplet arranged on the plane surface of the carrier; at least one dummy chip structure arranged on the plane surface of the carrier. The first chiplet and the second chiplet may be wirelessly coupled via a radio frequency signal interface. The radio frequency signal interface includes the dummy chiplet structure.
In Example 2c, the subject matter of Example 1c can optionally include that the first chiplet and the second chiplet are arranged on a same side of the carrier.
In Example 3c, the subject matter of Example 1c or 2c can optionally include that the dummy chip structure is configured as a radio frequency waveguide structure to guide radio frequency signals between the first chiplet and the second chiplet.
In Example 4c, the subject matter of any one of Examples 1c to 3c can optionally include that the dummy chip structure is configured as a radio frequency reflector.
In Example 5c, the subject matter of any one of Examples 1c to 4c can optionally include at least one antenna on the at least one dummy chiplet structure.
In Example 6c, the subject matter of any one of Examples 1c to 5c can optionally include that the dummy chip structure is further configured as a package-input-output interface of the package.
In Example 7c, the subject matter of any one of Examples 1c to 6c can optionally include that the radio frequency signal interface is an in-package radio frequency signal interface.
In Example 8c, the subject matter of any one of Examples 1c to 7c can optionally include that the carrier includes a semiconductor carrier.
In Example 9c, the subject matter of Example 8c can optionally include that the semiconductor carrier includes a silicon carrier.
In Example 10c, the subject matter of any one of Examples 1c to 9c can optionally include that the dummy chiplet includes silicon.
Example 11c, the subject matter of any one of Examples 1c to 9c can optionally include that the dummy chip structure has a conductivity of 1 S/m or less.
Example 1d is a package including a carrier having a planar surface and an edge surface, at least one chiplet arranged on the planar surface, and a first antenna arranged on the edge surface. The first antenna may be exposed on the edge surface. A radio frequency signal interface may be configured to couple the antenna with the chiplet.
In Example 2d, the subject matter of Example 1d can optionally include that the edge surface may be a first edge surface and the carrier may further include at least a second surface. A second antenna may be arranged on the second edge surface.
In Example 3d, the subject matter of Example 2d can optionally include that each of the first antenna and the second antenna may be configured as vertically polarized antennas.
In Example 4d, the subject matter of Example 3d can optionally include that the first antenna and the second antenna may be vertically polarized antennas configured to include at least one of different polarizations or propagation directions.
In Example 5d, the subject matter of any one of Examples 1d to 4d can optionally include that the first antenna may be arranged along the edge surface.
In Example 6d, the subject matter of any one of Examples 1d to 5d can optionally include that a third antenna may be arranged on or above the planar surface. The first antenna and the third antenna may be configured to include at least one of different polarizations or propagation directions.
In Example 7d, the subject matter of any one of Examples 1d to 6d can optionally include that the first antenna may include one or more TSVs as main radiation elements.
In Example 8d, the subject matter of any one of Examples 1d to 7d can optionally include that the carrier includes a ground plane. The first antenna may be coupled to the ground plane
In Example 9d, the subject matter of any one of Examples 1d to 8d can optionally include that the first antenna may be configured as a directional antenna.
Example 1e may be a package system, including at least a first package and a second package on a carrier. The first package and the second package may be arranged on a same side of the package carrier. Each of the first package and the second package may include at least one antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first package and the second package at the same side of the package carrier as the first package and the second package. The cover may include at least one conductive element forming a predefined pattern on a side of the cover facing the first package and the second package. The package system may further include a radio frequency signal interface configured to connect the at least one antenna of the first package to the at least one antenna of the second package. The radio frequency signal interface may include the at least one conductive element.
In Example 2e, the subject matter of Example 1e can optionally include that the at least one conductive element may be configured as a surface waveguide for radio frequency signals.
In Example 3e, the subject matter of Example 1e or 2e can optionally include that the cover may include a metallic package carrier that may be covered by a dielectric layer and the conductive pattern may be arranged on the dielectric layer.
In Example 4e, the subject matter of Example 3e can optionally include that the at least one conductive element may be configured as electrically floating.
In Example 5e, the subject matter of Example 3e or 4e can optionally include that the at least one conductive element may be configured as a radio frequency filter.
In Example 6e, the subject matter of any one of Examples 3e to 5e can optionally include that the at least one conductive element may be configured as a surface acoustic wave structure.
In Example 7e, the subject matter of any one of Examples 1e to 6e can optionally include that the at least one conductive element may include a plurality of metal structures.
In Example 8e, the subject matter of Example 7e can optionally include that the plurality of metal structures may be electrically isolated from each other.
In Example 9e, the subject matter of any one of Examples 1e to 7e can optionally include that the at least one conductive element may include at least a first region and a second region. The at least one conductive element may be configured having a first surface impedance in the first region and a second surface impedance in the second region, the second surface impedance being higher than the first surface impedance.
In Example 10e, the subject matter of Example 9e can optionally include that the at least one conductive element in the first region and the conductive element in the second region may be positioned along an optical connecting line of the first package and the second package.
In Example 11e, the subject matter of Example 10e can optionally include that the at least one conductive element in the first region may be formed atop of the first package and the second package and atop of the optical connecting line.
In Example 12e, the subject matter of any one of Examples 9e to 11e can optionally include that the at least one conductive element in the second region may be arranged laterally positioned to the at least one conductive element in the first region.
In Example 13e, the subject matter of any one of Examples 9e to 12e can optionally include that the at least one conductive element may include in the second region a dielectric part may be arranged on the metal structure, the dielectric part protruding from the metal structure towards the side of the package carrier.
In Example 14e, the subject matter of any one of Examples 1e to 12e can optionally include that the cover may be attached to the package carrier.
Example 15e is a package, including at least a first chiplet and a second chiplet on a carrier. The first chiplet and the second chiplet may be arranged on a same side of the carrier. Each of the first chiplet and the second chiplet may include at least one antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first chiplet and the second chiplet at the same side of the carrier as the first chiplet and the second chiplet. The cover may include at least one conductive element forming a predefined pattern on a side of the cover facing the first chiplet and the second chiplet. The package may further include a radio frequency signal interface wirelessly connecting the antennas of the first chiplet and the second chiplet. The radio frequency signal interface may include the at least one conductive element.
In Example 16e, the subject matter of Example 15e can optionally include that the at least one conductive element may be configured as a surface waveguide for radio frequency signals.
In Example 17e, the subject matter of Example 15e or 16e can optionally include that the cover may include a metallic carrier that may be covered by a dielectric layer and the conductive pattern may be arranged on the dielectric layer.
In Example 18e, the subject matter of Example 17e can optionally include that the at least one conductive element may be configured as electrically floating.
In Example 19e, the subject matter of Example 17e or 18e can optionally include that the at least one conductive element may be configured as a radio frequency filter.
In Example 20e, the subject matter of any one of Examples 17e to 19e can optionally include that the at least one conductive element may be configured as a surface acoustic wave structure.
21e, the subject matter of any one of Examples 15e to 20e can optionally include that the at least one conductive element may include a plurality of metal structures.
In Example 22e, the subject matter of Example 21e can optionally include that the plurality of metal structures may be electrically isolated from each other.
In Example 23e, the subject matter of any one of Examples 15e to 22e can optionally include that the at least one conductive element may include at least a first region and a second region. The at least one conductive element may be configured having a first surface impedance in the first region and a second surface impedance in the second region, the second surface impedance being higher than the first surface impedance.
In Example 24e, the subject matter of Example 23e can optionally include that the at least one conductive element in the first region and the conductive element in the second region may be positioned along an optical connecting line of the first chiplet and the second chiplet.
In Example 25e, the subject matter of Example 24e can optionally include that the at least one conductive element in the first region may be formed atop of the first chiplet and the second chiplet and atop of the optical connecting line.
In Example 26e, the subject matter of any one of Examples 23e to 25e can optionally include that the at least one conductive element in the second region may be arranged laterally positioned to the at least one conductive element in the first region.
In Example 27e, the subject matter of any one of Examples 23e to 26e can optionally include that the at least one conductive element may include in the second region a dielectric part may be arranged on the metal structure, the dielectric part protruding from the metal structure towards the side of the carrier.
In Example 28e, the subject matter of any one of Examples 15e to 27e can optionally include that the cover may be attached to the carrier.
Example 1f may be a chiplet-to-chiplet communication system including a first chiplet on a first carrier and a second chiplet on a second carrier. Each of the first carrier and the second carrier includes a first side and a second side opposite to the first side. The first chiplet may be arranged on the first side of the first carrier and the second chiplet may be arranged on the first side of the second carrier. The first side of the second carrier may be arranged to face the second side of the first carrier. The first carrier further including a TSV coupled to the first chiplet and extending through the first carrier from the first side to the second side. The chiplet-to-chiplet communication system includes a radio frequency signal interface wirelessly communicatively coupling the first chiplet to the second chiplet, the radio frequency signal interface including the TSV of the first carrier.
In Example 2f, the subject matter of claim 1f can optionally include that the first carrier further includes a waveguide structure. The first chiplet may be coupled to the TSV through the waveguide structure.
In Example 3f, the subject matter of any one of claims 1f or 2f can optionally include that the radio frequency signal interface includes or may be a near-field communication interface.
In Example 4f, the subject matter of any one of claims 1f to 3f can optionally include that the first carrier and the second carrier may be stacked over each other.
In Example 5f, the subject matter of any one of claims 1f to 4f can optionally include that the radio frequency signal interface further includes a planar wireless coupler.
In Example 6f, the subject matter of any one of claims 5f can optionally include that the first carrier includes the planar wireless coupler.
In Example 7f, the subject matter of any one of claims 5f or 6f can optionally include that the planar wireless coupler includes a feed line coupled to a conductor loop structure. The conductor loop structure laterally surrounds the TSV.
In Example 8f, the subject matter of any one of claims 1f to 7f can optionally include that at least one of the first carrier or the second carrier may be a printed circuit board.
In Example 9f, the subject matter of any one of claims 1f to 8f, further including a third carrier arranged between the first and second carrier.
In Example 10f, the subject matter of any one of claims 1f to 8f, further including a third carrier arranged in the signal path of the radio frequency signal interface.
In Example 11f, the subject matter of any one of claims 1f to 10f, further including a controller, configured to: determine a position vector of the second chiplet relative to the first chip, determine a predefined electrical field distribution depending on the determined vector including a voltage for a ring structure surrounding the via associated with the electrical field distribution, and apply the determined voltage to the ring structure.
In Example 12f, the subject matter of any one of claims 1f to 11f can optionally include that the TSV may be exposed at the second side.
In Example 13f, the subject matter of any one of claims 1f to 12f, further including a first package and a second package. The first package includes the first chiplet and the second package includes the second chiplet.
Example 14f is a method of operating a chiplet-to-chiplet communication system. The chiplet-to-chiplet communication system includes a first chiplet on a first carrier and a second chiplet on a second carrier. Each of the first carrier and the second carrier includes a first side and a second side opposite to the first side, the first chiplet may be arranged on the first side of the first carrier and the second chiplet may be arranged on the first side of the second carrier. The first side of the second carrier may be arranged to face the second side of the first carrier. The first carrier further including a TSV coupled to the first chiplet and extending through the first carrier from the first side to the second side. A TSV may be coupled to the chiplet and extending through the carrier from a first side of the carrier to a second side of the carrier. The chiplet-to-chiplet communication system may include a radio frequency signal interface communicatively coupling the first chiplet to the second chiplet, the radio frequency signal interface including the TSV of the first carrier. The method may include determining a position vector of the second chiplet relative to the first chip, determining a predefined electrical field distribution depending on the determined vector including a voltage for a ring structure surrounding the via associated with the electrical field distribution, and applying the determined voltage to the ring structure
In Example 15f, the subject matter of claim 14f can optionally include that the first carrier further includes a waveguide structure. The first chiplet may be coupled to the TSV through the waveguide structure.
In Example 16f, the subject matter of any one of claims 14f or 15f can optionally include that the radio frequency signal interface includes or may be a near-field communication interface.
In Example 17f, the subject matter of any one of claims 14f to 16f can optionally include that the first carrier and the second carrier may be stacked over each other.
In Example 18f, the subject matter of any one of claims 14f to 17f can optionally include that the radio frequency signal interface further includes a planar wireless coupler.
In Example 19f, the subject matter of any one of claims 18f can optionally include that the first carrier includes the planar wireless coupler.
In Example 20f, the subject matter of any one of claims 18f or 19f can optionally include that the planar wireless coupler includes a feed line coupled to a conductor loop structure. The conductor loop structure laterally surrounds the TSV.
In Example 21f, the subject matter of any one of claims 14f to 20f can optionally include that at least one of the first carrier or the second carrier may be a printed circuit board.
In Example 22f, the subject matter of any one of claims 14f to 21f can optionally include that a third carrier arranged between the first and second carrier.
In Example 23f, the subject matter of any one of claims 14f to 22f can optionally include that a third carrier arranged in the signal path of the radio frequency signal interface.
In Example 24f, the subject matter of any one of claims 14f to 23f can optionally include that the TSV may be exposed at the second side.
In Example 25f, the subject matter of any one of claims 14f to 24f can optionally include that a first package and a second package. The first package includes the first chiplet and the second package includes the second chiplet.
Example 1 g may be a package including an carrier on or above a carrier; at least a first chiplet and a second chiplet both on or above the carrier and coupled to the carrier; an integrated heat spreader on or above the carrier and encapsulating each of the carrier, the first chiplet and the second chiplet; and at least a first antenna and a second antenna both coupled to the carrier and the integrated heat spreader, and at least one radio frequency signal interface between the first chiplet and the second chiplet. The radio frequency signal interface includes the first antenna and the second antenna wirelessly coupling the first chiplet with the second chiplet through the radio frequency signal interface.
In Example 2g, the subject matter of Example 1g can optionally include that the integrated heat spreader may be configured reflective for the radio frequency signals.
In Example 3g, the subject matter of Example 1g or 2g can optionally include that the integrated heat spreader may be attached to the carrier.
In Example 4g, the subject matter of any one of Examples 1 g to 3g can optionally include that the integrated heat spreader includes a structure. The structure may be configured as a plurality of vertically-polarized broadband antennas.
In Example 5g, the subject matter of any one of Examples 1 g to 4g can optionally include that the first chiplet may be arranged closer to the first antenna than the second chiplet to the first antenna. The second chiplet may be arranged closer to the second antenna than the first chiplet to the second antenna.
In Example 6g, the subject matter of any one of Examples 1 g to 5g can optionally include that the integrated heat spreader may be configured as a radio frequency shielding structure regarding radio frequency signals from the outside of the package such that the area enclosed by the integrated heat spreader and the cover may be substantially free of radio frequency signals from the outside of the package.
In Example 7g, the subject matter of any one of Examples 1 g to 6g can optionally further include a further antenna on or above the integrated heat spreader and/or carrier. The further antenna may be coupled to the carrier. The further antenna may be configured for wireless communication of the package with at least one other package.
Example 1 h may be a package system including a first package and a second package. Each package may include a chiplet on a carrier, an antenna on the carrier, and an integrated heat spreader on or over the carrier and thermally coupled to the chiplet. At least a part of the integrated heat spreader may include the antenna or may be configured as the antenna. the subject matter of may further include a radio frequency signal interface that may include the antenna of the first package and the antenna of the second package being wirelessly communicatively coupled.
In Example 2h, the subject matter of Example 1 h can optionally include that at least one of the first package or the second packages may include a waveguide structure. The chiplet may be coupled to the integrated heat spreader through the waveguide structure.
In Example 3h, the subject matter of Example 1 h or 2h can optionally include that the integrated heat spreader of at least one of the first package or the second package may include a structure configured to form a directional antenna. The directional antenna may be the antenna.
In Example 4h, the subject matter of any one of Examples 1h to 3h can optionally include that the integrated heat spreader may be attached to the carrier.
In Example 5h, the subject matter of any one of Examples 1h to 4h can optionally include that the radio frequency signal interface may be a near-field communication interface.
In Example 6h, the subject matter of any one of Examples 1h to 5h can optionally include that each of the carrier of the first package and the carrier of the second package has a planar surface. The planar surface of the carrier of the first package and planar surface of the carrier of the second package may be faced in a same direction.
In Example 7h, the subject matter of any one of Examples 1h to 6 can optionally include that the carrier of the first package and the carrier of the second package may be stacked over each other.
In Example 8h, the subject matter of any one of Examples 1h to 6h can optionally include that the carrier of the first package and the carrier of the second package may be arranged in a common plane.
In Example 9h, the subject matter of Example 6h can optionally include that the planar surface of carrier of the first package and planar surface of the carrier of the second package may be arranged in a diagonal manner to each other.
In Example 10h, the subject matter of any one of Examples 1h to 9h can optionally include that at least one of the first package or the second package may include that the carrier has a dielectric having a first side and a second side parallel to the first side; and a chiplet and at least one TSV extending from the first side to the second side through the carrier, and a package-radio frequency signal interface connecting the chiplet with the TSV.
In Example 11h, the subject matter of Example 10h can optionally include that the package-radio frequency signal interface may include a planar wireless coupler.
In Example 12h, the subject matter of any one of Examples 1h to 11h can optionally include that at least one of the first package or the second package may include a printed circuit board as the carrier.
In Example 13h, the subject matter of any one of Examples 1h to 12h can optionally include that at least one of the first package or the second package may include a broadside antenna as the antenna.
In Example 14h, the subject matter of any one of Examples 1h to 13h can optionally include that the antenna of the first package faces the antenna of the second package.
In Example 15h, the subject matter of any one of Examples 1h to 14h can optionally include that the integrated heat spreader may be configured as a broadside antenna.
In Example 16h, the subject matter of any one of Examples 1h to 15h can optionally include that the integrated heat spreader may be configured as a diagonal directional antenna.
In Example 17h, the subject matter of any one of Examples 1h to 16h can optionally include that the integrated heat spreader may be configured as an end-fire antenna.
In Example 18h, the subject matter of any one of Examples 1h to 17h can optionally include that the radio frequency signal interface may further include a radio frequency stripline attached to the outside of the integrated heat spreader.
In Example 19h, the subject matter of any one of Examples 1h to 18h can optionally include that the radio frequency signal interface may further include a waveguide connector attached to the outside of the integrated heat spreader.
In Example 1i, the subject matter of any one of Examples 1a to 19h can optionally include that the radio frequency signal interface may include or be part of a control plane circuitry.
In Example 2i, the subject matter of any one of Examples 1a to 1i can optionally include that the radio frequency signal interface may be configured to operate or use sub-10 GHz RF carrier technology. Operation at sub-10 GHz can allow for process portability and easy adoption of the radio frequency (RF) transceiver and may use near-field couplers/antennas. The flexibility of an RF link can allow convenient placement and use within a product chassis, from rack-unit-to-rack-unit, and for 3D heterogeneously integrated semiconductor products.
In Example 3i, the subject matter of any one of Examples 1a to 2i can optionally include that the radio frequency signal interface may be configured to support bit rates in the range of 0.5-2 Gbps over distances up to 20 cm, e.g. supporting both symmetric and asymmetric topologies.
In Example 4i, the subject matter of any one of Examples 1a to 3i can optionally include that the radio frequency signal interface may enable point-multipoint, broadcastable, full-duplex wireless control/manageability links, e.g. board-to-board type communications, package-to-package type communications, and chiplet-to-chiplet type communications within a package. A broadcastable, full-duplex wireless messaging capability can enable a control plane communication from package-to-package and inside 3D heterogeneously integrated packages. This way, more nodes, over longer distances and higher speeds can be supported. Alternatively or in addition, a more flexible product floorplan is enabled.
In Example 5i, the subject matter of any one of Examples 1a to 4i can optionally include that the signals transmitted through the radio frequency signal interface may be in the form of packets reflecting any suitable type of control plane protocol. As an example, control signals exchanged between a first die and a second die of one package may be associated to data of the control plane of the Open Systems Interconnection (OSI)-model required to establish, maintain or end an interconnection between the first die and the second die of the package of the data plane of the OSI-model.
In Example 6i, the subject matter of any one of Examples 1a to 5i can optionally include that in a package-to-package communication, at least a first package and a second package may be wirelessly communicatively coupled to each other. Signals, e.g. control signals, transmitted through the radio frequency signal interface between the first package and the second package may be associated to data of the control plane of the Open Systems Interconnection (OSI)-model required to establish, maintain or end an interconnection between the first package and the second package of the data plane of the OSI-model.
The word “exemplary” is used herein to mean “serving as an example, instance, or illustration”. Any aspect or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs.
Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures, unless otherwise noted.
The phrase “at least one” and “one or more” may be understood to include a numerical quantity greater than or equal to one (e.g., one, two, three, four, [ . . . ], etc.). The phrase “at least one of” with regard to a group of elements may be used herein to mean at least one element from the group consisting of the elements. For example, the phrase “at least one of” with regard to a group of elements may be used herein to mean a selection of: one of the listed elements, a plurality of one of the listed elements, a plurality of individual listed elements, or a plurality of a multiple of individual listed elements.
The words “plural” and “multiple” in the description and in the claims expressly refer to a quantity greater than one. Accordingly, any phrases explicitly invoking the aforementioned words (e.g., “plural [elements]”, “multiple [elements]”) referring structure to a quantity of elements expressly refers to more than one of the said elements. For instance, the phrase “a plurality” may be understood to include a numerical quantity greater than or equal to two (e.g., two, three, four, five, [ . . . ], etc.).
The phrases “group (of)”, “set (of)”, “collection (of)”, “series (of)”, “sequence (of)”, “grouping (of)”, etc., in the description and in the claims, if any, refer to a quantity equal to or greater than one, i.e., one or more. The terms “proper subset”, “reduced subset”, and “lesser subset” refer to a subset of a set that is not equal to the set, illustratively, referring structure to a subset of a set that contains less elements than the set.
Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
As used herein, unless otherwise specified the use of the ordinal adjectives “first”, “second”, “third” etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.
The term “semiconductor carrier” is defined to mean any construction including semiconductor material, for example, a silicon carrier with or without an epitaxial layer, a silicon-on-insulator carrier containing a buried insulator layer, or a carrier with a silicon germanium layer. The term “integrated circuits” as used herein refers to electronic circuits having multiple individual circuit elements, such as transistors, diodes, resistors, capacitors, inductors, and other active and passive semiconductor devices.
The term “data” as used herein may be understood to include information in any suitable analog or digital form, e.g., provided as a file, a portion of a file, a set of files, a signal or stream, a portion of a signal or stream, a set of signals or streams, and the like. Further, the term “data” may also be used to mean a reference to information, e.g., in form of a pointer. The term “data”, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art.
As used herein, a signal that is “indicative of” a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and/or cause a responsive action in a component receiving the signal. The signal may be stored or buffered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium. Further, a “value” that is “indicative of” some quantity, state, or parameter may be physically embodied as a digital signal, an analog signal, or stored bits that encode or otherwise communicate the value.
As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase, amplitude, frequency, and so on. The signal may be referred to as the same signal even as such characteristics are adapted. In general, so long as a signal continues to encode the same information, the signal may be considered as the same signal. For example, a transmit signal may be considered as referring structure to the transmit signal in baseband, intermediate, and radio frequencies.
The terms “processor” or “controller” as, for example, used herein may be understood as any kind of technological entity that allows handling of data. The data may be handled according to one or more specific functions executed by the processor or controller. Further, a processor or controller as used herein may be understood as any kind of circuit, e.g., any kind of analog or digital circuit. A processor or a controller may thus be or include an analog circuit, digital circuit, mixed-signal circuit, logic circuit, processor, microprocessor, Central Processing Unit (CPU), Graphics Processing Unit (GPU), Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA), integrated circuit, Application Specific Integrated Circuit (ASIC), etc., or any combination thereof. Any other kind of implementation of the respective functions, which will be described below in further detail, may also be understood as a processor, controller, or logic circuit. It is understood that any two (or more) of the processors, controllers, or logic circuits detailed herein may be realized as a single entity with equivalent functionality or the like, and conversely that any single processor, controller, or logic circuit detailed herein may be realized as two (or more) separate entities with equivalent functionality or the like.
As utilized herein, terms “module”, “component,” “system,” “circuit,” “element,” “slice,” “circuitry,” and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution), and/or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an object, an executable program, a storage device, and/or a computer with a processing device. By way of illustration, an application running on a server and the server can also be circuitry. One or more circuits can reside within the same circuitry, and circuitry can be localized on one computer and/or distributed between two or more computers. A set of elements or a set of other circuits can be described herein, in which the term “set” can be interpreted as “one or more.”
As used herein, “memory” is understood as a computer-readable medium (e.g., a non-transitory computer-readable medium) in which data or information can be stored for retrieval. References to “memory” included herein may thus be understood as referring structure to volatile or non-volatile memory, including random access memory (RAM), read-only memory (ROM), flash memory, solid-state storage, magnetic tape, hard disk drive, optical drive, 3D XPoint™, among others, or any combination thereof. Registers, shift registers, processor registers, data buffers, among others, are also embraced herein by the term memory. The term “software” refers to any type of executable instruction, including firmware.
The term “antenna” or “antenna structure”, as used herein, may include any suitable configuration, structure and/or arrangement of one or more antenna elements, components, units, assemblies and/or arrays. In some aspects, the antenna may implement transmit and receive functionalities using separate transmit and receive antenna elements. In some aspects, the antenna may implement transmit and receive functionalities using common and/or integrated transmit/receive elements. The antenna may include, for example, a phased array antenna, a single element antenna, a set of switched beam antennas, and/or the like.
In this description, the term “predefined pattern” refers to a structure of at least one conductive element of the cover. In other words, the at least one conductive element may be structured such that the predefined pattern is formed. The conductive element having the predefined pattern may be formed on a side of the cover facing the first package or die and the second package or die. The predefined pattern may be configured as a frequency selective surface, e.g. selective for the radio frequency signals to be transmitted between the first package or die and the second package or die. As an example, the predefined pattern of the conductive element of the cover may be configured as a reflector array. As an example, the predefined pattern of the conductive element may be configured as a planar structure, a 2.5D structure(s), or 3D structure(s). The conductive element may be configured such that the predefined pattern includes a plurality of unit cells. The plurality of unit cells may be part of the reflector array. Illustratively, the predefined pattern may include a plurality of repetitive structures in the conductive element.
It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be physically connected or coupled to the other element such that current and/or electromagnetic radiation (e.g., a signal) can flow along a conductive path formed by the elements. Intervening conductive, inductive, or capacitive elements may be present between the element and the other element when the elements are described as being coupled or connected to one another. Further, when coupled or connected to one another, one element may be capable of inducing a voltage or current flow or propagation of an electro-magnetic wave in the other element without physical contact or intervening components. Further, when a voltage, current, or signal is referred to as being “applied” to an element, the voltage, current, or signal may be conducted to the element by way of a physical connection or by way of capacitive, electro-magnetic, or inductive coupling that does not involve a physical connection.
Unless explicitly specified, the term “transmit” encompasses both direct (point-to-point) and indirect transmission (via one or more intermediary points). Similarly, the term “receive” encompasses both direct and indirect reception. Furthermore, the terms “transmit,” “receive,” “communicate,” and other similar terms encompass both physical transmission (e.g., the transmission of radio signals) and logical transmission (e.g., the transmission of digital data over a logical software-level connection). For example, a processor or controller may transmit or receive data over a software-level connection with another processor or controller in the form of radio signals, where the physical transmission and reception is handled by radio-layer components such as RF transceivers and antennas, and the logical transmission and reception over the software-level connection is performed by the processors or controllers. The term “communicate” encompasses one or both of transmitting and receiving, i.e., unidirectional or bidirectional communication in one or both of the incoming and outgoing directions. The term “calculate” encompasses both ‘direct’ calculations via a mathematical expression/formula/relationship and ‘indirect’ calculations via lookup or hash tables and other array indexing or searching operations.
The term “calibration” as used herein may describe a process in which a device or a component of a device (e.g., a radiohead circuit, a transceiver chain, a component of a transceiver chain, and the like) is calibrated. Illustratively, the term calibration may describe a process in which one or more deviations of a behavior of a device or of one of its components from an expected or desired behavior are corrected. Further illustratively, the term calibration may describe a process in which the operation of a device or of one of its components is aligned with a predefined or desired operation of the device or of the component. By way of example, a calibration may describe a process in which nonlinearities are eliminated and/or in which mismatches are eliminated.
One or more antennas are configured to operate within a plurality of radiofrequency bands; one or more antennas that are each configured to operate within a single radiofrequency band; or a combination thereof. According to one aspect of the disclosure, the antenna or antennas of the radiofrequency device disclosed herein may be configured to operate within radiofrequency bands between 2.4 GHz and 100 GHz. This may include, for example, 2.4 GHz, 5 to 6 GHz, 6 to 7 GHz, or any combination thereof.
Each of the multiple RF FE circuitries may be configured to communicate via the respective multi-feed antenna terminal, e.g., by transmitting and/or receiving an analog signal within a respective component carrier frequency range (also referred to as frequency block or as communication channel) via the multi-feed antenna terminal. In RF communication, the available frequency spectrum may be divided into multiple bands, wherein each band may be subdivided into multiple frequency blocks (also referred to as sub-band), which may not overlap each other. For example, the 802.11 standard may provide several distinct radio frequency bands for use in Wi-Fi communications, for example, a so called 900 MHz band, a 2.4 GHz band, a 3.6 GHz band, a 4.9 GHz band, a 5 GHz band, a 5.9 GHz band and the like (denoted according to the lower frequency limit).
A communication channel may have a certain capacity for transmitting information, often measured by its bandwidth (also referred to as channel bandwidth) in hertz (Hz) or its data rate in bits per second. The bandwidth (BW) is the continuous band of frequencies occupied by a modulated carrier signal and denotes the difference between the upper frequency limit and lower frequency limit of the communication channel. The maximum possible data rate per user is increased the more communication channels are assigned to the wireless mobile device, e.g., a respective communication conducted by the wireless mobile device (e.g., on software-level).
Some examples may be used in various wireless communication devices, for example, a User Equipment (UE), a Mobile Device (MD), a wireless station (STA), a Personal Computer (PC), a desktop computer, a mobile computer, a laptop computer, a notebook computer, a tablet computer, a server computer, a handheld computer, a sensor device, an Internet of Things (IoT) device, a wearable device, a handheld device, a Personal Digital Assistant (PDA) device, a hybrid device, a health-related device, a vehicular device, a non-vehicular device, a wireless communication station, a wireless Access Point (AP), a wireless router, a wireless modem, a video device, an audio device, an audio-video (A/V) device.
Some examples may be used for “peer to peer (PTP) communication”, which may relate to device-to-device communication over a wireless link (“peer-to-peer link”) between devices. The PTP communication may include, for example, a Wi-Fi Direct (WFD) communication, e.g., a WFD Peer to Peer (P2P) communication, wireless communication over a direct link within a Quality of Service (QoS) basic service set (BSS), a tunneled direct-link setup (TDLS) link, a STA-to-STA communication in an independent basic service set (IBSS), a Wi-Fi Aware communication, a Vehicle-to-Anything (V2X) communication, an IoT communication, or the like. Other aspects may be implemented for any other additional or alternative communication scheme and/or technology.
Some examples may be used in devices operating in accordance with existing IEEE 802.11 standards (including IEEE 802.11-2016 (IEEE 802.11-2016, IEEE Standard for Information technology—Telecommunications and information exchange between systems local and metropolitan area networks—Specific requirements Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications, Dec. 7, 2016)), and/or future versions and/or derivatives thereof (e.g., wireless local area network stations (WLAN STAs) or WiFi stations (WiFi STAs)), including any device that contains an IEEE 802.11-conformant media access control (MAC) and physical layer (PHY) interface to the wireless medium (WM).
Some examples may be used in conjunction with a WLAN, e.g., a WiFi network. Other aspects may be used in conjunction with any other suitable wireless communication network, for example, a wireless area network, a “piconet”, a WPAN, a WVAN and the like.
Some examples may be used in conjunction with a wireless communication network communicating over a frequency band of 2.4 GHz, 5 GHz, and/or 6-7 GHz. However, other aspects may be implemented utilizing any other suitable wireless communication frequency bands, for example, an Extremely High Frequency (EHF) band (the millimeter wave (mmWave) frequency band), e.g., a frequency band within the frequency band of between 20 GHz and 300 GHz, a WLAN frequency band, a WPAN frequency band, and the like.
Some examples may be used in devices operating in accordance with existing cellular specifications and/or protocols, e.g., 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE), 3GPP 5G, and/or future versions and/or derivatives thereof, units and/or devices which are part of the above networks, and the like.
Some examples may be used for one way and/or two-way radio communication systems, cellular radio-telephone communication systems, a cellular telephone, a WLAN telephone, a Personal Communication Systems (PCS) device, a device which incorporates a wireless communication device, a mobile or portable Global Positioning System (GPS) device, a device which incorporates a GPS receiver or transceiver or chip, a device which incorporates an RFID element or chip, a Multiple Input Multiple Output (MIMO) transceiver or device, a Single Input Multiple Output (SIMO) transceiver or device, a Multiple Input Single Output (MISO) transceiver or device, a device having one or more internal antennas and/or external antennas, Digital Video Broadcast (DVB) devices or systems, multi-standard radio devices or systems, a wired or wireless handheld device, e.g., a Smartphone, a Wireless Application Protocol (WAP) device, or the like.
Some examples may be used in conjunction with one or more types of wireless communication signals and/or systems, for example, Radio Frequency (RF), Infra-Red (IR), Frequency-Division Multiplexing (FDM), Orthogonal FDM (OFDM), Orthogonal Frequency-Division Multiple Access (OFDMA), Spatial Divisional Multiple Access (SDMA), Time-Division Multiplexing (TDM), Time-Division Multiple Access (TDMA), Multi-User MIMO (MU-MIMO), General Packet Radio Service (GPRS), extended GPRS (EGPRS), Code-Division Multiple Access (CDMA), Wideband CDMA (WCDMA), CDMA 2000, single-carrier CDMA, multi-carrier CDMA, Multi-Carrier Modulation (MDM), Discrete Multi-Tone (DMT), Bluetooth□, Global Positioning System (GPS), Wi-Fi, Wi-Max, ZigBee™, Ultra-Wideband (UWB), Global System for Mobile communication (GSM), 2G, 2.5G, 3G, 3.5G, 4G, 5G, 6G, 3GPP, Long Term Evolution (LTE), LTE advanced, Enhanced Data rates for GSM Evolution (EDGE), O-RAN or the like. Other aspects may be used in various other devices, systems and/or networks.
In this description, a chip can include one or more chiplets on a common carrier. A chiplet can be a functional block in the form of an integrated circuit that can be specifically designed to work with other chiplets to form larger more complex chips. That is, chiplets can refer to the independent constituents which make up a large chip built out of multiple smaller chiplets or dice. Chiplet(s) may be provided with or without encapsulating material packaging the chiplet(s).
In this description, the term “package” refers to hardware components (e.g., CPU, memory, and I/O devices) that may be interconnected and packed to form a system that may be integrated into a single unit with metallic finishing for physical mounting on a circuit board. That is, a package may be a full hardware module and that may be plugged into a server-chassis. A package can include one or more chips.
In various aspects, a package may include a CPU and non-CPU components, such as memory (DRAM modules), I/O devices, and accelerators.
In various aspects, components in a package may be interconnected with silicon vias, metallic wires or wireless by a RF signal interface.
In various aspects, a package may include only a single CPU chip (plus other non-CPU components). In various aspects, a CPU chip may include only one single CPU chip. In various aspects, a CPU chip may include a single CPU die, which in turn may include a plurality of CPU cores. In various aspects, a CPU chip may include a plurality of CPU dice that may be interconnected with an embedded multi-die interconnect bridge.
This is a national phase of PCT Application PCT/US2020/066748 filed on Dec. 23, 2020, the entire contents of which are incorporated by reference.
Filing Document | Filing Date | Country | Kind |
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PCT/US2020/066748 | 12/23/2020 | WO |