The present invention relates generally to electrical contact structures suitable for use on the wafer-side of wafer translators, and methods of making the same. More particularly, formation of such electrical contacts, which are suitable for making electrical connection between the pads of unsingulated integrated circuits on a semiconductor wafer and the electrical pathways of the wafer translator, includes the use of a wire-bonding machine.
Advances in semiconductor manufacturing technology have resulted in, among other things, reducing the cost of sophisticated electronics to the extent that integrated circuits have become ubiquitous in the modern environment.
As is well-known, integrated circuits are typically manufactured in batches, and these batches usually contain a plurality of semiconductor wafers within and upon which integrated circuits are formed through a variety of semiconductor manufacturing steps, including, for example, masking, patterning, depositing, ion implanting, annealing, etching, planarizing and so on. Typical integrated circuits include circuit elements such as, for example, transistors and diodes. These circuit elements are formed in and near the surface of the wafer.
It is common to manufacture integrated circuits on roughly circular semiconductor substrates, or wafers. Further, it is common to form such integrated circuits so that conductive regions disposed on, or close to, the uppermost layers of the integrated circuits are available to act as terminals for connection to various electrical elements disposed in, or on, the lower layers of those integrated circuits. These terminals are often referred to as pads. Completed wafers are tested to determine which die, or integrated circuits, on the wafer are capable of operating according to predetermined specifications. In this way, integrated circuits that cannot perform as desired are not packaged, or otherwise incorporated into finished products. In testing, these pads are commonly contacted with a probe card.
Unfortunately, there are some problems associated with the fabrication and use of probe cards. The maintenance of probe tip accuracy, good signal integrity, and overall dimensional accuracy severely strains probe card fabrication and repair methods because of the multiple component and assembly error budget entries.
An alternative to probe cards in the testing of unsingulated integrated circuits on semiconductor wafers is the wafer translator. One aspect of wafer translator design and fabrication relates to the contact structures on the wafer-side of wafer translators. These contact structures serve to provide an electrical connection between the pads of integrated circuits and the electrically conductive pathways of the wafer translator.
What is needed are contact structures suitable for use on the wafer-side of wafer translators and methods for making the same.
Briefly, contact structures suitable for use on the wafer-side of wafer translators are produced using the programmable features of a wire-bonding machine and further using subsequent steps including but not limited to, masking, etching, grinding, and annealing.
In one aspect, multiple electronic flame-off (EFO) operations are performed to produce both a free-air ball at one end of a wire for ball bonding, and to produce a region of modified grain structure in the wire at a predetermined distance from the free-air ball. The grain structure modification obtained by EFO operations affects the tail termination operation of the wire bonding machine thereby controlling, at least in part, the contact structure height and tip shape.
Reference herein to “one embodiment”, “an embodiment”, or similar formulations, means that a particular feature, structure, operation, or characteristic described in connection with the embodiment, is included in at least one embodiment of the present invention. Thus, the appearances of such phrases or formulations herein are not necessarily all referring to the same embodiment. Furthermore, various particular features, structures, operations, or characteristics may be combined in any suitable manner in one or more embodiments.
The term “pad”, as used herein, generally refers to a conductive region where physical and electrical connection between one component and another is made. In the context of integrated circuits, pad typically refers to a metallized region of the surface of the integrated circuit, which is commonly used to form a physical connection terminal for communicating signals to and/or from the integrated circuit. Such integrated circuit pads may be formed of a metal, a metal alloy, or a stack structure including several layers of metals and/or metal alloys that are present, typically, at the uppermost layer of conductive material of an integrated circuit.
The expression “wafer translator” refers to an apparatus facilitating the connection of I/O pads (sometimes referred to as terminals, pads, contact pads, bonding pads, chip pads, or test pads) of unsingulated integrated circuits, to other electrical components. It will be appreciated that “I/O pads” is a general term, and that the present invention is not limited with regard to whether a particular pad of an integrated circuit is part of an input, output, or input/output circuit. A wafer translator may be disposed between a wafer and other electrical components. The wafer translator includes a substrate having two major surfaces, each surface having terminals disposed thereon, and electrical pathways disposed through the substrate to provide for electrical continuity between at least one terminal on a first surface and at least one terminal on a second surface. The major surface designed to be disposed on a wafer is referred to herein as the wafer-side of the wafer translator. The wafer-side of the wafer translator has a pattern of terminals that matches the layout of at least a portion of the I/O pads of the integrated circuits on the wafer. The wafer translator, when disposed between a wafer and other electrical components, makes electrical contact with one or more I/O pads of a plurality of integrated circuits on the wafer, providing an electrical pathway therethrough to the other electrical components. The wafer translator is a structure that is used to achieve electrical connection between one or more electrical terminals that have been fabricated at a first scale, or dimension, and a corresponding set of electrical terminals that have been fabricated at a second scale, or dimension. The wafer translator provides an electrical bridge between the smallest features in one technology (e.g., pins of a probe card) and the largest features in another technology (e.g., bonding pads of an integrated circuit). For convenience, wafer translator is referred to simply as translator where there is no ambiguity as to its intended meaning.
The terms chip, integrated circuit, semiconductor device, and microelectronic device are sometimes used interchangeably in this field. Further, the term die (pl. dice) is understood in this context to refer to The present invention relates to the manufacture and test of chips, integrated circuits, semiconductor devices and microelectronic devices as these terms are commonly understood in the field.
In one aspect of the present invention, in a wire-bonding machine including a capillary, a wire and an electronic flame-off apparatus, a free-air ball is formed at a distal end of the wire by a first electronic flame-off operation, the relative position of the wire and electronic flame-off apparatus are changed, a second electronic flame-off operation is performed so as to create an annealed zone in the wire between the free-air ball and the capillary, the wire is ball bonded to a conductive pad on the wafer-side of a wafer translator, the relative position of capillary and the wafer translator is changed such that the annealed zone of wire is stretched and separates into at least two pieces, one being a contact structure ball bonded to the wafer translator and having a pointed tip.
In another aspect of the present invention, one contact structure is formed from a single loop of wire that is bonded in two places to the wafer-side of a wafer translator. In a wire-bonding machine including a capillary, a wire and an electronic flame-off apparatus, a first end of the wire is ball-bonded to a conductive region, a second end of the wire is wedge-bonded to the conductive region, wherein the distance between the ball-bond and the wedge-bond is such that a portion of the wire disposed between the ball-bond and the wedge-bond is folded together. This provides a contact structure suitable for use on the wafer side of the wafer translator. The height of the contact structure is programmable by means of supplying control information to the wire bonding machine.
In another aspect of the present invention, two contact structures are formed from a single loop of wire that is bonded in two places to the wafer-side of a wafer translator. In a wire-bonding machine including a capillary, a wire and an electronic flame-off apparatus, a first end of the wire is ball-bonded to a conductive region, a second end of the wire is then wedge-bonded to the same or a different conductive region, wherein the distance between the ball-bond and the wedge-bond is such that the portion of the wire disposed between the ball-bond and the wedge-bond is an open loop, i.e., not touching. The wire loop has a portion extending generally upwardly from the ball-bond, a portion extending generally upwardly from the wedge-bond, and a portion disposed generally horizontally between the two upwardly extending portions. A protective material coating is disposed over the wire, and an upper portion of the protective material and the horizontal portion of the wire is removed. By removing the horizontal portion of the wire, two substantially upwardly extending contact structures are formed. The remainder of the protective material coating is then removed, typically by wet chemical treatment. In at least one embodiment, the upper portion of the coating and the horizontal portion of the wire are removed mechanically by, for example, a grinding wheel. In at least one embodiment, the upper portion of the coating and the horizontal portion of the wire are removed by chemical etching. It is noted that, depending on the material properties of the coating material and the wire, the upper portion of the coating material and the horizontal portion of the wire may be removed concurrently, or the coating material may be removed first by chemical etching and then the horizontal portion of the wire may be removed either chemically or mechanically.
In another aspect of the present invention, one contact structure is formed from a single loop of wire that is bonded in two places to the wafer-side of a wafer translator. Two substantially vertically-oriented contact structures are formed from a single loop of wire that has a ball-bond at one end and a wedge-bond at the other end. One of the two contact structures is then removed either mechanically or chemically.
It will be appreciated that removable attachment of the wafer with the wafer translator may be achieved with alternative arrangements, including but not limited to, aligning the wafer and wafer translator/gasket with each other, in an evacuated chamber, urging them into contact, and returning the atmosphere to the chamber. In this way, the space between the wafer and the wafer translator is evacuated without the need for an evacuation pathway through the translator.
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It is noted that the present invention is not limited to the use of any particular metal or metal alloy as the composition of the wire used to form the contact structures disclosed herein.
Various embodiments of the present invention provide contact structures suitable for use with at least wafer translators.
Various embodiments of the present invention may find application in the fabrication of electrical contact structures.
It is to be understood that the present invention is not limited to the embodiments described above, but encompasses any and all embodiments within the scope of the subjoined Claims and their equivalents.
This application claims priority to U.S. Provisional Application No. 61/345,055, filed on May 14, 2010, and entitled “ELECTRICAL CONTACT STRUCTURES SUITABLE FOR USE ON WAFER TRANSLATORS AND METHODS OF MAKING SAME,” which is incorporated herein in its entirety by reference.
Number | Date | Country | |
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61345055 | May 2010 | US |