Electronic component fabrication method

Abstract
A method for fabricating an electronic component, includes forming a seed film above a base body, cooling said seed film, and putting the cooled seed film into a plating solution to perform electro-plating with said seed film being as a cathode.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a flow chart showing main steps of a fabrication method of a semiconductor device in accordance with an embodiment of this invention.



FIGS. 2A-2C and 3A-3C illustrate, in cross section, some major steps in the manufacture of the semiconductor device in a way corresponding to the flowchart of FIG. 1.



FIG. 4 is a diagram showing one example of a plating apparatus for use with the embodiment method shown in FIG. 1, in the state that a substrate is situated at a waiting position.



FIG. 5 is a diagram showing another example of the plating apparatus with the substrate being held at a plating position in the embodiment.



FIG. 6 depicts in cross-section a device structure as formed at a process step of the embodiment method of FIG. 1.



FIG. 7 shows a cross-sectional device structure with a seed film formed on its top surface in the embodiment.



FIGS. 8A and 8B are diagrams each showing a cross-section of the substrate for explanation of a substrate-cooling effect of the embodiment.



FIGS. 9A and 9B are diagrams showing one example of a substrate-entry scheme in another embodiment of the invention.



FIG. 10 is a graph showing a plot of current density versus varying voltage in steps during plating with multiple current density values.


Claims
  • 1. A method for fabricating an electronic component, comprising: forming a seed film above a base body;cooling said seed film; andputting the cooled seed film into a plating solution to perform electro-plating with said seed film being as a cathode.
  • 2. The method according to claim 1, wherein a gas is used to cool a back surface of said base body to thereby cool said seed film.
  • 3. The method according to claim 2, wherein said gas is any one of a nitrogen gas and an air.
  • 4. The method according to claim 1, wherein when performing said electro-plating, said seed film is dipped into the plating solution while simultaneously applying a voltage to said seed film.
  • 5. The method according to claim 4, wherein during dipping said seed film into said plating solution, said seed film is applied a lower voltage than a start-up voltage for starting electro-plating after the dipping into said plating solution.
  • 6. The method according to claim 5, wherein the voltage as applied when dipping into said plating solution has its current density less than or equal to one-half of a current density of a current to be flown upon start-up of said electro-plating.
  • 7. The method according to claim 5, wherein when performing said electro-plating, a plurality of steps different in current density from each other are performed.
  • 8. The method according to claim 1, wherein said base body has an opening formed therein, and wherein said electro-plating is used to perform filling of a copper-containing film in the opening and additional deposition of said copper-containing film above said base body.
  • 9. The method according to claim 8, wherein the additional deposition is performed while letting said base body be cooled.
  • 10. The method according to claim 9, wherein during the additional deposition of said copper-containing film, electro-plating is performed at a current density of 80 milliamperes per square centimeter (mA/cm2) or greater.
  • 11. The method according to claim 9, wherein said base body is cooled by cooling a back surface of said base body using a gas.
  • 12. The method according to claim 11, wherein said gas is any one of a nitrogen gas and an air.
  • 13. A method for fabricating an electronic component, comprising: forming an opening in a base body;burying a copper-containing film in the opening; andpermitting additional deposition of said copper-containing film above said base body with the opening filled with said copper-containing film while cooling said base body.
  • 14. The method according to claim 13, wherein the burying and the additional deposition are performed by an electro-plating technique.
  • 15. The method according to claim 14, wherein during the additional deposition of said copper-containing film, electro-plating is performed with a current density higher than that during burying said copper-containing film.
  • 16. The method according to claim 14, wherein during the additional deposition of said copper-containing film, electro-plating is performed at a current density of 80 mA/cm2 or greater.
  • 17. The method according to claim 14, wherein said base body is dipped in a plating solution while letting said base body be cooled.
  • 18. The method according to claim 13, wherein a back surface of said base body is cooled by use of a gas.
  • 19. The method according to claim 18, wherein said gas is any one of a nitrogen gas and an air.
  • 20. The method according to claim 13, wherein the burying results in formation of a copper interconnect wire of a semiconductor device.
Priority Claims (1)
Number Date Country Kind
2006-049523 Feb 2006 JP national