The present application claims priority under 35 U.S.C. 119(a) to Japanese Patent Application No. 2010-200243, filed Sep. 7, 2010. The contents of this application are herein incorporated by reference in their entirety.
1. Field of the Invention
The present invention relates to an electronic component package sealing member that can be used as a first sealing member of an electronic component package in which an electrode of an electronic component element is sealed with the first sealing member and a second sealing member that are arranged so as to oppose each other. The present invention also relates to an electronic component package that uses the electronic component package sealing member and to a method for producing the electronic component package sealing member.
2. Discussion of the Background
The packages of electronic components (hereinafter referred to as electronic component packages) such as piezoelectric resonator devices have their internal spaces hermetically enclosed in order to prevent property degradation of the electrodes of the electronic component elements mounted in the internal spaces.
An electronic component package of this kind includes two sealing members such as a base and a lid. The base and the lid define a package in the form of a rectangular parallelepiped. In the internal space of the package, an electronic component element such as a piezoelectric resonator plate is bonded to and held by the base. The bonding of the base and the lid hermetically encloses the electrodes of the electronic component element in the internal space of the package.
For example, Japanese Unexamined Patent Application Publication No. 6-283951 (hereinafter referred to as Patent Citation PLT 1) discloses a crystal part (an electronic component of the present invention) that includes a package defined by the base and the lid. In the internal space of the package, a crystal plate is hermetically enclosed. The crystal part includes a base that has a through hole passing through the substrate of the base. The through hole includes, on its internal surface, a wiring metal made of a multiple-layer metal film such as Cr—Ni—Au. The through hole further includes an alloy such as Au—Ge welded therein, thus securing air tightness of the internal space of the package.
Incidentally, electronic components are heated when mounted on boards such as printed circuit boards. Unfortunately, in the crystal part disclosed in PLT 1, the heat applied to the crystal part when mounted on the board can cause softening (diffusion) of the boundary between the internal surface of the through hole and the alloy attached to the internal surface, degrading the adherence between the alloy and the internal surface of the through hole. The degraded adherence of the alloy causes detachment of the alloy off the internal surface of the through hole, and the detached alloy can drop outside the package of the crystal part. The degradation of the adherence or the dropping of the alloy out of the through hole leads to degraded air tightness of the internal space of package. Thus, the crystal part of PLT 1 may not ensure sufficient air tightness of the internal space of the package after mounted on a printed circuit board.
The present invention has been made in view of the above-described circumstances, and it is an object of the present invention to provide an electronic component package sealing member that, when used as a sealing member of an electronic component package, minimizes the degradation of air tightness of the internal space of the electronic component package, and to provide a method for producing the electronic component package sealing member.
It is another object of the present invention to provide an electronic component package that minimizes the degradation of air tightness of the internal space of the electronic component package.
According to one aspect of the present invention, an electronic component package sealing member can be used as a first sealing member of an electronic component package. The electronic component package includes the first sealing member and a second sealing member. The first sealing member has one principal surface on which an electronic component element is to be mounted. The second sealing member is opposite the first sealing member and hermetically encloses an electrode of the electronic component element. The electronic component package sealing member includes a substrate, a conducting material, and a resin material. The substrate constitutes the electronic component package sealing member. The substrate includes at least one through hole passing through between one principal surface and another principal surface of the substrate. The conducting material is in the at least one through hole. The resin material seals an open end portion of the at least one through hole at a side of the other principal surface of the substrate.
With this configuration, at least one through hole passes through between one principal surface and the other principal surface of the electronic component package sealing member. The open end portion of the at least one through hole at the side of the other principal surface (the surface opposite the mounting surface on which the electronic component element is mounted) is sealed with a resin material. This minimizes detachment of the conducting material filling the at least one through hole and minimizes dropping of the conducting material out of the at least one through hole. Additionally, the resin material sealing the open end portion of the at least one through hole at the side of the other principal surface blocks heat conduction from the other principal surface of the electronic component package sealing member to the conducting material filling the at least one through hole. This minimizes degradation of the adherence between the conducting material and the substrate constituting the electronic component package sealing member, in spite of, for example, heat associated with mounting of the electronic component package on the board. This in turn minimizes degradation of air tightness in the internal space of the electronic component package.
The electronic component package sealing member according to the one aspect of the present invention may further include a seed film on an internal surface of the at least one through hole. A filling layer may be plated on a surface of the seed film. The filling layer may include the conducting material.
This configuration facilitates productivity of the electronic component package sealing member. Specifically, the seed film formation on the at least one through hole and the plating on the filling layer are collectively executable with respect to a plurality of through holes by a sheet method, thus ensuring high productivity. Use of the conducting material constituting the filling layer as a material of the seed film improves the adherence between the seed film and the conducting material, that is, improves the adherence of the conducting material with respect to the electronic component package sealing member.
The electronic component package sealing member according to the one aspect of the present invention may further include a resin pattern sealing the open end portion of the at least one through hole. The resin pattern may include a photosensitive resin material.
In this configuration, the resin pattern made of a photosensitive resin material is easily and precisely formed on the open end portion of the at least one through hole at the side of the other principal surface by photolithography or a like method. The resin pattern securely seals the open end portion of the at least one through hole at the side of the other principal surface. Thus, the resin pattern more securely minimizes the dropping of the conducting material out of the at least one through hole.
According to another aspect of the present invention, an electronic component package includes a first sealing member and a second sealing member. The first sealing member has one principal surface on which an electronic component element is to be mounted. The first sealing member is the electronic component package sealing member according to the one aspect of the present invention. The second sealing member is opposite the first sealing member. The second sealing member hermetically encloses an electrode of the electronic component element.
With this configuration, the electronic component package sealing member according to the one aspect of the present invention is used as the first sealing member. This minimizes dropping of the conducting material filling the at least one through hole of the electronic component package sealing member out of the at least one through hole. Additionally, the resin material sealing the open end portion of the at least one through hole at the side of the other principal surface blocks heat conduction from the other principal surface of the electronic component package sealing member to the conducting material filling the at least one through hole. This minimizes degradation of the adherence between the conducting material and the substrate constituting the electronic component package sealing member, in spite of, for example, heat associated with mounting of the electronic component package on the board. This in turn minimizes degradation of air tightness in the internal space of the electronic component package.
According to another aspect of the present invention, a method is for producing an electronic component package sealing member that can be used as a first sealing member of an electronic component package. The electronic component package includes the first sealing member and a second sealing member. The first sealing member has one principal surface on which an electronic component element is to be mounted. The second sealing member is opposite the first sealing member. The second sealing member hermetically encloses an electrode of the electronic component element. The method includes forming at least one through hole passing through between one principal surface and another principal surface of a substrate constituting the electronic component package sealing member. The at least one through hole is filled with a conducting material. An open end portion of the at least one through hole at a side of the other principal surface of the substrate is sealed with a resin material.
With this method, at least one through hole passes through between one principal surface and the other principal surface of the substrate constituting the electronic component package sealing member. The open end portion of the at least one through hole at the side of the other principal surface is sealed with a resin material. This ensures production of an electronic component package sealing member that minimizes detachment of the conducting material filling the at least one through hole and minimizes dropping of the conducting material out of the at least one through hole. Additionally, with the electronic component package sealing member produced by this method, the resin material sealing the open end portion of the at least one through hole at the side of the other principal surface blocks heat conduction from the other principal surface of the electronic component package sealing member to the conducting material filling the at least one through hole. This minimizes degradation of the adherence between the conducting material and the substrate constituting the electronic component package sealing member, in spite of, for example, heat associated with mounting of the electronic component package on the board. Accordingly this method ensures production of an electronic component package sealing member that minimizes degradation of air tightness in the internal space of the electronic component package.
The method according to the other aspect of the present invention may further include forming a seed film on an internal surface of the at least one through hole. The filling step may include plating a filling layer on a surface of the seed film. The filling layer may include the conducting material.
This method improves the productivity of the electronic component package sealing member. Specifically, the seed film formation on the at least one through hole and the plating on the filling layer are collectively executable with respect to a plurality of through holes by a sheet method, thus improving the productivity. Use of the conducting material constituting the filling layer as a material of the seed film improves the adherence between the seed film and the conducting material, that is, improves the adherence of the conducting material with respect to the substrate constituting the electronic component package sealing member.
In the method according to the other aspect of the present invention, the sealing step may include forming a resin pattern to seal the open end portion of the at least one through hole by photolithography using the resin material. The resin material may have photosensitivity.
With this method, the resin pattern is easily and precisely formed by photolithography using a resin material having photosensitivity. This, as a result, ensures hermetic enclosure of the open end portion of the at least one through hole at the side of the exterior of the electronic component package.
Embodiments of the present invention will be described below by referring to the accompanying drawings. In the following embodiments, the present invention is applied to a package of a crystal resonator, which is a piezoelectric resonator device, as an electronic component package. The present invention is also applied to a tuning-fork crystal resonator plate, which is a piezoelectric resonator plate, as an electronic component element.
As shown in
In the crystal resonator 1, the base 4 and the lid 7 are bonded to each other with a bonding material 12 made of a Au—Sn alloy, a first bonding layer 48 described below, and a second bonding layer 74 described below. The bonding results in a main casing defining a hermetically enclosed internal space 11. In the internal space 11, the crystal resonator plate 2 is electrically and mechanically bonded to the base 4 by ultrasonic bonding of Flip Chip Bonding (FCB) with a conductive bump 13 such as gold bump. In this embodiment, the conductive bump 13 used is a bump plating made of a non-liquid member such as a gold bump.
Next, the constituents of the crystal resonator 1 will be described below.
The base 4 is made of glass material such as borosilicate glass. As shown in
The internal surface of the wall portion 44 of base 4 has a tapered shape. The wall portion 44 has a top face serving as a bonding face for the lid 7, and the bonding face has a first bonding layer 48 for bonding with the lid 7. The first bonding layer 48 has a multiple-layer structure that includes: a sputtering film (see reference numeral 92 in
The base 4 includes, on its one principal surface 42, a cavity 45 having a rectangular shape in plan view surrounded by the bottom portion 41 and the wall portion 44. The cavity 45 includes, on its bottom face 451, a pedestal portion 46 etched over the entire one end portion 452 in a longer side direction. The crystal resonator plate 2 is mounted on the pedestal portion 46. The wall face of the cavity 45 is the internal surface of the wall portion 44 and tapered as described above.
The base 4 includes a pair of electrode pads 51 and 52, external terminal electrodes 53 and 54, and a wiring pattern 55. The electrode pads 51 and 52 are electrically and mechanically coupled to the driving electrodes 31 and 32, respectively, of the crystal resonator plate 2. The external terminal electrodes 53 and 54 are electrically coupled to an external part or an external device. The wiring pattern 55 electrically couples the electrode pad 51 to the external terminal electrode 54, and electrically couples the electrode pad 52 to the external terminal electrode 53. The electrode pads 51 and 52, the external terminal electrodes 53 and 54, and the wiring pattern 55 constitute an electrode 5 of the base 4. The electrode pads 51 and 52 are disposed on the surface of the pedestal portion 46. The two external terminal electrodes 53 and 54 are disposed on both sides of the other principal surface 43 of the base 4 and separated from one another in the longer side direction.
The electrode pads 51 and 52 include a first seed film on a substrate of the base 4 (see reference numeral 92 in
The wiring pattern 55 is formed from the one principal surface 42 of the base 4 to the other principal surface 43 of the base 4 via an internal surface 491 of through holes 49 (see below) such that the electrode pads 51 and 52 are electrically coupled to the external terminal electrodes 53 and 54. The wiring pattern 55 includes a first seed film (see reference numeral 92 in
The external terminal electrodes 53 and 54 includes a seed film (see reference numeral 93 in
As shown in
The through holes 49 are simultaneously formed with the cavity 45 at the time of etching of the base 4 by photolithography. As shown in
The internal surfaces 491 of the through holes 49 each include a first seed film (see reference numeral 92 in
Each through hole 49 has an open end portion at the side of the other principal surface 43 of the base 4 (an open end portion at the side of the other end opening face 493). The open end portion is sealed with a resin pattern 61 made of a photosensitive resin material.
The resin pattern 61 is disposed on the other principal surface 43 of the base 4. As shown in
As shown in
A part of the wiring pattern 55 at the side of the other principal surface 43 of the base 4 avoids being coated by the resin pattern 61. Specifically, the part of the wiring pattern 55 is disposed at an area 552 that is a periphery of the resin pattern formed area 47 in plan view, along both end portions 473 and 474 of the longer sides 471 and the shorter sides 472 of the resin pattern formed area 47 (see
A resin material constituting the resin pattern 61 uses polybenzoxazole (PBO). The resin material constituting the resin pattern 61 is not limited to polybenzoxazole (PBO). It is also possible to use any resin material that has satisfactory adherence with respect to the material constituting the base 4 (such as glass material). Examples of the resin material constituting the resin pattern 61 include benzocyclobutene (BCB), epoxy, polyimide, and fluororesin. The resin material constituting the resin pattern 61 in the embodiment, namely, polybenzoxazole (PBO), is a photosensitive resin material that ensures pattern formation by photolithography. As used herein, the term photosensitive resin material broadly encompasses a photosensitive resin composition containing a photosensitizing agent and a resin, as well as a resin material made of a photosensitive resin.
The lid 7 is made of a glass material such as borosilicate glass. As shown in
Both side faces of the wall portion 73 of the lid 7 (an internal surface 731 and an outer surface 732) each have a tapered shape. The wall portion 73 has a second bonding layer 74 to be bonded with the base 4.
As shown in
The bonding material 12 bonds the base 4 and the lid 7, and is layered on the second bonding layer 74 of the lid 7. The bonding material 12 has a multiple-layer structure of a Au/Sn film (not shown) made of Au/Sn alloy plated on the second bonding layer 74 of the lid 7 and a Au film (not shown) plated on the Au/Sn film. The Au film has a multiple-layer structure of a Au strike plated film and a Au plated film plated on the Au strike plated film. In the bonding material 12, the Au/Sn film is melted by heat melting into a Au/Sn alloy film. The bonding material 12 may be a Au/Sn alloy film plated on the second bonding layer 74 of the lid 7. While in the embodiment the bonding material 12 is layered on the second bonding layer 74 of the lid 7, it is also possible to layer the bonding material 12 on the first bonding layer 48 of the base 4.
The crystal resonator plate 2 is a Z-plate quartz crystal into which a crystal blank (not shown) that is an anisotropic crystal plate is formed by wet etching.
As shown in
As shown in
As shown in
As shown in
The crystal resonator plate 2 thus configured includes first and second driving electrodes 31 and 32 that have different potentials, and extraction electrodes 33 and 34 respectively extended from the first and second driving electrodes 31 and 32 to electrically couple the first and second driving electrodes 31 and 32 to the electrode pads 51 and 52 of the base 4.
Parts of the first and second driving electrodes 31 and 32 are disposed inside the groove portions 25 of the leg portions 21 and 22. This minimizes vibration loss of the leg portions 21 and 22 even if the crystal resonator plate 2 is downsized, thus minimizing the CI value.
First driving electrodes 31 are disposed at both principal surfaces of one leg portion 21, at both side faces of the other leg portion 22, and at both principal surfaces of the distal end portion 221. Similarly, second driving electrodes 32 are disposed at both principal surfaces of the other leg portion 22, at both side faces of one leg portion 21, and at both principal surfaces of the distal end portion 211.
The extraction electrodes 33 and 34 are disposed on the base portion 23 and the bonding portion 24. The extraction electrode 33 on the base portion 23 couples the first driving electrodes 31 on both principal surfaces of one leg portion 21 to both side faces of the other leg portion 22 and to the first driving electrodes 31 on both principal surfaces of the distal end portion 221. The extraction electrode 34 on the base portion 23 couples the second driving electrodes 32 on both principal surfaces of the other leg portion 22 to both side faces of one leg portion 21 and to the second driving electrodes 32 on both principal surfaces of the distal end portion 211.
The base portion 23 has two through holes 26 passing through both principal surfaces of the piezoelectric resonator blank 20. The through holes 26 are filled with conducting material. The extraction electrodes 33 and 34 are extended between both principal surfaces of the base portion 23 via the through holes 26.
As shown in
Next, a method for producing the crystal resonator 1 and the base 4 will be described below by referring to
As shown in
After the base forming step, a Ti layer made of Ti is formed on the wafer 8 (including both principal surfaces 81 and 82 and the internal surfaces 491 of the through holes 49) by sputtering. After the Ti layer formation, a Cu layer made of Cu is layered on the Ti layer by sputtering, thus forming a first metal layer 92 as shown in
After the metal layer forming step, a resist is applied on the first metal layer 92 by dip-coating, thus forming a new positive resist layer 97 (resist layer forming step). Then exposure and development by photolithography are carried out with respect to parts of the positive resist layer 97 formed on the open end portion of the through holes 49 of the wafer 8 at the side of the one principal surface 81, thus carrying out pattern formation with respect to the internal surfaces of the through holes 49 as shown in
After the pattern forming step, Cu electrolytic plating is carried out with respect to the first metal layer 92 (seed film) exposed at the internal surfaces 491 of the through holes 49, thus plating an infill layer 98 made of Cu as shown in
After the filling step, the positive resist layer 97 is delaminated as shown in
After the resist delaminatioin step, a resist is applied on the first metal layer 92 and the infill layer 98 by dip-coating, thus forming a new positive resist layer 97 (second resist layer forming step). Then exposure and development are carried out with respect to the positive resist layer except for parts of the positive resist layer corresponding to the to-be-formed electrode pads 51 and 52 and the wiring pattern 55, thus carrying out pattern formation of the electrode pads 51 and 52, the wiring pattern 55, and the outline of the base 4 shown in
After the second pattern forming step, the exposed first metal layer 92 is removed by metal etching (metal etching step shown in
After the metal etching step, the positive resist layer 97 is delaminated as shown in
After the second resist delaminatioin step, a photosensitive resin material is applied on the first metal layer 92, the infill layer 98, and both principal surfaces 81 and 82 of the exposed wafer 8 by dip-coating, thus forming a resin layer 96 (resin layer forming step of
After the resin layer forming step, exposure and development by photolithography are carried out with respect to the resin layer 96 except for parts of the resin layer 96 corresponding to the to-be-formed resin pattern 61 that seals the open end portions of the through holes 49 at the side of the other end opening face 493, thus forming the resin pattern 61 as shown in
After the resin pattern forming step, a Ti layer made of Ti is formed by sputtering on the exposed first metal layer 92 and resin layer 96 and the exposed both principal surfaces 81 and 82 of the wafer 8 as shown in
After the second metal layer forming step, a resist is applied on the second metal layer 93 by dip-coating, thus forming a new positive resist layer 97 (third resist layer forming step). Then exposure and development by photolithography are carried out with respect to parts of the positive resist layer 97 corresponding to the to-be-formed external terminal electrodes 53 and 54 of the base 4, thus forming a pattern of the external terminal electrodes 53 and 54 of the base 4 as shown in
After the third pattern forming step, a first plated layer 94 made of Ni is plated on the exposed second metal layer 93 as shown in
After the first plate forming process, the positive resist layer 97 is delaminated (third resist delaminatioin step shown in
After the third resist delaminatioin step, a resist is applied on the exposed second metal layer 93 and first plated layer 94 by dip-coating, thus forming a new positive resist layer 97 (fourth resist layer forming step shown in
After the fourth pattern forming step, a second plated layer 95 made of Au is plated on the exposed second metal layer 93 and first plated layer 94 as shown in
After the second plate forming step, the positive resist layer 97 is delaminated as shown in
After the fourth resist delaminatioin step, a resist is applied on the exposed second metal layer 93 and second plated layer 95 by dip-coating, thus forming a new positive resist layer 97 (fifth resist layer forming step shown in
After the fifth pattern forming step, the exposed second metal layer 93 is delaminated by metal etching as shown in
After the second metal etching step, the positive resist layer 97 is delaminated, thus forming a plurality of bases 4 on the wafer 8 as shown in
After the fifth resist delaminatioin step, the plurality of bases 4 are divided into individual bases 4 (base dividing step), thus producing the plurality of bases 4 shown in
The crystal resonator plate 2 shown in
In the above-described production process, the step of forming the through holes 49 in the base forming step corresponds to the through hole forming step of the present invention. The step of forming the first metal layer 92 of the seed film on the internal surfaces 491 of the through holes 49 after the metal layer forming step corresponds to the seed film forming step of the present invention. In the filling step, the step of Cu electrolytic plating on the exposed first metal layer 92 (seed film) at the internal surfaces 491 of the through holes 49 corresponds to the plating step of the present invention. The step of forming the resin pattern 61 and sealing the open end portion at the other end opening face 493 side of the through holes 49 with the resin pattern 61, after the resin layer forming step and the resin pattern forming step, corresponds to the sealing step of the present invention.
With the crystal resonator 1 according to the above-described embodiment, the resin pattern 61, which seals the open end portions of the through holes 49 at the side of the other end opening faces 493 and which contacts the other end face 982 of the infill layer 98, minimizes detachment and dropping of the conducting materials (infill layers 98) filling the through holes 49 out of the through holes 49. This minimizes degradation of air tightness in the internal space 11 of the crystal resonator 1.
In the crystal resonator 1 according to this embodiment, as shown in
In the crystal resonator 1 according to this embodiment, the infill layer 98 prevents entrance of gas into the internal space 11, when such gas occurs from the resin pattern 61 by the influence of heat associated with mounting of the crystal resonator 1 on the printed circuit board.
In the crystal resonator 1 according to this embodiment, the infill layer 98 includes a Cu plated layer plated on the seed film (see reference numeral 92 in
In the crystal resonator 1 according to this embodiment, as shown in
In the crystal resonator 1 according to this embodiment, the resin pattern 61, which seals the open end portions of the through holes 49 at the side of the other end opening faces 493, is formed approximately over the entire surface of the other principal surface 43, except its outer periphery portion. This, however, is a preferred example and should not be construed in a limiting sense. For example, as shown in
In the crystal resonator 1 according to this embodiment, the electrode pads 51 and 52 and the wiring pattern 55 include the first seed film (see reference numeral 92 in
In the base 4 of the crystal resonator 1 according to the embodiment, the first bonding layer 48 includes: the sputtering film (see reference numeral 93 in
In the base 4 of the crystal resonator 1 according to this embodiment, the external terminal electrodes 53 and 54 include: the seed film (see reference numeral 93 in
While in this embodiment the material used as the base 4 and the lid 7 is glass, the base 4 and the lid 7 will not be limited to glass. For example, it is also possible to use a quartz crystal.
While in this embodiment Au/Sn is mainly used as the bonding material 12, the bonding material 12 will not be particularly limited insofar as the base 4 and the lid 7 are bonded to one another. For example, it is also possible to use Sn alloy brazing filler metal of Cu/Sn or the like.
While in this embodiment the crystal resonator 1 uses the tuning-fork crystal resonator plate 2 shown in
The base 4 according to this embodiment may include an IC chip in addition to the crystal resonator plate 2, thus implementing an oscillator. Mounting an IC chip on the base 4 involves formation of electrodes on the base 4 in conformity of the electrode configuration of the IC chip.
The present invention can be embodied and practiced in other different forms without departing from the spirit and essential characteristics of the present invention. Therefore, the above-described embodiments are considered in all respects as illustrative and not restrictive. The scope of the invention is indicated by the appended claims rather than by the foregoing description. All variations and modifications falling within the equivalency range of the appended claims are intended to be embraced therein.
Number | Date | Country | Kind |
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2010-200243 | Sep 2010 | JP | national |