CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority to European Patent Application No. 23218693.2, filed Dec. 20, 2023, the contents of which is hereby incorporated by reference in its entirety.
TECHNICAL FIELD
The present disclosure relates to electronic components, and particularly to the reliability of the electric connections between a component and the circuit board where the component is mounted.
BACKGROUND
Electronic components typically contain a semiconductor chip which is mounted on a supporting surface and then protected with a package which encapsulates the sensitive chip and shields it from the surrounding environment. The package forms a part of the component. Electrical conductors which extend from the chip to the outside of the package connect the chip to the outside world. When the electronic component is mounted on a circuit board, the outer end of these electrical conductors is typically connected to conductors on the circuit board. The electrical circuit on the circuit board can thereby interact with the chip inside the electronic component.
Electronic components are often mounted and electrically connected to circuit boards with mechanically rigid connections. The connection may for example be solder connection which solidifies after the desired electrical connection has been made. A general problem with such connections is that they may be damaged by thermal stress. The circuit board may for example undergo heat expansion. If the electronic component expands less than the circuit board, the rigid electrical connections between the circuit board and an electronic component mounted on the circuit board may crack.
U.S. pre-grant publication 2016/0113127 discloses an electronic module where a laminated sequence of layers forms the lower part of a package and provides flexibility to the module. However, this requires a complex manufacturing process with many consecutive lamination steps.
SUMMARY OF THE INVENTION
An object of the present disclosure is to provide an electronic component which avoids the disadvantage indicated above.
In some aspects, the techniques described herein relate to an electronic component including: a substrate which defines a horizontal xy-plane and a vertical z-direction which is perpendicular to the horizontal xy-plane, wherein the substrate includes a second side and a first side, at least one conductor region and at least one chip region in the horizontal xy-plane, one or more chips attached to the at least one chip region on the substrate, a packaging layer including a second side and a first side, wherein the second side of the packaging layer is attached to the first side of the substrate, wherein the packaging layer further includes one or more cavities in the at least one conductor region, and the one or more cavities extend from the first side of the packaging layer to the second side of the packaging layer, and wherein each of the one or more cavities contains a gas.
BRIEF DESCRIPTION OF THE DRAWINGS
In the descriptions that follow, like parts are marked throughout the specification and drawings with the same numerals, respectively. The drawings are not necessarily drawn to scale and certain drawings may be illustrated in exaggerated or generalized form in the interest of clarity and conciseness. The disclosure itself, however, as well as a mode of use, further features and advances thereof, will be understood by reference to the following detailed description of illustrative implementations of the disclosure when read in conjunction with reference to the accompanying drawings wherein:
FIG. 1 illustrates an electronic component in accordance with aspects of the present disclosure;
FIG. 2 illustrates an electronic component under thermal stress in accordance with aspects of the present disclosure;
FIGS. 3a and 3b illustrate optional arrangements for accommodating thermal stress in accordance with aspects of the present disclosure;
FIGS. 4a, 4b and 4c illustrate xy-cross sections of electronic components in accordance with aspects of the present disclosure;
FIG. 5 illustrate a manufacturing method in accordance with aspects of the present disclosure;
FIG. 6 illustrate a manufacturing method in accordance with aspects of the present disclosure;
FIGS. 7a and 7b illustrate manufacturing method in accordance with aspects of the present disclosure; and
FIGS. 8a, 8b, 8c and 8d illustrate additional options in accordance with aspects of the present disclosure.
DETAILED DESCRIPTION OF THE DISCLOSURE
Hereinbelow, exemplary aspects of the present disclosure will be described. In a following description of the drawings, the same or similar components will be represented with use of the same or similar reference characters. The drawings are exemplary, sizes or shapes of portions are schematic, and technical scope of the present disclosure should not be understood with limitation to the aspects.
This disclosure describes an electronic component which comprises a substrate which defines a horizontal xy-plane and a vertical z-direction which is perpendicular to the xy-plane. The electronic component comprises at least one conductor region and at least one chip region in the xy-plane. The substrate has a first side and a second side.
The electronic component also comprises one or more chips attached to the one or more chip regions on the substrate. The electronic component also comprises a packaging layer which has a first side and a second side. The second side of the packaging layer is attached to the first side of the substrate. The packaging layer comprises one or more cavities in the at least one conductor region. The one or more cavities extend from the first side of the packaging layer to the second side of the packaging layer. The electronic component comprises one or more vertical electrical conductors which are attached to the substrate in the at least one conductor region. The one or more vertical electrical conductors extend through the one or more cavities in the vertical direction.
The first and second sides of the substrate are opposite to each other in the z-direction. The first and second sides of the packaging layer are opposite to each other in the z-direction.
The at least one vertical electrical conductor may be in electrical contact with the one or more chips. The at least one vertical electrical conductor may thereby form a part of a signal connection between the one or more chips and an external circuit. The at least one vertical electrical conductor may be partly exposed on the bottom of the electronic component, so that it can be connected to an external circuit, for example when the electronic component mounted on an external circuit board.
The term “horizontal” refers in this disclosure to directions which are parallel to the xy-plane. The term “vertical” refers to a direction which is perpendicular to the xy-plane. These terms do not refer to the direction of the Earth's gravity. In other words, the electronic component may be oriented in any direction when the component is used or when it is manufactured, and the vertical direction does not necessarily coincide with the direction of gravitational force (though they may coincide). These considerations apply also to terms such as “top” and “bottom”.
For purposes of this disclosure, even though some parts of the electronic component are described as “vertical” parts in this disclosure, that does not mean that they must always necessarily be perfectly vertical. Instead, in this context the term vertical simply means that these parts extend in the general direction of the z-axis without any turns in the horizontal direction.
Each of the one or more vertical electrical conductors may be embedded in a layer of elastic material, so that the layer of elastic material fills the corresponding cavity and lies between the vertical electrical conductor and the packaging layer in the horizontal direction.
The layer of elastic material may also be called a buffer, or a buffer layer. The substrate may also be called an interposer.
Alternatively, each of the one or more cavities may be filled with a gas, so that each of the one or more vertical electrical conductors is surrounded by the gas in the corresponding cavity. The gas may have low pressure, and in some aspects the one or more cavities may be filled with vacuum. These options will be discussed in more detail below.
FIG. 1 illustrates an electronic component 10 which comprises a substrate 13. The electronic component 10 comprises conductor regions 31 and chip regions 32. The number of conductor regions and chip regions can be freely selected. The substrate has a first side 131, which may also be called a first surface. The first side 131 is illustrated as the bottom side of the substrate 13 in FIG. 1. The substrate also has a second side 132, which may be called a second surface. The second side 132 is illustrated as the top side of the substrate 13 in FIG. 1.
The substrate 13 may for example be a circuit board. It may for example be a ceramic substrate, or a substrate made of FR4. The substrate may comprise conductive vias which provide electrical connections between the first and second sides of the substrate.
The electronic component 10 comprises one or more chips 16 attached to the substrate 13 in the one or more chip regions 31. These chips 16 may be attached to the first side 131 of the substrate and/or to the second side 132 of the substrate, as FIG. 1 illustrates. The chips 16 may also be called electronic chips or dies. The chips 16 may for example be MEMS chips, or ASIC (application-specific integrated circuit) chips.
The one or more chips 16 do not necessarily have to be mounted directly on the substrate. The electronic component may comprise a chip-mounting surface 19 which is attached to the substrate 13. Some or all of the one or more chips 16 may be mounted on the chip-mounting surface 19. Electrical wires 17 may connect the chips 16 electrically to a circuit in and on the substrate 13.
The electronic component 10 also comprises a packaging layer 14. The first side 141 of the packaging layer 14 may form the bottom of the electronic component 10, as FIG. 1 illustrates. The second side 142 of the packaging layer may be attached to the bottom of the substrate 13, as FIG. 1 illustrates.
The packaging layer may comprise a mouldable material. This material may for example be plastic, or it may be a thermoplastic polymer or thermoplastic elastomer. The packaging layer 14 may for example be injection-moulded onto the first surface 131 of the substrate 13. All chips on this side of the substrate may thereby be embedded in the packaging layer 14. Alternatively, the packaging layer may for example be manufactured by transfer molding, compression molding, potting or casting. Other options are also possible. The packaging layer may be a rigid layer which protects the one or more dies 16 and the substrate from the external environment.
The packaging layer 14 comprises one or more cavities 140. Each cavity is located below the substrate 13 in a conductor region 31. The two areas 140 in FIG. 1 could form a single cavity or multiple cavities, as FIGS. 4a-4c illustrate. The cavity 140 on the left is illustrated as an open cavity which is filled with a gas. The cavity 140 on the right is illustrated as a cavity filled with an elastic material 12.
The component 10 also comprises one or more vertical electrical conductors 11. These conductors 11 are located in the conductor regions 31. The vertical electrical conductors 11 may be attached to the first side 131 of the substrate. They may extend in the vertical direction from the first side 131 of the substrate 13 (and the second side 142 of the packaging layer 14) through the cavity 140 in the packaging layer 14 to the first side 141 of the packaging layer 14. The one or more vertical electrical conductors 11 may be exposed on the first side 141 of the packaging layer 14. When the electronic component 10 is mounted onto an external circuit board 22, as in FIG. 2, the conductors 11 may be electrically connected to corresponding contacts 21 on the surface of the external circuit board 22.
The at least one vertical electrical conductor 11 may be embedded in a layer 12 of elastic material, as FIG. 1 illustrates. The layer 12 of elastic material may surround the vertical electrical conductor 11 in all directions which are parallel to the xy-plane. The layer 12 may have the same height in the z-direction as the vertical electrical conductor 11.
If the one or more cavities 140 comprise multiple cavities, then some cavities may be filled with the gas and other cavities may be filled with the elastic material. Alternatively, all cavities may be filled with the gas. Alternatively, all cavities may be filled with the elastic material 12. The gas may be air. The layer of elastic material may for example be silicone, parylene, a gel or acryl. The material which is used in the layer 12 should be significantly more elastic than the material of the packaging layer 14.
The electronic component may optionally comprise a cap 15 on the second side 132 of the substrate 13. The cap 15 may cover any chips 16 which have been mounted on the second side 132 of the substrate 13. The cap 15 may form an enclosure 18 where the chips 16 are located. The enclosure 18 may be filled with a gas such as air or with a gel.
The cap 15 may be made of metal. However, the cap could alternatively comprise a mouldable material, for example plastic. In the latter case, the cap may be injection-moulded onto the second surface 132 of the substrate 13 so that all chips 16 on this side of the substrate are embedded in the cap (this option has not been illustrated). The cap may be made of the same material as the packaging layer.
Other forms of encapsulation are also possible. Furthermore, the electronic component 10 does not necessarily have to contain any chips 16, or any encapsulation, or anything else, on the second surface 132 of the substrate 13.
The electronic component may comprise a land grid array (LGA) package or ball grid array (BGA) package. Either array package may comprise at least the packaging layer 14 and the conductor 11.
The at least one vertical electrical conductor 11 may be a post or a pin, for example made of metal. The at least one vertical electrical conductor may be straight, i.e. it may have a linear shape. It may have a cylindrical shape. The widths of the at least one vertical electrical conductor 11 in the x- and y-directions may, but does not necessarily have to, be less than its height in the z-direction. The vertical electrical conductor 11 may be a block of metal which is manufactured separately and then placed onto the first side 131 of the substrate 13, or into the substrate 13, before the packaging layer 14 is formed. The material of the vertical electrical conductor 11 may for example be copper.
FIG. 2 illustrates a situation where the electronic component of FIG. 1 has been mounted onto an external circuit board 22. The word “external” refers to here to a circuit board which is not itself a part of the electronic component 10. Instead, the electronic component 10 is mounted onto the external circuit board 22 when it is used. The contacts 21 which connect the vertical electrical conductors 11 to circuitry (not illustrated) on the external circuit board 22 may for example be solder joints.
The external circuit board 22 in FIG. 2 undergoes thermal expansion (illustrated with arrows 29). If this expansion is greater than the thermal expansion of the electronic component 10, there is a possibility that the contacts may be damaged. However, when the vertical electrical conductors 11 are embedded in the layer 12, or otherwise free to move in the cavity, they can undergo movement inside packaging layer 14 to accommodate the thermal expansion and reduce the risk of damage. This movement is illustrated as a slight tilt in the vertical electrical conductors 11 in FIG. 2. The movement allows the electrical contact between the vertical electrical conductors 11 and the contacts 21 to be maintained even if the electronic component 10 and the external circuit board 22 undergo different amounts of thermal expansion.
FIG. 2 illustrates a rigid vertical electrical conductor 11 which maintains its shape even when thermal stress expands the external circuit board 22. The movement is therefore a tilting movement. However, the vertical electrical conductor 11 could alternatively be dimensioned so that it has some degree of flexibility and the x-direction and/or in the y-direction. The movement of the vertical electrical conductor under thermal stress could then be bending instead of tilting. This option has not been illustrated. The dimensions needed to facilitate bending depend on the material and the dimensions of the vertical electrical conductor 11 and on the forces which are expected to act on the vertical electrical conductor 11 in thermal stress.
FIG. 3a illustrates an aspect where the thickness of the substrate 13 in the z-direction is less in the one or more conductor regions 31 than the thickness of the substrate the z-direction in the one or more chip regions 32. In other words, the substrate 13 may comprise a recessed area 33 in each conductor region 31. This aspect may be combined with any other aspects presented in this disclosure.
FIG. 3b illustrates an aspect where the substrate 13 comprises a flexible pad 34 in each of the one or more conductor regions 31. The flexible pad 34 may for example be a polymer film, or any other suitably flexible film. The film may be laminated or deposited onto the first surface 131 of the substrate 13. The vertical electrical conductor may then be attached to the flexible pad 34. This aspect may be combined with any other aspect presented in this disclosure, including the one shown in FIG. 3a.
The aspects illustrated in FIGS. 3a and 3b may be implemented, together or separately, to accommodate the tilting (or bending) of the vertical electrical conductor 11 illustrated in FIG. 2. The electrical contact between the substrate 13 and the vertical electrical conductor 11 can then be maintained despite the movement. However, this electrical contact may in some cases be maintained even if neither of the two solutions shown in FIGS. 3a and 3b is implemented. The sensitivity of the electrical contact between the substrate 13 and the vertical electrical conductor 11 depends on how they have been attached to each other. Some forms of attachment may accommodate the tilting/bending sufficiently regardless of how the substrate 13 is constructed in the conductor regions 31.
FIGS. 3a and 3b illustrate recessed areas 33 and flexible pads 34 over cavities that are filled with elastic material, but they may also be implemented over gas-filled cavities.
The one or more cavities may comprise a single cavity, and the one or more vertical electrical conductors may comprise a first vertical electrical conductor and a second vertical electrical conductor. The first and second vertical electrical conductors may be in the single cavity, so that the single cavity extends from the first vertical electrical conductor to the second vertical electrical conductor. This option can be implemented together with any aspects shown in FIGS. 1-3b.
FIG. 4a illustrates an xy-cross section of an electrical component. This cross-section, and any of the cross-sections shown in FIGS. 4b-4c, may for example lie at the z-coordinate of the B-B line in FIG. 3b (or the corresponding z-coordinate in any of FIGS. 1-3a). The xz-cross-sections in FIGS. 1-3b may correspondingly lie at the y-coordinate indicated by the B-B line in any of FIGS. 4a-4c.
The component 10 in FIG. 4a comprises multiple vertical electrical conductors 11 arranged in a rectangular pattern in the xy-plane. Any other pattern could also be used. The layer of elastic material 12 lies between each vertical electrical conductor 11 and the packaging layer 14 in the horizontal direction. The layer of elastic material 12 extends from each vertical electrical conductor 11 to the adjacent vertical electrical conductor 11. In other words, the vertical electrical conductors 11 are here embedded in the same layer of elastic material 12. The cavity could alternatively be filled with a gas. This option has not been separately illustrated.
In FIG. 4a the packaging layer 14 comprises a central region 143 and a peripheral region 144. The single cavity surrounds the central region 143 of the packaging layer 14 in the horizontal direction. The peripheral region 144 of the packaging layer 14 surrounds the single cavity in the horizontal direction. In other words, the layer of elastic material 12 surrounds the central region 143, and the peripheral region 144 surrounds the layer of elastic material 12-
As FIG. 4a illustrates, the one or more vertical electrical conductors may comprise more than two vertical electrical conductors 11, and the layer of elastic material 12 may form a continuous elastic body which surrounds all of these vertical electrical conductors 11. In other words, all vertical electrical conductors 11 may be embedded in the same layer of elastic material 12. All vertical electrical conductors 11 may therefore also be in the same cavity.
Other options are also possible. A layer of elastic material 12 may for example extend from a first vertical electrical conductor to a second vertical electrical conductor without extending to all vertical electrical conductors. This has been illustrated in FIG. 4b, where the electrical component 10 again comprises more than two vertical electrical conductors 11. These vertical electrical conductors 11 are divided into groups of two, three and four. A layer of elastic material 12 extends between the vertical electrical conductors 11 in each group, but all vertical electrical conductors 11 are not embedded in the same layer. The placement pattern shown in FIG. 4b is only one example. The vertical electrical conductors 11 could alternatively be arranged in any other pattern in the xy-plane. The divisions between the different groups of vertical electrical conductors 11, the position pattern of each group, and the number of vertical electrical conductors 11 in each group can be selected in any suitable manner.
FIG. 4c a component 10 which comprises multiple vertical electrical conductors 11. A layer of elastic material 12 lies between each vertical electrical conductor 11 and the packaging layer 14 in the horizontal direction. But in this case a separate layer of elastic material 12 surrounds each vertical electrical conductor 12. In other words, no pair of vertical electrical conductors 11 is embedded in the same layer of elastic material 12. The vertical electrical conductors in FIG. 4c could be placed in the xy-plane in any suitable pattern. The layers of elastic material 12 are illustrated as rings that surround the corresponding vertical electrical conductor 11 in FIG. 4c. These layers could instead have a rectangular shape or any other shape in the xy-plane.
More generally, the electrical component may comprise more than one cavity and more than one vertical electrical conductors 11. The vertical electrical conductors 11 may be divided between the cavities so that they are not all in the same cavity. There may still be multiple vertical electrical conductors 11 in the same cavity, as FIG. 4b illustrates. Alternatively, each vertical electrical conductor 11 may be in its own cavity, as FIG. 4c illustrates. The cavities illustrated in FIGS. 4b and 4c could alternatively be filled with a gas.
FIG. 5 illustrates a manufacturing method which may be used to manufacture any electronic component illustrated in FIGS. 1-4c when the cavity is filled with an elastic material 12. This figure only illustrates the manufacturing which takes place on the first side 131 of a substrate 13. Other steps may optionally be performed on the second side 132 of the substrate either before or after the steps illustrated in FIG. 5.
Step (i) in FIG. 5 shows vertical electrical conductors 11 which have been placed on the substrate 13 in an upright position. One or more chips 16 may optionally also be placed on the substrate 13. In step (ii) one or more dam structures 51 are formed on the first side 131 of the substrate 13. Each dam structure 51 may surround one or more vertical electrical conductors 11. In step (iii) the elastic material is dispensed into inside each dam structure 51, so that each vertical electrical conductor 11 is surrounded by a layer of elastic material 12.
In other words, the layer of elastic material may be surrounded by a dam structure in the horizontal direction, so that the dam structure extends from the layer of elastic material to the packaging layer.
The dam structure 51 may for example be made of epoxy or acryl. The dam structure may for example comprise an inner wall and an outer wall, and all of the vertical electrical conductors 11 may lie between the inner wall and the outer wall. This produces an arrangement similar to FIG. 4a.
Alternatively, multiple dam structures surrounding one or more vertical electrical conductors may be built, producing an arrangement similar to FIG. 4b or 4c. In either case, the dam structures 51 between the layer of elastic material 12 and the packaging layer 14. This is illustrated in steps (iv) and (v), where (iv) the packaging layer 14 is formed on the first side 131 of the substrate 13, for example by injection moulding. Then a grinding process is performed (v) to expose the vertical electrical conductors on the first side 141 of the packaging layer 14. The dam structures 51 remain in the finished component.
FIG. 6 illustrates an alternative manufacturing method which may be used to manufacture any electronic component illustrated in FIGS. 1-3b and 4c when it is filled with an elastic material. Again, this figure only illustrates the manufacturing which takes place on the first side 131 of a substrate 13. Other steps may optionally be performed on the second side 132 of the substrate either before or after the steps illustrated in FIG. 6. Step (i) in FIG. 6 is the same as step (i) in FIG. 5. In step (ii) a layer of elastic material 12 is dispensed onto each vertical electrical conductor 11 and cured. Alternatively, the vertical electrical conductors 11 may already comprise a pre-existing layer of elastic material 12 when they are placed onto the substrate 13.
Steps (iii) and (iv) in FIG. 6 correspond to (iv) and (v) in FIG. 5. The packaging layer 14 may for example (iii) be overmolded on the first side 131 of the substrate 13, and then cured. The ends of the vertical electrical conductors 11 may then be exposed (iv) by grinding or polishing the packaging layer 14.
FIG. 7a illustrates a first manufacturing method which may be used to manufacture any electronic component illustrated in FIGS. 1-4c when the cavity is filled with a gas. Steps (i) and (ii) are the same as in FIG. 5. In step (iii) the dam structure also comprises a cover 511 which covers the top of each vertical electrical conductor 11. The cavity 140 is therefore not filled with any material in step (iv), and the subsequent grinding in step (v) leaves a cavity 140 filled with gas.
FIG. 7b illustrates a second manufacturing method which may be used to manufacture any electronic component illustrated in FIGS. 1-4c when the cavity is filled with a gas. Steps (i) and (ii) are the same as in FIG. 5. In step (iii) the dam structure is extended over and across the cavity with a cover 511, as in FIG. 7b. However, here the vertical electrical conductors 11 are partly embedded in the cover 511. In step (iv) the cavity 140 is not filled with the material which forms the packaging layer 14. The grinding process in step (v) is then performed only to a depth where the tips of 111 the vertical electrical conductors 11 are exposed on the first side 141 of the packaging layer. In this case the cover 511 remains in the finished component and delimits the cavity 140.
All options mentioned above with reference to FIG. 5 which are not related to the elastic material 12 are available in FIGS. 7a and 7b also.
FIGS. 8a-8d illustrate aspects where the one or more vertical electrical conductors 11 extend into the substrate 13. They may extend in the vertical direction from inside of the substrate 13, or from the second side 132 of the substrate 13, through the cavity in the packaging layer 14 to the first side of the packaging layer 14. The elastic material 12 may also extend into the substrate 13.
In FIG. 8a the vertical electrical conductors 11 extend to the second side 132 of the substrate 13, while the layer of elastic material 12 extends partly into the substrate 13 but not to the second side 132 of the substrate 13.
In other words, the cavity may in this case extend into the substrate 13. The cavity comprise a central hole which extends to the second side 132 of the substrate 13. The conductor 11 may be placed in this central hole. The cavity may also comprise a recessed region which surrounds the hole but does not extend to the second side 132 of the substrate 13. The recessed region has been recessed from the first side 132 of the substrate 13, and it has in FIG. 8a been filled with the elastic material 12 so that the elastic material 12 partly surrounds the conductor 11 even inside the substrate 13.
In FIG. 8b, the vertical electrical conductors 11 again extend to the second side 132 of the substrate 13. The layer of elastic material 12 also extends to the second side 132 of the substrate 13. The cavity extends to the second side 132 of the substrate 13, and the conductor 11 and elastic material 12 both fill the cavity as the figure illustrates.
FIG. 8c illustrates a configuration where the vertical electrical conductors 11 extend to the second side 132 of the substrate 13, but the layer of elastic material 12 does not extend into substrate 13 at all. In other words, the cavity extends through the substrate 13, but only the conductor 11 fills the cavity in the substrate 13. The elastic material 12 is only located beneath the substrate 13, as the figure illustrates.
Finally, FIG. 8d illustrates a configuration where the cavity extends into the substrate 13, but not through the substrate to its second side 132. The vertical electrical conductors 11 and the elastic material 12 fill a recessed region in the substrate 13 and the elastic material 12 surrounds the conductor 11 in this region.
In FIGS. 8a-8c an electrical contact may be connected to each vertical electrical conductor 11 on the second surface 132 of the substrate 13, for example with wirebond. In FIG. 8d, and in FIGS. 1-2 and 3a-3b, the vertical electrical conductor 11 may be connected to an electrical circuit located inside the substrate 13.
In general, the description of the aspects disclosed should be considered as being illustrative in all respects and not being restrictive. The scope of the present disclosure is shown by the claims rather than by the above description and is intended to include meanings equivalent to the claims and all changes in the scope. While exemplary aspects of the invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the invention.
Patent Application
20250210530
