Patent Application
20240019786
The following relates to the extreme ultraviolet (EUV) optical arts, EUV lithography arts, and related arts.
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
Extreme ultraviolet (EUV) light in a range of 124 nm to 10 nm is used in photolithography processes for forming semiconductor devices with small critical dimension (CD) values. As a nonlimiting illustrative example, an EUV lithography system employing 13.5 nm light generated by a laser-produced plasma (LPP) EUV light source employing a tin plasma is used in defining sub-10 mm node devices. EUV optics for such a system are challenging, as there are very few materials that are transmissive at EUV wavelengths. Consequently, an EUV scanner typically employs primarily or solely reflective optics, using a distributed Bragg reflector tuned for the design-basis EUV wavelength. For 13.5 nm light, a molybdenum/silicon (Mo/Si) multilayer is one suitable distributed Bragg reflector. Suitable mirror curvature may be employed to provide focusing of the EUV light. Some systems employ a step-and-shoot design in which successive field facets of a grid of field facets are illuminated. The curvature of the reflective optics typically leads to a projection optics box (POB) design that manipulates light in the form of an illuminated curved slit.
The small CD and nanometer-scale EUV light wavelength calls for high accuracy and stability of the EUV mirror focus. For example, small aberrations such as a Z9 (spherical) aberration can lead to defocusing of an EUV mirror (and consequent defocusing of the optical image on the wafer) that is sufficient to degrade semiconductor device performance and/or yield. The optical stability of an EUV mirror is also temperature-dependent. Accordingly, the EUV POB is typically kept at a target temperature near room temperature (e.g. 22° C.).
Disclosed herein are approaches for providing enhanced optical stability in an EUV mirror. The approaches employ a heated EUV mirror, and are based on the recognition herein that precise control of the temperature of the EUV mirror substantially improves optical stability of the EUV mirror, especially with respect to suppression of optical aberrations and maintaining focusing stability. It is recognized herein that achievement of sufficient temperature stability may not be attainable using approaches that control the temperature of the surrounding environment (e.g. controlling the temperature of the cleanroom housing the EUV lithography scanner, or controlling the temperature of the vacuum chamber of the POB). In various embodiments, approaches for implementing feedback controlled temperature of a EUV mirror in the challenging environment of a POB are described. Still further, some nonlimiting illustrative embodiments for constructing a suitable heated EUV mirror are described herein.
With reference to
In operation, EUV light L1 is input to the POB 20 from a laser-produced plasma (LPP) EUV light source (not shown). As a nonlimiting illustrative example, the LPP light source may employ a tin plasma for producing illustrative design-basis 13.5 nm EUV light. The LPP light source is arranged respective to the POB 20 to direct the input light L1 onto the EUV photolithography mask or reticle 14 disposed on the EUV reticle stage 12. The EUV photolithography mask or reticle 14 reflects the EUV light L1 to form reflected light L2. The EUV-reflective mirrors M1, M2, M3, M4, M5, and M6 (which for brevity are sometimes referred to herein as EUV mirrors) form the optical train as EUV mirror M1 reflects the light L2 to form light L3 which is reflected by EUV mirror M2 to form light L4 which is reflected by EUV mirror M3 to form light L5 which is reflected by EUV mirror M4 to form light L6 which is reflected by EUV mirror M5 to form light L7 which is reflected by EUV mirror M6 to form light L8 which is directed onto the wafer 18 disposed on the wafer stage 16. It will be appreciated that the specific illustrated optical train comprising EUV mirrors M1, M2, M3, M4, M5, and M6 is merely a nonlimiting illustrative example, and that in a specific POB design the number of EUV mirrors may be greater than or less than the illustrative six EUV mirrors and/or that the specific arrangement of the EUV mirrors forming the optical train can be different than that shown in
It is to be understood that the POB 10 is diagrammatically shown in FIGURE and that various additional components known in the art are omitted, such as motorized X-Y translation mechanisms of the wafer stage 16 and EUV reticle stage 12 for translating scanning the image of the EUV photolithography mask or reticle 14 across the wafer 18, the aforementioned LPP light source, vacuum-tight optical coupling between the LPP light source and the POB 10, suitable vacuum pumps, and the like.
The POB 10 is suitably used in a method of manufacturing an integrated circuit. In such a method, a photoresist layer is disposed on the semiconductor wafer 18. The photoresist layer on the semiconductor wafer is exposed to EUV light using the POB 10 of the EUV lithography scanner. After the exposing, the photoresist layer is developed to form openings in the photoresist layer. After the developing, at least one wafer processing operation is performed on the semiconductor wafer through the openings in the photoresist layer. The at least one wafer processing operation may include, by way of some nonlimiting illustrative examples: depositing material on areas of the semiconductor wafer exposed by the openings in the photoresist layer; etching areas of the semiconductor wafer exposed by the openings in the photoresist layer; performing ion implantation into areas of the semiconductor wafer exposed by the openings in the photoresist layer; various combinations thereof; and/or so forth. It will be appreciated that the at least one wafer processing operation is typically a portion of an integrated circuit (IC) manufacturing workflow that may include many additional wafer processing operations performed before and/or after the at least one wafer processing operation that is performed on the semiconductor wafer through the openings in the photoresist layer.
In such IC manufacturing, to achieve projection of the image of the EUV photolithography mask or reticle 14 on the wafer 18 during the EUV exposure with sufficient optical stability to reproducibly define features of small critical dimension (CD) in a photoresist disposed on the wafer 18 (for example, features with CD on the order of nanometers or smaller in some embodiments), the optical properties of the EUV mirrors M1, M2, M3, M4, M5, and M6 of the POB 10 should exhibit a high degree of optical stability over time. To achieve this, various measures may be taken. For example, the mirror supports of the EUV mirrors M1, M2, M3, M4, M5, and M6 may be made of a material with low coefficient of thermal expansion. Additionally, the cleanroom housing the EUV lithography scanner including the POB 10 may be temperature controlled so that the ambient temperature of the cleanroom is maintained at a fixed design-basis temperature.
However, as recognized herein, these measures for maintaining optical stability of the EUV mirrors of the POB 10 may be insufficient to attain the desired optical stability for achieving reproducible definition of small CD features in photoresist disposed on the surface of the wafer 10. To further enhance optical stability, at least one EUV mirror may be a heated EUV mirror. In
Inset A of
As further diagrammatically shown in the main drawing of
The temperature sensor 44 may, in some embodiments, comprise an optical temperature sensor such as an optical pyrometer or an infrared temperature sensor arranged to view the mirror support 30 and/or the EUV-reflective multilayer 32. Depending on the operating wavelength of such an optical sensor, the measured temperature value may be the temperature of the mirror support 30, or of the EUV-reflective multilayer 32, or of the combination of the mirror support 30 and the EUV-reflective multilayer 32. In any case, it is expected that the temperature of the mirror support 30 and the temperature of the EUV-reflective multilayer 32 will be close to identical, so that the measured temperature value is in any of these cases representative of a temperature of the heated EUV mirror M5. Using an optical temperature sensor as the temperature sensor 44 is advantageous since it does not involve contacting the heated EUV mirror M5; however, in other embodiments it is alternatively contemplated to employ a contacting temperature sensor such as a thermocouple that is attached to the heated EUV mirror M5.
The feedback temperature controller 46 may be variously configured to control the delivered electrical power to maintain the measured temperature value at a setpoint temperature. For example, in an embodiment in which the controller 46 is a digital proportional-integral-differential (PID) controller, the proportional, integral, and differential coefficients may be set in software to provide suitably responsive temperature control without excessive overshoot or undershoot. In in an embodiment in which the controller 46 is an analog PID controller, the proportional, integral, and differential coefficients may be similarly set by manual or electrical inputs to provide such responsive temperature control without excessive overshoot or undershoot. These are merely nonlimiting illustrative examples.
It will be further appreciated that temperature control can be achieved by balancing heating provided by the resistive heater 34 driven by the feedback temperature controller 46 against cooling or heat removal provided by air, CDA, XCDA, N2, or other gas flowing through the plenum 38 via the gas inlet and outlet connectors 40 and 42. For example, the gas flow by itself may be chosen to produce a steady state temperature that is below the setpoint temperature of the controller 46, and the resistive heater 34 driven by the feedback temperature controller 46 then operates to raise this base temperature to the setpoint temperature. This approach can provide more precise temperature control, especially if the setpoint temperature is close to or below the ambient temperature of the cleanroom.
With reference to
With continuing reference to
Drawing 62 of
Returning to the illustrative heated EUV mirror M5 of
With particular reference to
With continuing reference to
With reference to
The side sectional view of
To fabricate the illustrative mirror support 30 in which the resistive heater 34 is embedded in the dielectric or ceramic layer 82, in some embodiments the dielectric or ceramic layer 82 is formed as two layers 821 and 822. In this approach, the first dielectric or ceramic layer 821 is first deposited on the mirror substrate 80. Thereafter, the metal foil or film forming the resistive heater 34 and electrically conductive traces 55 are deposited or otherwise formed and patterned. Next, the second dielectric or ceramic layer 822 is deposited on the first dielectric or ceramic layer 821 and the patterned metal components 34 and 55, and finally the EUV-reflective multilayer 32 is deposited on the second dielectric or ceramic layer 822. The thickness of the second dielectric or ceramic layer 822 is chosen to provide a suitable buffer between the EUV-reflective multilayer 32 and the resistive heater 34 while being thin enough for efficient heat transfer from the resistive heater 34 to the EUV-reflective multilayer 32. Typically, the first dielectric or ceramic layer 821 and the second dielectric or ceramic layer 822 comprise the same material; however, this in not required. In some embodiments it is contemplated for the second dielectric or ceramic layer 822 to be a different material than the first dielectric or ceramic layer 821.
In a variant embodiment (not shown), if the resistive heater 34 and electrically conductive traces 55 are formed on the surface of the mirror substrate 80, then the dielectric or ceramic layer 82 can be deposited as a single layer on top of the mirror substrate 80 and the patterned metal components 34 and 55. In such embodiments, the mirror substrate 80 should be made of an electrically insulating material.
With reference to
In an operation S3, the resistive heater 34 and electrically conductive traces 55 are formed. This can be done by various techniques depending on the material of the resistive heater 34 and electrically conductive traces 55, such as by deposition of a uniform metal layer followed by photolithographically controlled etching to remove the metal layer except for those portions forming the heater spots or coils 34C filling the curved slit area 50 and the electrically conductive traces 55. Various deposition techniques such as CVD, sputter deposition, vacuum evaporation deposition, electroplating, or so forth. Typically, the resistive heater 34 and electrically conductive traces 55 are made of the same material for manufacturing convenience, although this is not necessary. The thickness of the initially deposited uniform metal layer and the feature sizes of the heater spots or coils 34C are chosen (along with the resistivity of the constituent material) to provide the suitable electrical resistance to achieve the desired resistive heating when operating the completed resistive heater 34.
In an operation S4, the second dielectric or ceramic layer 822 is disposed over the first dielectric or ceramic layer 821 and the patterned metal components 34 and 55. This deposition S4 can employ any material deposition technique suitable for the type of dielectric or ceramic material being deposited, such as CVD, sputter deposition, vacuum evaporation deposition, or so forth. In some embodiments in which the first and second dielectric or ceramic layers 821 and 822 are made of the same material, the operations S2 and S4 can employ the same deposition technique. Optionally, the operation S4 can include a further smoothing operation such as mechanical polishing, CMP, or the like to provide a suitably smooth surface for the subsequent deposition of the EUV-reflective multilayer 32.
In an operation S5, the EUV-reflective multilayer 32 is formed on the second dielectric or ceramic layer 822. This can employ any type of multilayer deposition technique that is suitable for forming the alternating layers of the EUV-reflective multilayer 32. By way of nonlimiting illustrative example, if the EUV-reflective multilayer 32 is a molybdenum/silicon (Mo/Si) multilayer then some suitable deposition techniques include ion beam sputter deposition, plasma ion assisted deposition, or so forth. The thicknesses of the constituent layers (e.g. the Mo and Si layers) and the number of periods of the EUV-reflective multilayer 32 are chosen to provide the desired distributed Bragg reflector tuned to provide reflection of the design-basis EUV wavelength by constructive interference.
In an operation S6, the heated EUV mirror assembly is completed by installing the back cover 36 and the electrical connectors 52 and 54, with the latter soldered, wire bonded, or otherwise electrically connected to the electrically conductive traces 55. The operation S6 may optionally include other operations such as installing gas couplers at the gas inlet 40 and gas outlet 42, mounting the assembly in a mirror holder or mount (not shown), and/or so forth.
It is to be appreciated that the illustrative embodiments described with reference to
In the following, some further embodiments are described.
In a nonlimiting illustrative embodiment, a projection optics box (POB) of an extreme ultraviolet (EUV) lithography scanner is disclosed. The POB includes a vacuum chamber, and a plurality of EUV mirrors disposed inside the vacuum chamber and arranged respective to a reticle stage and a wafer stage to project an image of a reflective EUV photolithography mask disposed on the reticle stage onto a wafer disposed on the wafer stage. Each EUV mirror of the plurality of EUV mirrors includes a mirror support and an EUV-reflective multilayer disposed on a front side of the mirror support. The plurality of EUV mirrors includes at least one heated EUV mirror that further includes a resistive heater disposed in the mirror support of the heated EUV mirror.
In a nonlimiting illustrative embodiment, an EUV mirror system includes a mirror support, an EUV-reflective multilayer disposed on a front side of the mirror support, and a resistive heater disposed in the mirror support.
In a nonlimiting illustrative embodiment, a method is disclosed of manufacturing an EUV mirror. The method includes: disposing a first dielectric or ceramic layer on a front side of a mirror substrate; forming a resistive heater and electrically conductive traces on the first dielectric or ceramic layer; disposing a second dielectric or ceramic layer over the resistive heater; and forming an EUV-reflective multilayer on the second dielectric or ceramic layer.
In a nonlimiting illustrative embodiment, a method of manufacturing an integrated circuit is disclosed. The method includes: disposing a photoresist layer on a semiconductor wafer; exposing the photoresist layer on the semiconductor wafer to extreme ultraviolet (EUV) light using a projection optics box (POB) of an EUV lithography scanner; after the exposing, developing the photoresist layer to form openings in the photoresist layer; and after the developing, performing at least one wafer processing operation on the semiconductor wafer through the openings in the photoresist layer. The exposing includes controlling a temperature of an EUV mirror of the POB using a heater embedded in the EUV mirror. In some such embodiments, the EUV mirror includes a mirror support, an EUV-reflective multilayer disposed on a front side of the mirror support, and a resistive heater disposed in the mirror support, and the controlling of the temperature of the EUV mirror includes: measuring a temperature of the EUV mirror using a temperature sensor; and delivering electrical power to the resistive heater, including performing feedback control of the delivering to maintain the measured temperature at a setpoint temperature. In some embodiments the controlling of the temperature of the EUV mirror further includes cooling the EUV mirror by flowing gas through a plenum of the EUV mirror.
The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
