Hybrid interconnect

Abstract
A connector for connection to terminals of an integrated circuit. The connector consists of a dielectric substrate having a first side and a second side. The connector has wire bond terminals which are attached to the first side of the substrate and configured to receive wire bonds connected to a first set of the terminals of the integrated circuit. The connector also has solder bump terminals, attached to the second side of the substrate so as to be insulated from the wire bond terminals, the solder bump terminals being configured to be coupled via solder balls with a second set of the terminals of the integrated circuit.
Description
FIELD OF THE INVENTION

The present invention relates generally to connection devices, and specifically to devices where space used is a premium.


BACKGROUND OF THE INVENTION

Space requirements in the field of integrated circuit utilization are a critical feature of the design of a system using integrated circuits. The smaller that an integrated circuit, and ancillary components such as conducting traces to the integrated circuit, can be made, the more integrated circuits can be produced for a given size of a silicon wafer. Other advantages for reduced size integrated circuits include the reduction in power requirements for operating the circuits.


SUMMARY OF THE INVENTION

An embodiment of the present invention provides a connector for connection to terminals of an integrated circuit, the connector including:


a dielectric substrate having a first side and a second side;


wire bond terminals, attached to the first side of the substrate and configured to receive wire bonds connected to a first set of the terminals of the integrated circuit; and


solder bump terminals, attached to the second side of the substrate so as to be insulated from the wire bond terminals, the solder bump terminals being configured to be coupled via solder balls with a second set of the terminals of the integrated circuit.


Typically, the solder bump terminals are arranged in a solder bump terminal configuration, and the second set of terminals of the integrated circuit are arranged in an integrated circuit terminal configuration which is congruent to the solder bump terminal configuration. In an embodiment, solder bump terminal configuration is rectilinear. Alternatively, the solder bump terminal configuration is non-rectilinear.


In a disclosed embodiment the solder bump terminals are equally spaced. Alternatively, the solder bump terminals are unevenly spaced.


In a further disclosed embodiment the wire bond terminals and the solder bump terminals are equal in number. Typically, the wire bond terminals and the solder bump terminals are aligned.


In a yet further disclosed embodiment the wire bond terminals and the solder bump terminals are misaligned.


There is further provided, according to an embodiment of the present invention embodiment, a method for connecting to terminals of an integrated circuit, the method including:


providing a dielectric substrate having a first side and a second side;


attaching wire bond terminals to the first side of the substrate, the wire bond terminals being configured to receive wire bonds connected to a first set of the terminals of the integrated circuit; and


attaching solder bump terminals to the second side of the substrate so as to be insulated from the wire bond terminals, the solder bump terminals being configured to be coupled via solder balls with a second set of the terminals of the integrated circuit.


There is further provided, according to an embodiment of the present invention, an endoscope, including:


an integrated circuit;


an imaging device formed on the integrated circuit; and


a connector for connection to terminals of the integrated circuit, the connector including:


a dielectric substrate having a first side and a second side;


wire bond terminals, attached to the first side of the substrate and configured to receive wire bonds connected to a first set of the terminals of the integrated circuit; and


solder bump terminals, attached to the second side of the substrate so as to be insulated from the wire bond terminals, the solder bump terminals being configured to be coupled via solder balls with a second set of the terminals of the integrated circuit.


There is further provided, according to an embodiment of the present invention, a method for forming an endoscope, including:


providing an integrated circuit having terminals;


implementing an imaging device on the integrated circuit;


attaching wire bond terminals to a first side of a dielectric substrate, the wire bond terminals being configured to receive wire bonds connected to a first set of the terminals of the integrated circuit; and


attaching solder bump terminals to a second side of the dielectric substrate so as to be insulated from the wire bond terminals, the solder bump terminals being configured to be coupled via solder balls with a second set of the terminals of the integrated circuit.


The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1A is a schematic exploded view of an integrated circuit attached to a hybrid connector, and FIG. 1B is a schematic assembled view of the integrated circuit attached to the connector, according to embodiments of the present invention;



FIGS. 2A, 2B, and 2C are respective perspective, side, and front schematic diagrams of the hybrid connector, according to embodiments of the present invention;



FIG. 3 is a schematic diagram illustrating a section of an integrated circuit and a section of a connector that connects to the integrated circuit, according to an alternative embodiment of the present invention;



FIG. 4 is a schematic diagram illustrating a section of an integrated circuit and a section of a connector that connects to the integrated circuit, according to a further alternative embodiment of the present invention;



FIG. 5 is a schematic diagram illustrating a section of an integrated circuit and a section of a connector that connects to the integrated circuit, according to a yet further alternative embodiment of the present invention; and



FIG. 6 is a schematic diagram illustrating an endoscope using a hybrid connector, according to an embodiment of the present invention.





DETAILED DESCRIPTION OF EMBODIMENTS
Overview

In certain fields, such as invasive medical procedures, miniaturization of the equipment used is extremely beneficial. There is thus constant pressure to reduce the size of the elements of integrated circuits, including connections to the circuits.


A connection to an integrated circuit that reduces the space requirements of the connection would therefore be advantageous.


An embodiment of the present invention provides an integrated circuit connector that uses space on the connector in an efficient manner. The connector, herein also termed a hybrid connector, is formed on a dielectric substrate, which is typically planar and flexible. Wire bond terminals are attached to one side of the substrate, the wire bond terminals being configured to connect, via wire bonds, to a first set of terminals of an integrated circuit. Solder bump terminals are attached to a second side of the substrate, so as to be insulated from the wire bond terminals. The solder bump terminals are coupled, via respective solder balls, to a second set of terminals of the integrated circuit. Typically, in order for the solder bump terminals to couple to the second set of integrated circuit terminals, the two sets of terminals are arranged in congruent configurations.


Typically, although not necessarily, there are an equal number of wire bond terminals and solder bump terminals, and the two types of terminals may be aligned so that each wire bond terminal is “opposite” a respective solder bump terminal. Such a configuration leads to an efficient use of space on the hybrid connector. For example, if the separation between adjacent wire bond terminals, and between adjacent solder bump terminals, is 60 μm, then the connector has two terminals in a pitch of 60 μm.


The reduction in space requirements provided by embodiments of the present invention is advantageous in a number of fields, for example in the field of invasive or minimally invasive medical procedures where electronic equipment may need to be inserted into a patient. As a specific example, in a minimally invasive procedure an endoscope may need to be inserted into the patient, so that incorporating a hybrid connector, as is described herein, enables improved miniaturization of the endoscope, with consequent benefit to the patient.


DETAILED DESCRIPTION


FIG. 1A is a schematic exploded view of an integrated circuit (IC) 10 attached to a hybrid connector 12, and FIG. 1B is a schematic assembled view of the IC attached to the connector, according to embodiments of the present invention. IC 10 is typically constructed as a die on an insulating substrate 14, and there are a number of conducting traces 16 leading from the die to generally similar IC conducting terminals 18 at the edge of the substrate. The IC conducting terminals at the edge of the substrate are used, as is explained further below, to connect elements of the die to components external to substrate 14. The connection is via hybrid connector 12. For simplicity in FIGS. 1A and 1B the die to which traces 16 connect is not shown, and the diagram illustrates the edge of IC 10.


In an embodiment of the present invention, IC conducting terminals 18 are assumed to be formed on an upper surface 20 of the substrate as a first row 22 and as a second row 24. Typically, rows 22 and 24 are rectilinear, i.e., are in a straight line, for simplicity of manufacture of IC 10, and this configuration is assumed in the following description, except where otherwise stated. However, there is no requirement that rows 22 and 24 be rectilinear, and in some embodiments of the present invention at least one of the rows is non-rectilinear. Thus, by way of example, in FIGS. 1A and 1B there are assumed to be eight conducting terminals in each row, the rows are assumed to be rectilinear, and there is a separation p between adjacent terminals within a row. However, it will be understood that embodiments of the present invention may be implemented for any convenient number of terminals in each row.


For simplicity, the following description relates to a section 30 of hybrid connector 12 which corresponds with IC 10 having four conducting terminals 18 in each of rows 22 and 24, but those having ordinary skill in the art will be able to adapt the following description for IC 10 with eight conducting terminals in each row, or for an IC with any convenient number of terminals in each row. While some elements of hybrid connector 12 are identified numerically in FIGS. 1A and 1B, for clarity the explanation of these elements is left to the description provided for FIGS. 2A, 2B, and 2C below.



FIGS. 2A, 2B, and 2C are schematic views of section 30 of hybrid connector 12, according to embodiments of the present invention. FIG. 2A is a schematic perspective view, FIG. 2B is a schematic side view, and FIG. 2C is a schematic front view of section 30. Hybrid connector is assumed to be formed with an insulating, dielectric, substrate 40 which is in the form of a parallelepiped having an upper surface 42, a lower surface 44, a front surface 46, and a side surface 48. In the following description, the designations upper, lower, front, and side are for clarity for use with the figures, and it will be understood that connector 12 may be used in substantially any orientation. Typically, although not necessarily, substrate 40 is a flexible substrate.


Substantially similar wire bond conducting terminals 50 are formed on upper surface 42 and the terminals are connected to respective conducting traces 52; four terminals 50 connected to four traces 52 are illustrated for section 30. By way of example, terminals 50 are assumed to be rectangular.


Substantially similar solder bump conducting terminals 60 are formed on lower surface 44, and the solder bump terminals are connected to respective conducting traces 62; four terminals 60 connected to four traces 62 are illustrated for section 30. By way of example, terminals 60 are assumed to be circular. To each solder bump conducting terminal 60 a respective solder ball 64 is attached. Solder balls are also known as solder bumps or solder dots.


Solder bump terminals 60 are arranged on surface 44 so as to correspond in number and geometrical configuration with conducting terminals 18 in row 24. Thus, in section 30 four solder bump terminals 60 are arranged along a straight line row 66 with spacing p between the terminals.


Traces 52 and 62 are typically connected, at the opposite ends of the traces to wire bond terminals 50 and solder bump terminals 60, to equipment that uses IC 10. The connection may be directly to the equipment, or alternatively via cabling connected between the opposite ends of the traces and the equipment. For simplicity, the cabling and the equipment is not shown in FIGS. 1A, 1B, 2A, 2B, and 2C.


Returning to FIGS. 1A and 1B, to attach connector 12 to IC 10, substrate 40 is positioned so that solder balls 64 align with and contact conducting terminals 18 of row 24 of the integrated circuit. The solder balls may then be re-melted to produce an electrical connection, typically using an ultrasonic or alternatively a reflow solder process. Space remaining between the lower surface 44 of the connector, and upper surface 20 of the IC may then typically be filled with an electrically-insulating adhesive, which provides a better mechanical connection between IC 10 and connector 12 than just the re-melted solder balls.


To complete the connection between IC 10 and connector 12, terminals 50 of the hybrid connector are then connected to respective IC terminals 18 in row 22, using wire bonds 80.


Typically, wire bond terminals 50 correspond in number to the number of solder bump terminals 60. In addition, the wire bond terminals are usually aligned with the solder bump terminals, since the correspondence in number and alignment leads to an efficient use of the space available in connector 12. Such an efficient use of space is illustrated in FIGS. 2A, 2B, and 2C. In one embodiment, the wire bond terminals and the solder bump terminals are aligned, and p=60 μm. Such an arrangement provides two traces 52, 62 per 60 μm, measured in a direction orthogonal to the traces.


However, while the number of wire bond terminals 50 on connector 12 corresponds to the number of wire bond terminals 18 in row 22 of IC 10, there is no requirement that there is a correspondence between the number of wire bond terminals 50 and solder bump terminals 60. In connector 12 there is also no requirement that wire bond terminals 50 and solder bump terminals 60 are aligned. Thus, in some embodiments of the present invention the number of wire bond terminals 50 does not equal the number of solder bump terminals 60, and/or the two sets of terminals are misaligned.


The embodiments described above have assumed that solder bump terminals 60 of connector 12 are arranged in a rectilinear manner, i.e., in a straight line, and that adjacent terminals are equally spaced along the line. The same arrangement, i.e., equally spaced in a straight line, is assumed for terminals 18 in row 24 of IC 10. However, such a straight line, equally spaced arrangement is not a requirement for embodiments of the present invention, and examples of other possible arrangements of solder bump terminals 60 and terminals 18 of row 24 are described below.



FIG. 3 is a schematic diagram illustrating a section of an IC 110, and a section of a connector 112 that connects to IC 110, according to an embodiment of the present invention. Apart from the differences described below, the operations of IC 110 and connector 112 are generally similar to those of IC 10 and connector 12 (FIGS. 1A, 1B, 2A, 2B, and 2C), and elements indicated by the same reference numerals in ICs 110 and 10, and in connectors 112 and 12 are generally similar in construction and in operation. For simplicity, FIG. 3 only shows a portion of upper surface 20 of IC 110, and a corresponding portion of lower surface 44 of substrate 40 of connector 112. The figure is drawn from the point of view of a person looking at the IC 110 and connector 112 from above, so that elements on upper surface 20 are above the plane of the paper, whereas elements on lower surface 44 are “beneath” connector 112, i.e., are below the plane of the paper. For clarity, in the illustration of connector 112, only elements on lower surface 44 of the connector are shown.


In IC 110 upper surface 20 has first row of terminals 22, comprising conducting terminals 18 connected to respective traces 16. IC 110 comprises a second row 124 of terminals 18, wherein, in contrast to row 24 of IC 10, the terminals are arranged along a curved line 114A. Typically, although not necessarily, terminals 18 that are arranged along line 114A are equally spaced, and in the following description a spacing “q” between adjacent terminals of row 124 is assumed.


Connector 112 comprises a row 166 of solder bump terminals 60 connected to traces 62, and solder balls 64 are mounted on terminals 60. In contrast to row 66 of connector 12, solder bump terminals 60 in row 166 are arranged along a curved line 114B which is congruent to curved line 114A. In addition, the arrangement of the solder bump terminals 60 along line 114B is congruent to the arrangement of terminals 18 along line 114A, so that terminals 60 in row 166 have spacing q between adjacent terminals 60.


As for connector 12 and IC 10, in attaching connector 112 to IC 110 substrate 40 is positioned so that solder balls 64 in row 166 align with and contact conducting terminals 18 of row 124 of IC 110. The solder balls are then re-melted to form an electrical connection between terminals 18 and terminals 60.



FIG. 4 is a schematic diagram illustrating a section of an IC 210, and a section of a connector 212 that connects to IC 210, according to an embodiment of the present invention. Apart from the differences described below, the operations of IC 210 and connector 212 are generally similar to those of IC 10 and connector 12 (FIGS. 1A, 1B, 2A, 2B, 2C, and 3), and elements indicated by the same reference numerals in ICs 210 and 10, and in connectors 212 and 12 are generally similar in construction and in operation.


The illustration of IC 210 and connector 212 is generally as for IC 110 and connector 112 (FIG. 3), so that IC 210 and connector 212 are drawn from the point of view of a person looking at IC 210 and connector 212 from above. As for FIG. 3, in FIG. 4 in the illustration of connector 212, only elements on lower surface 44 of the connector are shown.


In IC 210 upper surface 20 has first row of terminals 22, comprising conducting terminals 18 connected to respective traces 16. IC 210 comprises a second row 224 of terminals 18, which, in contrast to row 24 of IC 10 (and row 124 of IC 110), has terminals that are arranged along an irregular “zig-zag” line 214A. Typically, although not necessarily, terminals 18 are arranged to be equally spaced if measured along a line 216, orthogonal to traces 16, and in the following description a spacing “r” along line 216 is assumed.


Connector 212 comprises a row 266 of solder bump terminals 60 connected to traces 62, and solder balls 64 are mounted on terminals 60. In contrast to row 66 of connector 12, solder bump terminals 60 in row 266 are arranged along an irregular line 214B which is congruent to irregular line 214A. In addition, the arrangement of solder bump terminals 60 along line 214B is congruent to the arrangement of terminals 18 along line 214A, so that terminals 60 in row 266 have spacing r measured with respect to line 216.


To attach connector 212 to IC 210 substrate 40 is positioned so that solder balls 64 in row 266 align with and contact conducting terminals 18 of row 224 of IC 110. The solder balls are then re-melted to form an electrical connection between terminals 18 and terminals 60.



FIG. 5 is a schematic diagram illustrating a section of an IC 310, and a section of a connector 312 that connects to IC 310, according to an embodiment of the present invention. Apart from the differences described below, the operations of IC 310 and connector 312 are generally similar to those of IC 10 and connector 12 (FIGS. 1A, 1B, 2A, 2B, and 2C), and elements indicated by the same reference numerals in ICs 310 and 10, and in connectors 312 and 12 are generally similar in construction and in operation.


The illustration of IC 310 and connector 312 is generally as for IC 110 and connector 112 (FIG. 3), so that IC 310 and connector 312 are drawn from the point of view of a person looking at IC 310 and connector 312 from above. In FIG. 5 in the illustration of connector 312, only elements on lower surface 44 of the connector are shown.


In IC 310 upper surface 20 has first row of terminals 22, comprising conducting terminals 18 connected to respective traces 16. IC 310 comprises a second row 324 of terminals 18, which are arranged along an irregular non-linear line 314A. In addition to being arranged on non-linear line 314A, terminals 18 are arranged to be unevenly spaced between adjacent terminals 18.


Connector 312 comprises a row 366 of solder bump terminals 60 connected to traces 62, and solder balls 64 are mounted on terminals 60. Solder bump terminals 60 in row 366 are arranged along an irregular non-linear line 314B which is congruent to irregular non-linear line 314A. In addition, the arrangement of solder bump terminals 60 along line 314B is congruent to the arrangement of terminals 18 along line 314A. Consequently, the different spacings between adjacent bump terminals 60 are congruent to the different spacings between adjacent terminals 18.


The attachment of connector 312 to IC 310 is substantially as described above for attaching connector 212 to IC 210.



FIG. 6 is a schematic diagram illustrating an endoscope 400 using a hybrid connector, according to an embodiment of the present invention. For clarity and by way of example, in the following description endoscope 400 is assumed to use hybrid connector 12 connected to IC 10 (described above), and those having ordinary skill in the art will be able to adapt the description for other embodiments of the present invention, such as hybrid connectors 112, 212, and 312, and integrated circuits other than IC 10.


An imaging device 402 is formed on IC 10, the imaging device typically comprising a CCD (charge coupled device) which acquires an image of an object viewed using the endoscope. (Imaging device 402 typically includes corresponding optics, but for simplicity the optics are not illustrated in FIG. 6.) Imaging device 402 is located at a distal end 404 of the endoscope, and the distal end is inserted, via a trocar 406 into a body cavity 408 of a patient, so that device 402 acquires an image of walls 410 of the patient's body cavity. Also located at distal end 404 is hybrid connector 12, which connects to IC 10, as described above, and the traces of the hybrid connector connect (at the opposite ends of the traces from terminals 50 and 60) to endoscope cabling 420.


The miniaturization provided by hybrid connector 12 allows the diameter of distal end 404 to be reduced compared to distal ends of prior art endoscopes, and the reduced diameter is beneficial to the patient whose body cavity is being imaged.


An endoscope module 430 is connected to cabling 420, the module serving to provide power and driving signals to IC 10 and imaging device 402 via the cabling and hybrid connector 12. The module also receives image signals from device 402 via the cabling and the hybrid connector, and the module processes the signals so as to display an image of walls 410 on a screen 440. Endoscope modules such as module 430 are well known in the art, and for simplicity will not further be described here.


While the above description refers to use of a hybrid connector in an endoscope, it will be understood that the reduced size provided by embodiments of the present invention may be advantageously implemented in other fields, such as, but not being limited to, non-medical fields where size reduction of components is important. It will thus be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and subcombinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art.

Claims
  • 1. Apparatus, comprising: an integrated circuit comprising a first set of terminals and a second set of terminals: wire bonds connected to the first set of terminals; anda connector connected to the integrated circuit, the connector comprising: a dielectric substrate having a first side and a second side;wire bond terminals, attached to the first side of the substrate, that receive the wire bonds; andsolder bump terminals, attached to the second side of the substrate so as to be insulated from the wire bond terminals, and coupled via solder balls with the second set of terminals of the integrated circuit, wherein the solder bump terminals are arranged in a solder bump terminal configuration, and the second set of terminals of the integrated circuit are arranged in an integrated circuit terminal configuration which is congruent to the solder bump terminal configuration.
  • 2. The apparatus according to claim 1, wherein the solder bump terminal configuration is rectilinear.
  • 3. The apparatus according to claim 1, wherein the solder bump terminal configuration is non-rectilinear.
  • 4. The apparatus according to claim 1, wherein the solder bump terminals are equally spaced.
  • 5. The apparatus according to claim 1, wherein the solder bump terminals are unevenly spaced.
  • 6. The apparatus according to claim 1, wherein the wire bond terminals and the solder bump terminals are equal in number.
  • 7. The apparatus according to claim 6, wherein the wire bond terminals and the solder bump terminals are aligned, such that each wire bond terminal is opposite a respective solder bump terminal.
  • 8. The apparatus according to claim 6, wherein the wire bond terminals and the solder bump terminals are misaligned.
  • 9. An endoscope, comprising: an integrated circuit comprising a first set of terminals and a second set of terminals;wire bonds connected to the first set of terminals;an imaging device formed on the integrated circuit; anda connector connected the integrated circuit, the connector comprising: a dielectric substrate having a first side and a second side;wire bond terminals, attached to the first side of the substrate, that receive the wire bonds; andsolder bump terminals, attached to the second side of the substrate so as to be insulated from the wire bond terminals coupled via solder balls with the second set of terminals of the integrated circuit, wherein the solder bump terminals are arranged in a solder bump terminal configuration, and the second set of terminals of the integrated circuit are arranged in an integrated circuit terminal configuration which is congruent to the solder bump terminal configuration.
US Referenced Citations (208)
Number Name Date Kind
3321656 Sheldon May 1967 A
3971065 Bayer Jul 1976 A
4253447 Moore et al. Mar 1981 A
4261344 Moore et al. Apr 1981 A
4278077 Mizumoto Jul 1981 A
4429328 Jones, Jr. et al. Jan 1984 A
4467361 Ohno et al. Aug 1984 A
4491865 Danna et al. Jan 1985 A
4555768 Lewis, Jr. et al. Nov 1985 A
4569335 Tsuno Feb 1986 A
4573450 Arakawa Mar 1986 A
4576146 Kawazoe et al. Mar 1986 A
4602281 Nagasaki et al. Jul 1986 A
4604992 Sato Aug 1986 A
4622954 Arakawa et al. Nov 1986 A
4625236 Fujimori et al. Nov 1986 A
4633304 Nagasaki Dec 1986 A
4643170 Miyazaki et al. Feb 1987 A
4646721 Arakawa Mar 1987 A
4651201 Schoolman Mar 1987 A
4656508 Yokota Apr 1987 A
4682219 Arakawa et al. Jul 1987 A
4684222 Borrelli et al. Aug 1987 A
4692608 Cooper et al. Sep 1987 A
4697208 Eino Sep 1987 A
4713683 Fujimori et al. Dec 1987 A
4714319 Zeevi et al. Dec 1987 A
4720178 Nishioka et al. Jan 1988 A
4741327 Yabe May 1988 A
4746203 Nishioka et al. May 1988 A
4757805 Yabe Jul 1988 A
4768513 Suzuki Sep 1988 A
4784133 Mackin Nov 1988 A
4803550 Yabe et al. Feb 1989 A
4803562 Eino Feb 1989 A
4809680 Yabe Mar 1989 A
4819065 Eino Apr 1989 A
4827907 Tashiro May 1989 A
4827909 Kato et al. May 1989 A
4831456 Takamura et al. May 1989 A
4832003 Yabe May 1989 A
4832033 Maher et al. May 1989 A
4857724 Snoeren Aug 1989 A
4862873 Yajima et al. Sep 1989 A
4866526 Ams et al. Sep 1989 A
4869256 Kanno et al. Sep 1989 A
4873572 Miyazaki et al. Oct 1989 A
4884133 Kanno et al. Nov 1989 A
4905670 Adair Mar 1990 A
4926257 Miyazaki May 1990 A
4934339 Kato Jun 1990 A
4939573 Teranishi et al. Jul 1990 A
4953539 Nakamura et al. Sep 1990 A
4967269 Sasagawa et al. Oct 1990 A
4986642 Yokota et al. Jan 1991 A
4998972 Chin et al. Mar 1991 A
5010875 Kato Apr 1991 A
5021888 Kondou et al. Jun 1991 A
5022399 Biegelisen Jun 1991 A
5029574 Shimamura et al. Jul 1991 A
5122650 McKinley Jun 1992 A
5166787 Irion Nov 1992 A
5184223 Mihara Feb 1993 A
5187572 Nakamura et al. Feb 1993 A
5191203 McKinley Mar 1993 A
5216512 Bruijns et al. Jun 1993 A
5219292 Dickirson et al. Jun 1993 A
5222477 Lia Jun 1993 A
5233416 Inoue Aug 1993 A
5264925 Shipp et al. Nov 1993 A
5301090 Hed Apr 1994 A
5306541 Kasatani Apr 1994 A
5311600 Aghajan et al. May 1994 A
5323233 Yamagami et al. Jun 1994 A
5325847 Matsuno Jul 1994 A
5335662 Kimura et al. Aug 1994 A
5343254 Wada et al. Aug 1994 A
5363135 Inglese Nov 1994 A
5376960 Wurster Dec 1994 A
5408268 Shipp Apr 1995 A
5430475 Goto et al. Jul 1995 A
5432543 Hasegawa et al. Jul 1995 A
5444574 Ono et al. Aug 1995 A
5450243 Nishioka Sep 1995 A
5471237 Shipp Nov 1995 A
5494483 Adair Feb 1996 A
5498230 Adair Mar 1996 A
5512940 Takasugi et al. Apr 1996 A
5547455 McKenna et al. Aug 1996 A
5557324 Wolff Sep 1996 A
5575754 Konomura Nov 1996 A
5588948 Takahashi et al. Dec 1996 A
5594497 Ahern et al. Jan 1997 A
5598205 Nishioka Jan 1997 A
5603687 Hori et al. Feb 1997 A
5604531 Iddan et al. Feb 1997 A
5607436 Pratt et al. Mar 1997 A
5668596 Vogel Sep 1997 A
5673147 McKinley Sep 1997 A
5700236 Sauer et al. Dec 1997 A
5712493 Mori et al. Jan 1998 A
5728044 Shan Mar 1998 A
5751341 Chaleki et al. May 1998 A
5754280 Kato et al. May 1998 A
5784098 Shoji et al. Jul 1998 A
5792045 Adair Aug 1998 A
5797837 Minami Aug 1998 A
5819736 Avny et al. Oct 1998 A
5827176 Tanaka et al. Oct 1998 A
5847394 Alfano et al. Dec 1998 A
5905597 Mizouchi et al. May 1999 A
5907178 Baker et al. May 1999 A
5909633 Haji et al. Jun 1999 A
5928137 Green Jul 1999 A
5929901 Adair et al. Jul 1999 A
5940126 Kimura Aug 1999 A
5944655 Becker Aug 1999 A
5984860 Shan Nov 1999 A
5986693 Adair et al. Nov 1999 A
6001084 Riek et al. Dec 1999 A
6006119 Soller et al. Dec 1999 A
6009189 Schaack Dec 1999 A
6010449 Selmon et al. Jan 2000 A
6039693 Seward et al. Mar 2000 A
6043839 Adair et al. Mar 2000 A
6075235 Chun Jun 2000 A
6099475 Seward et al. Aug 2000 A
6124883 Suzuki et al. Sep 2000 A
6129672 Seward et al. Oct 2000 A
6134003 Tearney et al. Oct 2000 A
6139490 Breidenthal et al. Oct 2000 A
6142930 Ito et al. Nov 2000 A
6148227 Wagnieres et al. Nov 2000 A
6156626 Bothra Dec 2000 A
6177984 Jacques Jan 2001 B1
6178346 Amundson et al. Jan 2001 B1
6184923 Miyazaki Feb 2001 B1
6206825 Tsuyuki Mar 2001 B1
6240312 Alfano et al. May 2001 B1
6260994 Matsumoto et al. Jul 2001 B1
6281506 Fujita et al. Aug 2001 B1
6284223 Luiken Sep 2001 B1
6327374 Piironen et al. Dec 2001 B1
6331156 Haefele et al. Dec 2001 B1
6409658 Mitsumori Jun 2002 B1
6416463 Tsuzuki et al. Jul 2002 B1
6417885 Suzuki et al. Jul 2002 B1
6449006 Shipp Sep 2002 B1
6459919 Lys et al. Oct 2002 B1
6464633 Hosoda et al. Oct 2002 B1
6476851 Nakamura Nov 2002 B1
6485414 Neuberger Nov 2002 B1
6533722 Nakashima Mar 2003 B2
6547721 Higuma et al. Apr 2003 B1
6659940 Adler Dec 2003 B2
6670636 Hayashi et al. Dec 2003 B2
6692430 Adler Feb 2004 B2
6697110 Jaspers et al. Feb 2004 B1
6900527 Miks et al. May 2005 B1
6943837 Booth Sep 2005 B1
6976956 Takahashi et al. Dec 2005 B2
6984205 Gazdzinski Jan 2006 B2
7019387 Miks et al. Mar 2006 B1
7030904 Adair et al. Apr 2006 B2
7106910 Acharya et al. Sep 2006 B2
7116352 Yaron Oct 2006 B2
7123301 Nakamura et al. Oct 2006 B1
7127280 Dauga Oct 2006 B2
7133073 Neter Nov 2006 B1
7154527 Goldstein et al. Dec 2006 B1
7189971 Spartiotis et al. Mar 2007 B2
7308296 Lys et al. Dec 2007 B2
7347817 Glukhovsky et al. Mar 2008 B2
7355625 Mochida et al. Apr 2008 B1
7804985 Szawerenko et al. Sep 2010 B2
8179428 Minami May 2012 B2
8194121 Blumzvig et al. Jun 2012 B2
8263438 Seah et al. Sep 2012 B2
8438730 Ciminelli May 2013 B2
20010017649 Yaron Aug 2001 A1
20010031912 Adler Oct 2001 A1
20010040211 Nagaoka Nov 2001 A1
20010051766 Gazdzinski Dec 2001 A1
20020089586 Suzuki et al. Jul 2002 A1
20020103417 Gazdzinski Aug 2002 A1
20020154215 Schechterman et al. Oct 2002 A1
20020198439 Mizuno Dec 2002 A1
20030171648 Yokoi et al. Sep 2003 A1
20030171649 Yokoi et al. Sep 2003 A1
20030171652 Yokoi et al. Sep 2003 A1
20030174208 Glukhovsky et al. Sep 2003 A1
20030174409 Nagaoka Sep 2003 A1
20040019255 Sakiyama Jan 2004 A1
20040197959 Ujiie et al. Oct 2004 A1
20050165279 Adler et al. Jul 2005 A1
20050259487 Glukhovsky et al. Nov 2005 A1
20050267328 Blumzvig et al. Dec 2005 A1
20060158512 Iddan et al. Jul 2006 A1
20080229573 Wood et al. Sep 2008 A1
20090147076 Ertas Jun 2009 A1
20090266598 Katagiri et al. Oct 2009 A1
20090294978 Ota et al. Dec 2009 A1
20100283818 Bruce et al. Nov 2010 A1
20110210441 Lee et al. Sep 2011 A1
20120161312 Hossain et al. Jun 2012 A1
20120274705 Petersen et al. Nov 2012 A1
20130129334 Wang et al. May 2013 A9
20140249368 HU et al. Sep 2014 A1
Foreign Referenced Citations (5)
Number Date Country
1661506 May 2006 EP
1215383 Dec 1970 GB
H09-173288 Jul 1997 JP
9848449 Oct 1998 WO
2013073578 May 2013 WO
Non-Patent Literature Citations (4)
Entry
International Application PCT/US2014/042826 Search Report dated Sep. 8, 2014.
International Application # PCT/US14/42825 Search Report dated Oct. 6, 2014.
U.S. Appl. No. 13/940,282 Office Action dated Jul. 31, 2015.
U.S. Appl. No. 14/179,577 Office Action dated Oct. 13, 2015.
Related Publications (1)
Number Date Country
20150011832 A1 Jan 2015 US