The present invention relates to double heterojunction field effect transistors that incorporate nitride based active layers and contain a high mobility two-dimentional electron gas.
While GaN-based field effect transistors (FET) are very promising both in terms of underlying material properties and demonstrated device results, fundamental physical limitations exist when scaling conventional GaN devices to deep submicron dimensions necessary to realize their potential for ultra-high power and ultra-high frequency operation. Two dimensions of the nitride transistor structure are particularly essential.
These are the barrier and channel thicknesses which have to be minimized to achieve high performance. For a conventional AlGaN/GaN FET structure, the two-dimensional electron gas density (2DEG) region in the channel layer rapidly decreases with decreasing thickness of the AlGaN barrier. Therefore, the barrier thickness can not be less than about 15-20 nm. The thickness of the GaN channel in such structures is not well defined following the width of the triangular quantum well at the AlGaN/GaN interface which in turn varies significantly with applied gate bias. It has been reported that the polarization charge at a lattice matched Al0.83In0.17N/GaN interface can be over twice that of conventional AlGaN/GaN (J. Kuzmik, “Power Electronics on InAlN/(In)GaN: Prospect for a Record Performance,” IEEE Electron Device Letters 22, 510 (2001)). While the Al0.83In0.17N barrier thickness can be significantly thinner than in the conventional structure. Indeed, the Al0.83In0.17N-based FET structures with barrier thickness of only 6-11 nm demonstrated marked improvements in drain currents (H. Wang, J. W. Chung, X. Gao, S. Guo, and T. Palacios, “Al2O3 passivated InAlN/GaN HEMTs on SiC substrate with record current density and transconductance”, Phys. Status Solidi C, 7, 2440 (2010)) and cut-off frequencies (D. S. Lee, X. Gao, S. Guo, D. Kopp, P. Fey, and T. Palacios, “300-GHz InAlN/GaN HEMTs With InGaN Back Barrier,” IEEE Electron Device Lett. 32, 1525 (2011)) when compared to the conventional AlGaN/GaN FET. However, these devices still lack control of the channel thickness because the 2DEG is formed in GaN, the same material as the buffer layer, and therefore suffer from short-channel effects (D. S. Lee, X. Gao, S. Guo, D. Kopp, P. Fey, and T. Palacios, “300-GHz InAlN/GaN HEMTs With InGaN Back Barrier,” IEEE Electron Device Lett. 32, 1525 (2011)) and leakage currents (J. Song, F. J. Xu, X. D. Yan, F. Lin, C. C. Huang, L. P. You, T. J. Yu, X. Q. Wang, B. Shen, K. Wei, and X. Y. Liu, “High conductive gate leakage current channels induced by In segregation around screw- and mixed-type threading dislocations in lattice-matched InAlN/GaN heterostructures,” Appl. Phys. Lett. 97, 232106 (2010)).
Two concepts have been previously proposed to form an energy barrier on the side of the nitride-based FET channel opposite the carrier-supplying barrier. First, an AlGaN buffer layer with Al composition of 0.04 has been synthesized directly on a substrate to form a back-barrier at the interface with GaN channel (D. S. Lee, X. Gao, S. Guo, and T. Palacios, “InAlN/GaN HEMTs with AlGaN back-barriers,” IEEE Electron Device Lett. 32, 617 (2011)). This structure suffers from poor material quality of the AlGaN buffer layer. Second, a thin InGaN layer with low In concentration has been inserted between both the GaN-based buffer and channel layers (J. Liu, Y. Zhu, K. M. Lau, and K. J. Chen, “AlGaN/GaN/InGaN/GaN DH-HEMTs with an InGaN notch for enhanced carrier confinement,” IEEE Electron Device Lett. 27, 10 (2006)). Due to the stress-related piezoelectric field in direction from the buffer to the top barrier, the conduction band of InGaN inclines towards lower energies lowering conduction band in the GaN channel with respect to that in the GaN buffer. Thus, the energy barrier is created in spite of a narrow-band-gap nature of InGaN. The problem with such a InGaN back-barrier is that, under negative gate bias, the high electron concentration can be injected from channel into the InGaN layer screening piezoelectric field and thus removing energy barrier on the back side of the channel. At the same time, a second conductive channel can be formed in the InGaN layer which can degrade device RF performance.
A narrow band gap InGaN surrounded by wider-band gap materials has been previously employed to form a Al0.83In0.17N-based double heterojunction field effect transistor (DHFET) structures (J. Xie, J. H. Leach, X. Ni, M. Wu, R. Shimada, U. Ozgur, and H. Morkoc, “Electron mobility in InGaN channel heterostructure field effect transistor structures with different barriers,” Appl. Phys. Lett. 91, 262102 (2007)).
The GaN buffer layer below the InGaN channel served as a back-barrier confining 2DEG inside InGaN. The spontaneous polarization charge difference and lattice mismatch between the Al1-yInyN and Ga1-xInxN layers created a 2DEG which accumulated at the Al1-yInyN/Ga1-xInxN interface. A wide range (0<x≦1) of In concentration in the Ga1-xInxN channel has also been explored in the AlGaN-based DHFET structures (H. Ikki, Y. Isobe, D. Iida, M. Iwaya, T. Takeuchi, S. Kamiyama, I. Akasaki, H. Amano, A. Bandoh and T. Udagawa, “AlGaN/InGaN/GaN heterostructure field-effect transistor”, Phys. Status Solidi A 208, 1614 (2011)). However, structures using both Al0.83In0.17N and AlGaN barriers have revealed low electron mobility when compared to FETs with a GaN channel. This has been attributed to alloy disorder in the narrow band-gap InGaN and to barrier-channel interface roughness (J. Xie, J. H. Leach, X. Ni, M. Wu, R. Shimada, U. Ozgur, and H. Morkoc, “Electron mobility in InGaN channel heterostructure field effect transistor structures with different barriers,” Appl. Phys. Lett. 91, 262102 (2007); (H. Ikki, Y. Isobe, D. Iida, M. Iwaya, T. Takeuchi, S. Kamiyama, I. Akasaki, H. Amano, A. Bandoh and T. Udagawa, “AlGaN/InGaN/GaN heterostructure field-effect transistor,” Phys. Status Solidi A 208, 1614 (2011)).
In order to further improve the performance of InGaN-based FETs, it is desirable to reduce or eliminate the above-referenced problems
The present invention provides high-performance InGaN-based DHFETs with improved 2DEG mobility and reduced leakage current. A DHFET constructed in accordance with the present invention comprises a substrate, a GaN back-barrier buffer layer formed on the substrate, and having a nucleation layer between the substrate and the GaN, a narrow band-gap channel consisting of a Ga1-xInxN ternary alloy (0.04≦x≦1) or, alternatively, an InGaN/GaN superlattice (SL) formed on the GaN back-barrier buffer layer opposite to the substrate, a GaN spacer layer formed on said narrow band-gap channel layer opposite to the GaN back-barrier buffer layer and a carrier supplying barrier layer consisting of an Al1-yInyN (0.14<x≦0.20) ternary alloy formed on said GaN spacer layer opposite to the narrow band-gap channel. The GaN spacer layer and the narrow band-gap channel together form a composite channel layer. A 2DEG region is contained in the composite channel layer. Due to the large lattice mismatch between InGaN and GaN, the thickness of the InGaN layer in said SL should be less than its critical thickness. The thickness and number of InGaN layers in the SL are ≦0.5 nm and 1-5, respectively. A preferred thickness of the GaN spacer layer between the narrow band-gap channel and AlInN carrier supplying barrier is 0.5-1.5 nm. The GaN spacer layer reduces a roughness of the carrier supplying barrier-channel interface while the InGaN/GaN SL reduces or eliminates any alloy disorder in the channel. It results in improved electron mobility in the DHFET channel. A potential barrier preventing 2DEG leakage from the DHFET channel is formed at the InGaN/GaN SL channel—GaN back-barrier buffer interface.
These and other features and advantages of the invention would be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.
A description of example embodiments of the invention follows.
The substrate 24 can be made of different materials, such as a sapphire, silicon carbide, silicon or GaN. Substrate 24 can be semi-insulating or conductive. The nucleation layer 26 can be included on the substrate 24 to reduce the lattice mismatch between the substrate 24 and the GaN back-barrier buffer layer 28. It can be made of different materials such as InGaN, GaN, AN and their alloys. The thickness of the nucleation layer 26 is approximately 10-500 nm although other thicknesses can be used. The GaN back-barrier buffer layer 28 can be undoped or intentionally doped with such impurities as iron (Fe), carbon (C) or other elements to induce the insulating properties in GaN. The thickness of the GaN back-barrier buffer layer 28 is between about 0.1 and about 20 μm. In one of the preferred embodiments in
The InxGa1-xN channel layer 30 according to the present invention can be undoped or intentionally doped with such an impurity as silicon (Si) or other n-type impurities to improve the electron transport properties of the channel. The thickness and composition of said InxGa1-xN channel layer 30 are between about 0.5 and about 60 nm, and 0.04<x≦1, respectively. The InxGa1-xN channel layer 30 is lattice mismatched with the GaN back-barrier buffer layer 28. Therefore, a construction of the InxGa1-xN channel on top of the GaN back-barrier buffer layer 28 creates a mechanical stress the magnitude of which depends on the In concentration (x) and thickness of the InxGa1-xN channel layer 30. If the stress relaxes, the structural defects are formed leading to the inferior properties of the channel. The stress relaxation is associated with so-called critical thickness of the InxGa1-xN channel layer 30 for a given In concentration.
The thickness of the GaN spacer layer 32 according to this invention is approximately 0.5-1.5 nm.
The thickness of the Al1-yInyN carrier supplying barrier layer 34 is approximately 3-15 nm, although other thicknesses can be used. The preferred composition is approximately 0.18. This composition results in the lattice match conditions with the GaN back-barrier buffer layer. However, the composition can be varied within 0-0.2 range still allowing a synthesis of the device quality carrier supplying layer. Alternatively, the carrier-supplying barrier layer 34 can be made of Alz
The drain, source and gate contacts of DHFET device 40 with the InGaN/GaN SL channel are formed on top of the AlInN carrier supplying barrier layer 48, similar to that of the first embodiment of the present invention.
In the embodiment illustrated in
The method embodiments of the present invention are illustrated in
The relevant teachings of all patents, published applications and references cited herein are incorporated herein by reference in their entirety.
While this invention has been particularly shown and described with references to example embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention encompassed by the appended claims.
This application claims the benefit of U.S. Provisional Application No. 61/588,014, filed Jan. 18, 2012, the relevant teachings of which are incorporated herein by reference in their entirety.
Number | Date | Country | |
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61588014 | Jan 2012 | US |