This application claims the priority benefit of French Application for Patent No. 2208049, filed on Aug. 3, 2022, the content of which is hereby incorporated by reference in its entirety to the maximum extent allowable by law.
Embodiments and implementations of the present invention relate to the field of microelectronics, in particular the field of packaging integrated circuits, and more particularly the integrated circuit packages of the Wire Bonding-Ball Grid Array type, routinely designated by a person skilled in the art by the acronym WB-BGA.
WB-BGA packages include a support substrate supporting on a first face, typically the upper face, an electronic integrated circuit chip and bonding wires are soldered between contact pads of the upper face of the electronic chip and contact pads of this first face of the support substrate.
The support substrate includes on a second face, typically a lower face, a ball grid array intended to be soldered onto a printed circuit having dedicated receiving pads.
The electronic chip is fastened onto the first face of the support substrate via a glue.
However, during the fastening of the chip onto the first face of the support substrate, a part of the glue can rise along the vertical edges of the chip until it possibly reaches the contact pads intended to receive the bonding wires.
Moreover, this overflowing and rising part of glue has an irregular shape.
All this can lead to a contamination of the contact pads intended to receive the bonding wires as well as strong stresses on the dielectric layers with a low dielectric constant (low-k) contained in the chip.
To overcome these disadvantages, it was considered to reduce the quantity of glue but this leads to insufficient coverage of the lower face of the chip by the glue favoring the creation of cracks.
There is therefore a need to more effectively overcome the disadvantages mentioned above.
According to one aspect, an integrated circuit package is proposed comprising at least one electronic chip having a first face, typically the lower face, fastened onto a first face, typically the upper face, of a carrier substrate by an adhesive interface.
This adhesive interface includes a crown containing a first adhesive material and fastened on the periphery of the first face of the electronic chip and defining an internal housing containing a second adhesive material different than the first material.
Thus, instead of using a single standard glue to fasten the chip onto the carrier substrate, two different adhesive materials are used here.
A first material forms a crown allowing on the one hand to control the thickness between the chip and the carrier substrate well, and on the other hand to house a second adhesive material which because of the presence of this crown does not rise on the vertical edges of the chip.
Moreover, these two materials form an adhesive interface allowing to effectively fasten the chip onto the carrier substrate while minimizing the risk of appearance of cracks under the chip, in particular when the second material covers at least between 80% and 90% of the surface of the first face of the electronic chip.
The second material can be a glue such as a conventional glue, and the first material forming said crown can be an adhesive film or a filling material, known to a person skilled in the art under the name “underfill”.
The crown can include at least one lateral opening, which allows in certain cases to be able to evacuate a possible overpressure of air during the filling of the internal housing by the second material during the manufacturing of the package.
According to another aspect, a method is proposed for manufacturing at least one integrated circuit package, comprising the following steps: a) Fastening on the periphery of a first face of an electronic chip a crown containing a first adhesive material and defining an internal housing, b) Disposing a second adhesive material different than the first material in said housing, the crown of first material and the second material forming an adhesive interface, and c) Fastening said first face of the electronic chip onto a first face of a carrier substrate via the adhesive interface.
According to one embodiment, the steps a), b) and c) comprise: providing a semiconductor wafer; thinning the wafer by a first thickness starting from an initial face of this wafer so as to obtain a thinned wafer having a first face; forming on the first face of the thinned wafer a layer of the first material; local etchings of the layer of first material so as to form local crowns; forming in the wafer electronic chips respectively in contact on their periphery with the corresponding local crowns; individualizing the electronic chips equipped on their first face with the corresponding local crowns respectively forming internal housings; disposing in each internal housing the second adhesive material; and fastening each chip onto a respective carrier substrate via the corresponding adhesive interface.
As indicated above, the second material can be a glue and the first material can be an adhesive film or a filling material.
According to one embodiment, in step b), a second adhesive material is disposed in said housing so that the second material covers at least between 80% and 90% of the surface of the first face of the electronic chip.
According to one embodiment, the method can further comprise a formation of at least one lateral opening in the crown.
Other advantages and features of the invention will appear upon examination of the detailed description of implementations and embodiments, in no way limiting, and of the appended drawings in which:
In
This package comprises a carrier substrate 3 including a first face or upper face F30 and a second face or lower face F31.
The lower face F31 is intended to support a ball grid array (not shown here for simplification purposes) intended to be soldered onto a printed circuit board.
The first face or upper face F30 of the carrier substrate supports an electronic integrated circuit chip 1, a first face, or lower face, F1 of which is fastened onto the first face F30 of the carrier substrate via an adhesive interface 2.
The chip 1 also includes a second face, or upper face, F2 onto contacts pads of which bonding wires WB connecting these contacts pads to contact pads located on the first face F30 of the carrier substrate 30 are soldered.
The adhesive interface 2 has a thickness e, for example between 30 microns and 50 microns.
As illustrated in
This crown 20 is fastened onto the periphery of the first face F1 of the electronic chip.
It defines an internal housing 21 containing a second adhesive material 22.
The first adhesive material 20 and the second adhesive material 22 are different materials.
For example, the first adhesive material of the crown 20 can be a dielectric film such as the film marketed by the Japanese company Ajinomoto under the acronym ABF (Ajinomoto Build-up Film).
Alternatively, this first material of the crown 20 can be a filling material known to a person skilled in the art as an “underfill” material.
The second material 22 contained in the internal housing 21 can be a conventional glue that preferably covers at least 80 to 90% of the surface of the first face F1 of the electronic chip. In other words, the internal housing 21 defined (delimited) by the crown 20 exposes at least 80 to 90% of the surface of the first face F1 of the electronic chip and the second material 22 substantially covers that surface.
The crown 20 allows to effectively control the value of the thickness e separating the first face F1 of the chip from the first face F30 of the carrier substrate.
Moreover, the volume of glue chosen in such a way that the glue covers at least 80 to 90% of the first face F1 of the chip allows, in combination with the adhesive crown 20, to obtain good adhesion of the chip onto the substrate while minimizing the risk of appearance of cracks under the chip.
Furthermore, as illustrated in
Reference is now made more particularly to
In the step ST30 of
Then, in step ST31 of
A thinned wafer WF1 having a first face or lower face F1 is thus obtained.
Then, in step ST32 of
For example, in the case in which the first material is a dielectric film, for example an ABF film, this film, originally soft, is deposited on the first face F1 then solidified by thermal annealing at a temperature, for example, between 150° C. and 200° C.
In the case in which the first material is a filling material, the latter is deposited in a liquid manner, for example via a spin coater, then solidified also by thermal annealing at a temperature between 150° C. and 180° C. for one to two hours.
Then, in step ST33 of
Alternatively, in the case of the use of the filling material, it is possible to apply onto the first face F1 local molds having the shapes of the local crowns 20, inject the filling material into the molds, solidify the injected material by baking as mentioned above then remove the molds.
Then, in step ST34 of
Then, each internal housing 21 is filled with the appropriate volume of glue 22 and, as illustrated in
Number | Date | Country | Kind |
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2208049 | Aug 2022 | FR | national |