Claims
- 1. An integrated circuit die with edge connectors comprising:
- a die of semiconductor material with first and second surfaces, an integrated circuit formed in the first surface, said die having an edge region with one or more edge surfaces disposed transverse to the first and second surfaces of the die, said edge region enclosing said integrated circuit;
- a plurality of edge leads, each edge lead comprising a conductive material, each edge lead having a controlled length extending in a first direction from the edge region toward the integrated circuit and having a controlled depth extending in a second direction along an edge surface and transverse to the first direction;
- a dielectric layer disposed between each lead and the semiconductor material of the die;
- a conductive layer connecting the integrated circuit to the leads on the edge of the die.
- 2. The integrated circuit of claim 1 wherein the edge leads are coated with a reflowable solder material.
- 3. The integrated circuit of claim 1 wherein the conductive material of the leads is polysilicon.
- 4. The integrated circuit of claim 3 wherein the polysilicon is silicided.
- 5. The integrated circuit of claim 1 wherein the conductive material of the leads is metal.
- 6. The integrated circuit of claim 1 wherein the conductive material is a material selected from the group consisting of tungsten, copper, and titanium nitride.
- 7. The integrated circuit of claim 1 wherein the dielectric is silicon dioxide.
- 8. A system for interconnecting two or more dies containing integrated circuits, each integrated circuit comprising:
- a die of semiconductor material with first and second surfaces, an integrated circuit formed in the first surface, said die having an edge region with one or more edge surfaces disposed transverse to the first and second surfaces of the die, said edge region enclosing said integrated circuit;
- a plurality of edge leads spaced apart from each other a controlled distance, each edge lead comprising a conductive material, each edge lead having a controlled length extending in a first direction from the edge region toward the integrated circuit and having a controlled depth extending in a second direction along an edge surface and transverse to the first direction;
- a dielectric layer disposed between each lead and the semiconductor material of the die;
- a conductive layer connecting the integrated circuit to the leads on the edge of the die; and
- a printed circuit board having a planar surface comprising a plurality of circuit traces, said circuit traces being spaced apart from each other by a distance corresponding to the the distance between adjacent edge leads of said dies; wherein said dies are coupled by their respective edge leads to the circuit traces on the printed circuit board.
- 9. The system of claim 8 wherein the dies are generally transverse to the planar surface of the printed circuit board.
Parent Case Info
This application is related to applications Ser. No. 08/462.171, 08,461,951 now U.S. Pat. No. 5,646,067, 08,461,693, 08/461,037, 08,467,876, filed Jun. 5, 1995, and assigned to Harris Corporation.
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